CN108564929B - Source driver, driving circuit and display device - Google Patents
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- CN108564929B CN108564929B CN201810366346.1A CN201810366346A CN108564929B CN 108564929 B CN108564929 B CN 108564929B CN 201810366346 A CN201810366346 A CN 201810366346A CN 108564929 B CN108564929 B CN 108564929B
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Abstract
The invention provides a source driver, a driving circuit and a display device. The display device comprises a display panel, a time sequence controller and a source electrode driver. The time sequence controller is used for receiving an external image signal to provide a compressed image signal. The source driver is used for receiving the compressed image signal and is provided with a decompressor for converting the compressed image signal into restored image data and providing a plurality of source driving signals for driving the display panel according to a plurality of display data of the restored image data.
Description
Divisional patent application
The present application is a divisional application of the international patent application with the application number 201410526273.X, entitled "source driver, driving circuit and display device", and the application date of the original application is 2014-10-08.
Technical Field
The present invention relates to a driver, and more particularly, to a source driver, a driving circuit and a display device.
Background
Nowadays, multimedia technology has become highly developed due to the progress of semiconductor devices or display devices. As for Display devices, Liquid Crystal Display devices (LCDs) having excellent characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation have become the mainstream of the market. In the conventional driving method, the data transmission Rate of the lcd panel is rapidly increased with high image quality and high Frame Rate (Frame Rate), which causes many problems, such as high chip transmission Rate, high image processing Rate, increased power consumption of the display device, difficulty in passing through system security certification, and increased hardware cost. Therefore, how to reduce the transmission amount of image data in the display device within an acceptable range without affecting the picture quality becomes a problem in designing the display device.
Disclosure of Invention
The invention provides a source driver, a driving circuit and a display device, which can reduce the data transmission rate between a time schedule controller and the source driver, thereby avoiding the problems caused by high data transmission rate.
The source driver of the invention comprises a decompressor, a plurality of data latch units and a digital-to-analog converter. The decompressor receives and decompresses compressed image data to provide restored image data, wherein the restored image data comprises a plurality of display data. The data latching units are used for latching the display data and sequentially providing the display data. The digital-to-analog converter is used for receiving the display data in sequence, converting the display data from a digital format to an analog format and generating a plurality of analog output signals in sequence.
In an embodiment of the invention, each piece of compressed image data includes a plurality of lines of display data, and the decompressor decompresses the piece of compressed image data and then obtains the plurality of lines of display data at the same time.
In one embodiment of the invention, the compression unit of the compressed image data is N pixels (pixels) xMpixels, where N pixels xM pixels represent M pixels in N lines, and N, M are all positive integers.
In one embodiment of the present invention, the total number of the data latch units is 2+ P, where P is a positive integer and P is N.
In one embodiment of the present invention, the total number of the data latch units is 2+ P, where P is a positive integer and P < N.
In one embodiment of the present invention, N is 2 and M is 2.
In one embodiment of the present invention, N is 1 and M is 4.
In one embodiment of the present invention, the total number of the data latch units is 3. The display data of each line in the display data are respectively temporarily stored in one or divided into two of the first latch unit and the third latch unit, and then are provided to the second latch unit by the first latch unit and the third latch unit.
In an embodiment of the invention, the first latch unit sequentially temporarily stores a front segment or a rear segment or a whole segment of each of the display data of the first line and the display data of the plurality of subsequent lines among the display data, the second latch unit sequentially temporarily stores a whole segment of the display data of each line among the display data, and the third latch unit sequentially temporarily stores a front segment or a rear segment or a whole segment of each of the display data of the second line and the display data of the subsequent lines among the display data.
In one embodiment of the present invention, the total number of the data latch units is 4. The display data of each line in the display data are respectively temporarily stored in one of the first latch unit and the fourth latch unit, and then provided to the third latch unit by the fourth latch unit, and further provided to the second latch unit by the first latch unit and the third latch unit.
In an embodiment of the invention, the first latch unit sequentially stores the display data of odd lines of the display data, the second latch unit sequentially stores the display data of each line of the display data, the third latch unit sequentially and intermittently stores the display data of even lines of the display data, and the fourth latch unit sequentially stores the display data of even lines of the display data.
In an embodiment of the invention, the source driver further includes a charge sharing control circuit, coupled to the decompressor, for determining whether to initiate charge sharing among the plurality of data channels according to the display data of the plurality of lines.
In an embodiment of the invention, the source driver further includes a receiver for receiving a compressed image signal to provide compressed image data.
In an embodiment of the invention, the source driver further includes a memory unit coupled between the receiver and the decompressor.
In an embodiment of the invention, the source driver further includes a bus remapping unit coupled between the decompressor and the data latching units for distributing the display data to the data latching units.
In an embodiment of the invention, the source driver further includes an output buffer coupled to the digital-to-analog converter for generating a plurality of source driving signals according to the analog output signals.
The driving circuit of the invention is used for driving a display panel and comprises a time schedule controller and a source electrode driver. The time sequence controller is used for providing a compressed image signal. The source driver is used for receiving the compressed image signal and is provided with a decompressor for converting the compressed image signal into restored image data and sequentially providing a plurality of source driving signals according to a plurality of display data of the restored image data.
The display device of the invention comprises a display panel, a time sequence controller and a source electrode driver. The time sequence controller is used for receiving an external image signal to provide a compressed image signal. The source driver is used for receiving the compressed image signal and is provided with a decompressor for converting the compressed image signal into restored image data and providing a plurality of source driving signals for driving the display panel according to a plurality of display data of the restored image data.
In an embodiment of the invention, the timing controller receives an external image signal from the outside, and the external image signal is compressed.
In an embodiment of the invention, the display device further includes a host, and the host compresses an image signal to provide a compressed external image signal.
In an embodiment of the invention, the timing controller includes a compressor for compressing an external image signal to form a compressed image signal.
In an embodiment of the invention, the timing controller further includes a memory unit coupled between the compressor and the source driver for storing the compressed image signal.
In an embodiment of the invention, the source driver further includes a memory unit coupled between the timing controller and the decompressor for storing the compressed image signal.
Based on the above, in the source driver, the driving circuit and the display device according to the embodiments of the invention, the data is transmitted between the timing controller and the source driver by the compressed image signal, so as to reduce the data transmission rate between the timing controller and the source driver, thereby avoiding the problem caused by the high data transmission rate.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a system diagram of a display device according to an embodiment of the present invention;
FIG. 2A is a system diagram of a source driver according to an embodiment of the invention;
FIG. 2B is a schematic diagram of a data latch of the data latch unit according to an embodiment of the present invention;
FIG. 3A is a system diagram of a source driver according to another embodiment of the invention;
FIG. 3B is a schematic diagram of a data latch of the data latch unit according to another embodiment of the present invention;
FIG. 4 is a system diagram of a source driver according to another embodiment of the invention;
FIG. 5 is a system diagram of a display device according to another embodiment of the present invention;
fig. 6 is a flowchart illustrating an operation method of a display device according to an embodiment of the invention.
Description of reference numerals:
10. 20: a host;
11. 511: a compressor;
100. 500: a display device;
101. 501: a drive circuit;
110. 510: a time schedule controller;
120. 120a, 120b, 120c, 520: a source driver;
121. 513: a memory unit;
123: a decompressor;
130: a display panel;
210: a receiver;
220. 310: a bus remapping unit;
230. 320, and (3) respectively: a data channel;
231: a digital-to-analog converter;
233: an output buffer;
410: a charge sharing control circuit;
420: a charge sharing circuit;
D11-D16, D17a, D17b, D18a, D18b, D21-D28: displaying the data;
DCI: compressing the image data;
DRI: restoring the image data;
l11, L21: a first latch unit;
l12, L22: a second latch unit;
l13, L23: a third latch unit;
l24: a fourth latch unit;
PD1, PD2, PSC1 to PSC 6: a horizontal scanning period;
SAO: an analog output signal;
SCPI: compressing the image signal;
SDX: a source drive signal;
SEIa and SEIb: an external image signal;
SIM: an image signal;
s610, S620, S630: and (5) carrying out the following steps.
Detailed Description
Fig. 1 is a system diagram of a display device according to an embodiment of the invention. Referring to fig. 1, in the present embodiment, a display device 100 receives an external image signal SEIa provided by an external host 10, and includes a display panel 130 and a driving circuit 101 for driving the display panel 130. The host 10 comprises, for example, a compressor 11, i.e. the host 10 is a compressed image signal SIM to provide an already compressed external image signal SEIa. In addition, in the embodiment, the driving circuit 101 includes, for example, a timing controller 110 and a plurality of source drivers 120, but in other embodiments, the driving circuit 101 may further include a gate driver (not shown), and the embodiment of the invention is not limited thereto.
In the present embodiment, the timing controller 110 may directly output the compressed external image signal SEIa as the compressed image signal SCPI after receiving the compressed external image signal SEIa. The source driver 120 is used for receiving the compressed video signal SCPI, and has a memory unit 121 and a decompressor 123. The memory unit 121 is coupled between the timing controller 110 and the decompressor 123 for storing the compressed image signal SCPI. The decompressor 123 accesses the compressed image signal SCPI from the memory unit 121, decompresses the compressed image signal SCPI, and converts the decompressed compressed image signal SCPI into restored image data DRI. At this time, the source driver 120 provides a plurality of source driving signals SDX to drive the display panel 130 according to a plurality of display data of the restored image data DRI.
According to the above, since the data is transmitted between the timing controller 110 and the source driver 120 through the compressed video signal SCPI, the data transmission rate between the timing controller 110 and the source driver 120 decreases with the data compression rate, thereby avoiding the problem of high data transmission rate.
In the present embodiment, the compressor 11 and the decompressor 123 correspond to the same compression method. Further, assuming that each piece of compressed image data DCI on the compressed image signal SCPI includes a plurality of horizontal lines of display data, the decompressor 123 decompresses the piece of compressed image data to obtain the plurality of lines of display data simultaneously. In an embodiment of the present invention, the compression unit of the compressed image data DCI may be N pixel × M pixels, where N pixel × M pixels represent M pixels in N lines, and N, M are all positive integers. For example, the compression unit of the compressed image data DCI may be 1pixel × 4pixel or 2pixel × 2pixel, but this may be adjusted by one of ordinary skill in the art, and the embodiment of the invention is not limited thereto.
In addition, in the embodiment, the host 10 is set outside the display device 100, for example, but in other embodiments, the host 10 may be set inside the display device 100, which may be determined by one of ordinary skill in the art, and the embodiment of the invention is not limited thereto.
Fig. 2A is a system diagram of a source driver according to an embodiment of the invention. Referring to fig. 1 and fig. 2A, the same or similar elements are denoted by the same or similar reference numerals. In the present embodiment, the source driver 120a includes, for example, a receiver 210, a memory unit 121, a decompressor 123, a bus remapping unit 220 and a plurality of data channels 230, wherein the data channels 230 have a plurality of data latch units (e.g., a first latch unit L11, a second latch unit L12, and a third latch unit L13), a digital-to-analog converter 231, and an output buffer 233. In addition, in the embodiment, it is assumed that the compression unit of the compressed image data DCI is 2 pixels × 2 pixels, and the total number of the data latch units in the data channel 230 can be set to 3 (i.e. the first latch unit L11, the second latch unit L12, and the third latch unit L13), that is, in addition to the 2 data latch units fixedly disposed, 1 (equal to 2-1) data latch unit is added to store the decompressed display data (e.g. D11-D16).
The receiver 210 is configured to receive the compressed image signal SCPI to provide compressed image data DCI. The memory unit 121 is coupled between the receiver 210 and the decompressor 123, and is configured to store the compressed image data DCI of the compressed image signal SCPI. The decompressor 123 decompresses the compressed image data DCI received from the memory unit 121 to provide the restored image data DRI, wherein the restored image data DRI includes a plurality of display data (e.g., D11-D16). The bus remapping unit 220 is coupled between the decompressor 123 and the first, second and third latch units L11, L12 and L13 for distributing display data (e.g., D11-D16) to the first, second and third latch units L11, L12 and L13.
The digital-to-analog converter 231 sequentially receives the corresponding display data (e.g., D11-D16) through the first latch unit L11, the second latch unit L12 and the third latch unit L13, and then converts the received display data (e.g., D11-D16) from a digital format to an analog format to sequentially generate a plurality of analog output signals SAO. The output buffer 233 is coupled to the digital-to-analog converter 231 for generating the source driving signal SDX according to the analog output signal SAO.
FIG. 2B is a schematic diagram of a data latch of the data latch unit according to an embodiment of the invention. Referring to fig. 2A and 2B, since the compression unit of the compressed image data DCI is 2 pixels × 2 pixels, and the data transmission rate is correspondingly set to half of the original data transmission rate, a complete compressed image data DCI requires two horizontal scanning periods (e.g. PD1, PD2, and PSC 1-PSC 6) for transmission.
Further, in the preliminary horizontal scanning periods PD1 to PD2, the display data D11 and D12 of the 1 st and 2 nd lines are stored in the first latch unit L11 and the third latch unit L13, while the second latch unit L12 is kept blank (i.e., N/a). In the 1 st horizontal scan period PSC1, the display data D11 is transferred from the first latch unit L11 to the second latch unit L12, so as to transmit the display data D11 to the digital-to-analog converter 231 through the second latch unit L12. At this time, the first latch unit L11 is blank, but the third latch unit L13 still stores the display data D12 to be displayed and cannot be used.
Since only half of the compressed image data DCI can be transmitted during one horizontal scan, PSC1 can only obtain the first half (denoted by D13a and D14 a) of the display data D13 and D14 of the 3 rd and 4 th lines during the horizontal scan. Also, in order to make the decompressor 123 operate normally, the display data D13a and D14a are stored in the first latch unit L11. Similarly, in the 2 nd horizontal scanning period PSC2, the display data D12 is transferred from the third latch unit L13 to the second latch unit L12, and the second half portions (denoted by D13b and D14 b) of the display data D13 and D14 output from the decompressor 123 are stored in the third latch unit L13.
In the 3 rd horizontal scanning period PSC3, the display data D13 is transferred from the first latch unit L11 and the third latch unit L13 to the second latch unit L12, and blank positions in the first latch unit L11 and the third latch unit L13 store the first half of the display data D15 and D16 of the 5 th and 6 th lines (denoted by D15a and D16 a), respectively. In the 4 th horizontal scanning period PSC4, the display data D14 is transferred from the first latch unit L11 and the third latch unit L13 to the second latch unit L12, and blank positions in the first latch unit L11 and the third latch unit L13 store the second half portions (denoted by D15b and D16 b) of the display data D15 and D16 of the 5 th and 6 th lines, respectively. At this time, the first latch unit L11 stores the complete display data D15, and the third latch unit L13 stores the complete display data D16. The operations of the subsequent horizontal scanning periods (e.g., PSC5, PSC6) refer to the operations of PSC1 during the 1 st to 4 th horizontal scanning periods, so that other display data (e.g., D17, D18) can be stored by the first latch unit L11 and the third latch unit L13 and transmitted to the second latch unit L12.
According to the above, the display data (e.g., D11-D16) of each line is temporarily stored in one or both of the first latch unit L11 and the third latch unit L13, and then provided to the second latch unit L12 by the first latch unit L11 and the third latch unit L13. Further, the first latch unit L11 can sequentially temporarily store the display data D11 of the 1 st line of the display data (e.g., D12-D16) and the display data (e.g., D12-D16) of a plurality of subsequent lines in front of, behind, or in whole; the second latch unit L12 is used for sequentially temporarily storing the entire segment of the display data of each line of the display data (e.g., D12-D16); the third latch unit L13 can sequentially temporarily store the display data D12 of the second line and the display data (e.g., D12-D16) of the plurality of display data (e.g., D11-D16) of the subsequent lines.
Fig. 3A is a system diagram of a source driver according to another embodiment of the invention. Referring to fig. 2A and 3A, the same or similar elements are denoted by the same or similar reference numerals. In the present embodiment, the source driver 120b is substantially the same as the source driver 120a, except that each data channel 320 has 4 data latch units (i.e., a first latch unit L21, a second latch unit L22, a third latch unit L23, and a fourth latch unit L24), and the display data (e.g., D21-D28) are distributed to the first latch unit L21, the second latch unit L22, the third latch unit L23, and the fourth latch unit L24 through the bus remapping unit 310. Here, it is assumed that the compression unit of the compressed image data DCI is 2 pixels × 2 pixels, and the total number of the data latch units in the data channel 320 is set to 4, that is, in addition to the 2 data latch units fixedly arranged, 2 data latch units are added to store the decompressed display data (e.g., D21-D28).
FIG. 3B is a schematic diagram of a data latch of the data latch unit according to another embodiment of the present invention. Referring to fig. 3A and 3B, since the compression unit of the compressed image data DCI is 2 pixels × 2 pixels, and the data transmission rate is correspondingly set to half of the original data transmission rate, a complete compressed image data DCI requires two horizontal scanning periods (e.g. PD1, PD2, and PSC 1-PSC 6) for transmission.
Further, in the preliminary horizontal scanning periods PD1 to PD2, the display data D21 and D22 of the 1 st and 2 nd lines are stored in the first latch unit L21 and the fourth latch unit L24, while the second latch unit L22 and the third latch unit L23 are kept blank (i.e., N/a). In the 1 st horizontal scan period PSC1, the display data D21 is transferred from the first latch unit L21 to the second latch unit L22, so as to transmit the display data D21 to the digital-to-analog converter 231 through the second latch unit L22. Moreover, the display data D22 is transferred from the fourth latch unit L24 to the third latch unit L23. At this time, since the first latch unit L21 and the fourth latch unit L24 are cleared, the next compressed image data DCI, i.e., the display data D23 and D24 of the 3 rd and 4 th lines, can be stored.
In the 2 nd horizontal scan period PSC2, the display data D22 is transferred from the third latch unit L23 to the second latch unit L22, and the first latch unit L21 and the fourth latch unit L24 continuously store the display data D23 and D24. The operations of the subsequent horizontal scanning periods (e.g., PSC 4-PSC 6) refer to the operations of PSC1 during the 1 st and 2 nd horizontal scanning periods, so that other display data (e.g., D27, D28) are stored by the first latch unit L21, the third latch unit L23, and the fourth latch unit L24 and transmitted to the second latch unit L22.
According to the above, the display data (e.g., D21-D28) of each line is temporarily stored in one of the first latch unit L21 and the fourth latch unit L24, respectively, and then provided to the third latch unit L23 by the fourth latch unit L24, and further provided to the second latch unit L22 by the first latch unit L21 and the third latch unit L23. Further, the first latch unit L21 may sequentially store display data (e.g., D21, D23, D25, D27) of odd lines among the display data (e.g., D21-D28), the second latch unit L22 may sequentially store display data (e.g., D21-D28) of each line among the display data, the third latch unit L may sequentially and intermittently store display data (e.g., D22, D24, D26, D28) of even lines among the display data (e.g., D21-D28), and the fourth latch unit L24 may sequentially store display data (e.g., D22, D24, D26, D28) of even lines among the display data (e.g., D21-D28).
Fig. 4 is a system diagram of a source driver according to another embodiment of the invention. Referring to fig. 2A and 4, the same or similar elements are denoted by the same or similar reference numerals. In the present embodiment, the source driver 120c is substantially the same as the source driver 120a, except that the source driver 120c further includes a charge sharing control circuit 410 and a charge sharing circuit 420. The charge sharing circuit 420 is coupled to the output terminals of all the data channels 230, so as to perform charge sharing among all the data channels 230 under the control of the charge sharing control circuit 410. The charge sharing circuit 420 is coupled to the decompressor 123 and the charge sharing circuit 420, and receives a plurality of display data (e.g., D11-D16) included in the restored image data DRI, and determines whether to perform charge sharing among all the data channels 230 according to the received display data (e.g., D11-D16).
Fig. 5 is a system diagram of a display device according to another embodiment of the invention. Referring to fig. 1 and 5, the same or similar elements are denoted by the same or similar reference numerals. In the present embodiment, the display device 500 is substantially the same as the display device 100, except that the driving circuit 501 includes, for example, a timing controller 510 and a plurality of source drivers 520. In the present embodiment, the host 20 directly transmits the image signal SIM, that is, provides the uncompressed external image signal SEIb.
The timing controller 510 includes a compressor 511 and a memory unit 513, wherein the compressor 511 is used for compressing the external image signal SEIb to form a compressed image signal SCPI, and the memory unit 513 is coupled between the compressor 511 and the source driver 520 for storing the compressed image signal SCPI. In other words, after the compressor 511 receives the uncompressed external image signal SEIb, the external image signal SEIb is compressed to form the compressed image signal SCPI, and the compressed image signal SCPI is transmitted to the source driver 520 through the memory unit 513. The source driver 520 further includes a decompressor 123 for decompressing the compressed video signal SCPI and converting the decompressed video signal SCPI into the restored video data DRI. At this time, the source driver 520 still provides a plurality of source driving signals SDX to drive the display panel 130 according to a plurality of display data of the restored image data DRI.
Fig. 6 is a flowchart illustrating an operation method of a display device according to an embodiment of the invention. Referring to fig. 6, in the present embodiment, the operation method of the display device includes the following steps. First, an external image signal is received by a timing controller to provide a compressed image signal (step S610). Next, the source driver receives the compressed image signal (step S620), and the decompressor of the source driver converts the compressed image signal into a restored image data, so as to sequentially provide a plurality of display voltages to the display panel according to a plurality of display data of the restored image data to drive the display panel (step S630). The sequence of the steps S610, S620, and S630 is for illustration, and the embodiment of the invention is not limited thereto. In addition, the details of the steps S610, S620, and S630 can be shown in the embodiments of fig. 1, fig. 2A, fig. 2B, fig. 3A, fig. 3B, fig. 4, fig. 5, and fig. 6, and thus are not repeated herein.
In summary, in the source driver, the driving circuit and the display device according to the embodiments of the invention, the data is transmitted between the timing controller and the source driver by the compressed image signal, so as to reduce the data transmission rate between the timing controller and the source driver, thereby avoiding the problem caused by the high data transmission rate. Also, by data interleaving, the number of data latching units in the data channel may be reduced. Moreover, since the restored image data includes the display data of a plurality of lines, each restored image data can be used for judging whether to perform charge sharing among data channels, so that the power consumption of the source driver is reduced.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (29)
1. A source driver, comprising:
a decompressor receiving and decompressing compressed image data to provide restored image data, wherein the restored image data includes a plurality of display data, and the compressed image data of each stroke is display data including a plurality of lines;
a plurality of data latching units for latching the display data and providing the display data in sequence;
a bus remapping unit, coupled between the decompressor and each of the data latch units, for distributing the display data from the decompressor to the data latch units, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data for each stroke at the same time, and one of the plurality of data latch units different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided; and
the digital-to-analog converter is used for receiving the display data in sequence, converting the display data from a digital format to an analog format and generating a plurality of analog output signals in sequence.
2. The source driver of claim 1, wherein the decompressor is configured to simultaneously obtain the display data of the plurality of lines after decompressing each of the compressed image data.
3. The source driver of claim 1, wherein the compression unit of the compressed image data is N pixels by M pixels, wherein the N pixels by M pixels represent M pixels in N lines, and N, M are all positive integers.
4. The source driver as claimed in claim 3, wherein the total number of the data latch units is 2+ P, where P is a positive integer and P is N.
5. The source driver as claimed in claim 3, wherein the total number of the data latch units is 2+ P, where P is a positive integer and P < N.
6. The source driver of claim 3, wherein N-2 and M-2.
7. The source driver of claim 3, wherein N-1 and M-4.
8. The source driver of claim 1, wherein the total number of data latch units is 3.
9. The source driver of claim 8, wherein the data latch unit comprises a first latch unit, a second latch unit and a third latch unit, and the display data of each line of the display data is respectively temporarily stored in one or both of the first latch unit and the third latch unit and then provided to the second latch unit by at least one of the first latch unit and the third latch unit.
10. The source driver of claim 9, wherein the first latch unit sequentially buffers a front segment or a rear segment or an entire segment of each of the display data of a first line of the display data and the display data of a plurality of subsequent lines, the second latch unit sequentially buffers an entire segment of the display data of each line of the display data, and the third latch unit sequentially buffers a front segment or a rear segment or an entire segment of each of the display data of a second line of the display data and the display data of the subsequent lines.
11. The source driver of claim 1, wherein the total number of data latch units is 4.
12. The source driver of claim 11, wherein the data latch unit comprises a first latch unit, a second latch unit, a third latch unit and a fourth latch unit, and the display data of each line of the display data is respectively temporarily stored in one of the first latch unit and the fourth latch unit, and then provided to the third latch unit by the fourth latch unit, and then provided to the second latch unit by one of the first latch unit and the third latch unit.
13. The source driver of claim 12, wherein the first latch unit sequentially stores display data of odd lines among the display data, the second latch unit sequentially stores display data of each line among the display data, the third latch unit sequentially and intermittently stores display data of even lines among the display data, and the fourth latch unit sequentially stores display data of even lines among the display data.
14. The source driver of claim 1, further comprising a charge sharing control circuit coupled to the decompressor for determining whether to enable charge sharing among the plurality of data channels according to the display data of the plurality of lines.
15. The source driver of claim 1, further comprising:
a receiver to receive a compressed image signal to provide the compressed image data.
16. The source driver of claim 15, further comprising:
a memory unit coupled between the receiver and the decompressor.
17. The source driver of claim 1, further comprising:
an output buffer coupled to the digital-to-analog converter for generating a plurality of source driving signals according to the analog output signal.
18. A driving circuit for driving a display panel, comprising:
a timing controller for providing a compressed image signal, the compressed image data of each stroke being display data including a plurality of lines; and
a source driver for receiving the compressed image signal, converting the compressed image signal into a restored image data, and sequentially providing a plurality of source driving signals according to a plurality of display data of the restored image data, wherein the source driver comprises:
a decompressor receiving and decompressing the compressed image signal to provide the restored image data, wherein the restored image data includes the plurality of display data;
a plurality of data latching units for latching the display data and providing the display data in sequence;
a bus remapping unit, coupled between the decompressor and each of the data latch units, for distributing the display data from the decompressor to the data latch units, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data for each stroke at the same time, and one of the plurality of data latch units different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided; and
a digital-to-analog converter for receiving the display data in sequence, converting the display data from a digital format to an analog format, and generating the plurality of source driving signals in sequence,
wherein the timing controller receives an external image signal from the outside, outputs the external image signal to the source driver without compression and decompression, and the external image signal has been compressed.
19. The driving circuit of claim 18, wherein the source driver further comprises a memory unit coupled between the timing controller and the decompressor for storing the compressed image signal.
20. A display device, comprising:
a display panel;
a timing controller for receiving an external image signal to provide a compressed image signal, wherein the compressed image data of each stroke is display data including a plurality of lines; and
a source driver for receiving the compressed image signal, converting the compressed image signal into a restored image data, and providing a plurality of source driving signals to drive the display panel according to a plurality of display data of the restored image data, wherein the source driver comprises:
a decompressor receiving and decompressing the compressed image signal to provide the restored image data, wherein the restored image data includes the plurality of display data;
a plurality of data latching units for latching the display data and providing the display data in sequence;
a bus remapping unit, coupled between the decompressor and each of the data latch units, for distributing the display data from the decompressor to the data latch units, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data for each stroke at the same time, and one of the plurality of data latch units different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided; and
a digital-to-analog converter for receiving the display data in sequence, converting the display data from a digital format to an analog format, and generating the plurality of source driving signals in sequence,
wherein the timing controller receives the external image signal from the outside, outputs the external image signal to the source driver without compression and decompression, and the external image signal has been compressed.
21. The display device according to claim 20, further comprising a host which compresses an image signal to provide the compressed external image signal.
22. The display device of claim 20, wherein the source driver further comprises a memory unit coupled between the timing controller and the decompressor for storing the compressed image signal.
23. A driving circuit for driving a display panel, comprising:
a timing controller for generating a compressed image signal, the compressed image data of each stroke being display data including a plurality of lines; and
a source driver for receiving the compressed image signal, converting the compressed image signal into a restored image data, and sequentially providing a plurality of source driving signals according to a plurality of display data of the restored image data, wherein the source driver comprises:
a decompressor receiving and decompressing the compressed image signal to provide the restored image data, wherein the restored image data includes the plurality of display data;
a plurality of data latching units for latching the display data and providing the display data in sequence;
a bus remapping unit, coupled between the decompressor and each of the data latch units, for distributing the display data from the decompressor to the data latch units, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data for each stroke at the same time, and one of the plurality of data latch units different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided; and
a digital-to-analog converter for receiving the display data in sequence, converting the display data from a digital format to an analog format, and generating the plurality of source driving signals in sequence,
wherein the timing controller has a compressor for compressing an external image signal to form the compressed image signal,
the timing controller further includes a memory unit coupled between the compressor and the source driver for storing the compressed image signal.
24. The driving circuit of claim 23, wherein the source driver further comprises a memory unit coupled between the timing controller and the decompressor for storing the compressed image signal.
25. A driving circuit for driving a display panel, comprising:
a timing controller for receiving an external image signal to provide a compressed image signal, wherein the compressed image data of each stroke is display data including a plurality of lines; and
a source driver for receiving the compressed image signal, converting the compressed image signal into a restored image data, and providing a plurality of source driving signals to drive the display panel according to a plurality of display data of the restored image data, wherein the source driver comprises:
a decompressor receiving and decompressing the compressed image signal to provide the restored image data, wherein the restored image data includes the plurality of display data;
a plurality of data latching units for latching the display data and providing the display data in sequence;
a bus remapping unit, coupled between the decompressor and each of the data latch units, for distributing the display data from the decompressor to the data latch units, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data for each stroke at the same time, and one of the plurality of data latch units different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided; and
a digital-to-analog converter for receiving the display data in sequence, converting the display data from a digital format to an analog format, and generating the plurality of source driving signals in sequence,
wherein the timing controller has a compressor to compress the external image signal to form the compressed image signal,
the timing controller further includes a memory unit coupled between the compressor and the source driver for storing the compressed image signal.
26. The driving circuit of claim 25, wherein the source driver further comprises a memory unit coupled between the timing controller and the decompressor for storing the compressed image signal.
27. A display device, comprising:
a display panel;
a timing controller for receiving an external image signal to provide a compressed image signal, wherein the compressed image data of each stroke is display data including a plurality of lines; and
a source driver for receiving the compressed image signal, converting the compressed image signal into a restored image data, and providing a plurality of source driving signals to drive the display panel according to a plurality of display data of the restored image data, wherein the source driver comprises:
a decompressor receiving and decompressing the compressed image signal to provide the restored image data, wherein the restored image data includes the plurality of display data;
a plurality of data latching units for latching the display data and providing the display data in sequence;
a bus remapping unit, coupled between the decompressor and each of the data latch units, for distributing the display data from the decompressor to the data latch units, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data for each stroke at the same time, and one of the plurality of data latch units different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided; and
a digital-to-analog converter for receiving the display data in sequence, converting the display data from a digital format to an analog format, and generating the plurality of source driving signals in sequence,
wherein the timing controller has a compressor to compress the external image signal to form the compressed image signal,
the timing controller further includes a memory unit coupled between the compressor and the source driver for storing the compressed image signal.
28. The display device of claim 27, wherein the source driver further comprises a memory unit coupled between the timing controller and the decompressor for storing the compressed image signal.
29. A source driver, comprising:
a decompressor receiving compressed image data and decompressing the compressed image data to provide restored image data, wherein the restored image data includes a plurality of display data, and the compressed image data of each pen is display data including a plurality of lines;
a plurality of data latch units for latching the display data and sequentially providing the display data, wherein a part of the plurality of data latch units temporarily stores the display data of a plurality of lines of the compressed image data of each stroke at the same time, and one data latch unit different from the part of the plurality of data latch units temporarily stores the display data of each line to be provided;
the digital-to-analog converter is used for receiving the display data in sequence, converting the display data from a digital format to an analog format and generating a plurality of analog output signals in sequence; and
and the charge sharing control circuit is coupled to the decompressor and used for judging whether to start charge sharing among the plurality of data channels or not according to the display data of the plurality of lines.
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| CN201410526273.XA CN105096849B (en) | 2014-05-06 | 2014-10-08 | Source electrode driver, driving circuit and display device |
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| CN105096849B (en) | 2018-05-22 |
| TW201543432A (en) | 2015-11-16 |
| CN105096849A (en) | 2015-11-25 |
| CN108564929A (en) | 2018-09-21 |
| TWI563481B (en) | 2016-12-21 |
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