CN105070681B - A kind of gallium arsenide substrate mHEMT active area electric isolation method - Google Patents
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- 238000002955 isolation Methods 0.000 title claims abstract description 51
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims abstract description 22
- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 28
- 230000008569 process Effects 0.000 claims abstract description 16
- 230000000694 effects Effects 0.000 claims abstract description 15
- 238000002347 injection Methods 0.000 claims abstract description 11
- 239000007924 injection Substances 0.000 claims abstract description 11
- 239000004065 semiconductor Substances 0.000 claims abstract description 10
- 238000001039 wet etching Methods 0.000 claims abstract description 7
- 239000000523 sample Substances 0.000 claims description 77
- 150000002500 ions Chemical class 0.000 claims description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 20
- 238000001259 photo etching Methods 0.000 claims description 15
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 13
- 239000008367 deionised water Substances 0.000 claims description 12
- 229910021641 deionized water Inorganic materials 0.000 claims description 12
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- KRKNYBCHXYNGOX-UHFFFAOYSA-N citric acid Chemical compound OC(=O)CC(O)(C(O)=O)CC(O)=O KRKNYBCHXYNGOX-UHFFFAOYSA-N 0.000 claims description 9
- 238000004140 cleaning Methods 0.000 claims description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 7
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 5
- 238000005566 electron beam evaporation Methods 0.000 claims description 5
- 239000011259 mixed solution Substances 0.000 claims description 5
- 238000000276 deep-ultraviolet lithography Methods 0.000 claims description 4
- 238000005406 washing Methods 0.000 claims description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 3
- 239000000908 ammonium hydroxide Substances 0.000 claims description 3
- 230000003628 erosive effect Effects 0.000 claims description 3
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- 229910052737 gold Inorganic materials 0.000 claims description 2
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- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000005192 partition Methods 0.000 abstract description 4
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 6
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 4
- 238000002360 preparation method Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 241000216843 Ursus arctos horribilis Species 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- -1 boron ion Chemical class 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 229920000742 Cotton Polymers 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
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- 235000013399 edible fruits Nutrition 0.000 description 1
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- 238000005530 etching Methods 0.000 description 1
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- 238000005468 ion implantation Methods 0.000 description 1
- 150000002576 ketones Chemical class 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/7605—Making of isolation regions between components between components manufactured in an active substrate comprising AIII BV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
Abstract
The present invention discloses a kind of gallium arsenide substrate mHEMT active area electric isolation method, for the active area electric isolation for becoming component high electron mobility transistor, propose wet etching and partition method that ion implanting combines, surface heavily doped layer is removed first, ion implanting isolation is carried out again, the injection effect of ion implanting is effectively increased, and then improves the isolation effect between active area；Under equal conditions, the partition method that ion implanting and mesa etch combine, have the characteristics that electric isolation effect is good, processing compatibility is strong, on subsequent technique influence it is smaller, there is good repeatability and be easy to implement, and the drawbacks of individually using mesa etch and ion implanting is efficiently avoided, there is good use value to semiconductor fabrication process.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, and in particular to a kind of gallium arsenide substrate mHEMT (change high electronics of component
Mobility transistor) active area electric isolation method.
Background technique
During semiconductor fabrication process, the Major Technology packet of compound semiconductor device active area electric isolation
It includes: mesa etch isolation and injection isolation.
It is many not beneficial that mesa etch method realizes that electric isolation has, such as deep-submicron grizzly bar is in the corruption across several hundred nanometers
It is easy to appear broken strip when losing step and influences yield rate；Secondly, the active region mesa for corroding out be easy to cause and passes through platform in grizzly bar
It is contacted when the wall of surface side with conducting channel, causes grid leakage current to increase, the decline of grid breakdown voltage；Third, it is exposed in mesa side walls
Hetero-junctions section be easy to be corroded in technique preparation process, stain, also having a certain amount of exhaust in passivating film covering
This is also usually problem during semiconductor preparing process.
Relative to mesa etch, ion implanting is preferably to select, because it maintains the planar structure of device, this is advantageous
In device manufacture and chip technology processing.And ion implanting avoids the leakage of mesa sides grid, it is thus eliminated that grid leak
Problem.And a large amount of theory analysis and experimental result all show to realize gallium arsenide substrate only with ion injection method
The ideal isolation of InGaAs/InAlAs mHEMT is had any problem, this is because the InGaAs band gap of Lattice Matching is only
0.74eV, intrinsic resistivity very little, and with the raising of In component, InGaAs channel will be further narrow as, intrinsic resistance
It is smaller；On the other hand, the ion of activation forms shallow donor's energy level in the material and also results in isolation performance variation；Third, injection
Main ion profiles substantially follow Gaussian Profile rule, and the peak value of concentration necessarily will affect very thin highly doped not on surface
InGaAs cap layers note people's insulation resistance.
Summary of the invention
The present invention for individually using mesa etch be isolated and inject isolation method carry out active area of semiconductor device electricity every
From existing drawback, a kind of gallium arsenide substrate mHEMT active area electric isolation method is provided, wet etching and ion are used
Injection combines, and realizes good active area isolation effect.
To solve the above problems, the present invention is achieved by the following technical solutions:
A kind of gallium arsenide substrate mHEMT active area electric isolation method, includes the following steps:
Step 1, organic washing and inorganic cleaning are carried out to sample, to ensure sample clean cleaning；Sample is GaAs lining
The epitaxial material system of the change component multilayered structure grown on bottom, and the top layer of the epitaxial material system is cap layers；
Step 2, the active area of spin coating photoetching protection sample, and firmly treatment is carried out so as to subsequent to the sample after photoetching
Isolation technology；
Step 3, wet etching, the groove for removing the cap layers of sample, and being formed with conducive to ion implanting are carried out to sample；
Step 4, ion is injected into sample by removal cap layers region, forms the electric isolation of active area；
Step 5, the photoetching of ohmic metal growth is carried out to sample, and utilizes electron beam evaporation platform evaporated devices on sample
Ohmic metal.
In above-mentioned steps 1, the cap layers include In0.53Ga0.47As cap layers and In0.65Ga0.35As cap layers, wherein
In0.53Ga0.47As cap layers and n0.65Ga0.35As cap layers institute doping is Si.
In above-mentioned steps 1, the process of organic washing is carried out to sample specifically: first sample is statically placed in acetone soln and is soaked
Bubble, to remove the organic pollutant of sample surfaces；Sample is statically placed in aqueous isopropanol again, removes third on sample surfaces
Ketone；It is rinsed, and is dried with nitrogen with deionized water afterwards；The process of inorganic cleaning is carried out to sample specifically: first with ammonium hydroxide and go from
The mixed solution of sub- water impregnates sample, then is rinsed with deionized water, and be dried with nitrogen.
In above-mentioned steps 3, the cap layers of citric acid and hydrogen peroxide mixed solution erosion removal sample surfaces are utilized.
In above-mentioned steps 4, the injection of boron ion needs to calculate actual ions injection institute using ion implanting simulation software
The energy needed, and it is used to instruct the energy and dosage of actual ion implanting, to reduce the process costs of device.
In above-mentioned steps 5, Ni, AuGe, Ni and Au are successively evaporated using electron beam evaporation platform from bottom to top, to form source
Leak metal ohmic contact electrode.
In above-mentioned steps 2 and 5, the process of photoetching specifically: photoresist is first uniformly applied to the surface of sample, then benefit
Sample is exposed with deep-UV lithography machine, is developed afterwards using developer solution to the sample after exposure, then use deionized water
Fixing, and be dried with nitrogen.
In above-mentioned steps 2 and step 5, require to carry out sample the pre- of sample surfaces painting adhesive before each photoetching
Treatment process, to enhance the adhesiveness of photoresist and sample surfaces, to improve the success rate of sample photoetching.
It after above-mentioned steps 5, still further comprises, step 6, using probe station and with semiconductor test analyzer to sample
On the electric isolation effects of adjacent devices tested, and verify the process of the active area isolation effect.
Compared with prior art, the present invention has a characteristic that
1, for the active area electric isolation for becoming component high electron mobility transistor, wet etching and ion note are proposed
Enter the partition method combined, i.e., removes sample surfaces heavily doped layer first with wet etching, then formed by ion implanting
The method of isolation.Surface heavily doped layer is removed first, then carries out ion implanting isolation, effectively increases the injection effect of ion implanting
Fruit, and then improve the isolation effect between active area；
2, under equal conditions, the partition method that ion implanting and mesa etch combine, good with electric isolation effect,
Processing compatibility is strong, on subsequent technique influence it is smaller, have the characteristics that good repeated and be easy to implement, and be effectively prevented from
It is independent using mesa etch and ion implanting the drawbacks of, to semiconductor fabrication process have good use value.
Detailed description of the invention
Fig. 1-Fig. 5 is a kind of preparation flow schematic diagram of gallium arsenide substrate mHEMT active area electric isolation method.
Fig. 6 is the I-V curve figure using sample adjacent devices active area electric isolation prepared by the present invention.
Specific embodiment
A kind of gallium arsenide substrate mHEMT active area electric isolation method includes the following steps: as Figure 1-Figure 5
Step 1: the cleaning of device extension sample.
Sample is cleaned, wherein sample is the epitaxial material body of the change component multilayered structure grown in gallium arsenide substrate
System, and the epitaxial material system includes cap layers, barrier layer, channel layer and buffer layer etc., wherein cap layers are located at top layer.Cap layers are
Doping concentration is higher, is conducive to the heavily doped layer that Ohmic contact is formed with metal.In the present invention, the cap layers are 5nm's
In0.53Ga0.47As layers and 20nm of In0.65Ga0.35As layers, institute's doping is Si (silicon), and concentration is 10E+19cm-3.GaAs
The change component multilayered structure epitaxial material system sample grown on substrate can be grown by MBE (molecular beam epitaxy) to be obtained.It is first
First, it is organically cleaned: sample being statically placed in acetone soln and is impregnated 5 minutes, to remove the organic contamination of sample surfaces
Object；Sample is statically placed in aqueous isopropanol 5 minutes, the acetone on sample surfaces is removed；It is rinsed 6 times with deionized water, nitrogen
Drying.Secondly, carrying out inorganic cleaning: the ammonium hydroxide using 25%: deionized water=1:10 impregnates sample 2 minutes, deionized water
It rinses 6 times, is dried with nitrogen.Finally ensure sample clean cleaning.
Step 2: active area electric isolation photoetching.Referring to Fig. 1.
Before table top is protected in spin coating photoetching, HMDS (hexamethyldisilazane) surface preparation first is carried out to sample, so as to
Enhance the adhesiveness of photoresist and sample surfaces.Even photoresist AZ5214, revolving speed is 4000 revolutions per seconds, the time is 30 seconds.Front baking,
Temperature is 95 DEG C, the time is 90 seconds.It is exposed 6.5 seconds using MA6 deep-UV lithography machine.Using JZX3038 developing liquid developing 45 seconds,
Deionized water fixing, is dried with nitrogen.Using 110 DEG C of hot plate, it is used for post bake within 3 minutes.
Step 3: the heavily doped layer of wet etching removal sample surfaces.Referring to fig. 2.
Heavily doped layer using citric acid and hydrogen peroxide mixed solution erosion removal device epitaxial layers material surface is
In0.53Ga0.47As cap layers and In0.65Ga0.35As cap layers.That is: C is utilized6H8O7:H2O2=1:1 corrodes corrosion In0.53Ga0.47As
Cap layers and In0.65Ga0.35As cap layers, etching time are 45 seconds 1 minute.
Step 4: ion implanting is carried out to sample.Referring to Fig. 3.
Simulation calculating is carried out first with ion implanting simulation software SRIM, energy needed for calculating actual ions injection
Amount, and it is used to instruct the energy and dosage of actual ion implanting.By calculating simulation repeatedly, for material system of the invention
System, final we use ion implantation apparatus, select boron ion, Implantation Energy 20Kev, implantation dosage 2.0E+14cm-2, with
High resistant isolation is formed to channel portion.
Step 6: device ohmic metal.Referring to fig. 4 with 5.
Firstly, carrying out the photoetching of Ohmic contact to the active isolated area of formation.HMDS surface preparation is carried out to sample, with
Just enhance the adhesiveness of photoresist and sample surfaces.Even photoresist AZ5214, revolving speed is 4000 revolutions per seconds, the time is 30 seconds.It uses
The photoresist of dust-free cotton bud removal sample edge part.Front baking, temperature is 95 DEG C, the time is 90 seconds.Utilize MA6 deep-UV lithography
Machine exposes 1.9 seconds.Reversion baking is carried out to sample, temperature is 110 DEG C, the time is 90 seconds.Sample is carried out pan-exposure 42 seconds.It uses
JXZ3038 developing liquid developing 50 seconds.Deionized water fixing.It is dried with nitrogen.Using electron beam evaporation platform successively evaporate Ni (5nm)/
AuGe (100nm)/Ni (20nm)/Au (100nm), to form source and drain metal and gate electrode, i.e., source, leakage metal by 5nm Ni,
The Au of the Ni and 100nm of AuGe, 20nm of 100nm are formed by stacking from bottom to top, do not need to anneal, and form Ohmic contact, are utilized
The source-drain contact resistance of TLM test is 0.1 Ω mm, and ohmic contact resistance is 1.3E-6 Ω cm2。
Step 5: the isolation effect test of active area electric isolation.
Using probe station Cascade150 and semiconductor test analyzer Agilent B1505A, carry out between adjacent devices
Electric isolation effect.Spacing between adjacent devices is 17 μm, is added in Ohmic contact contact electrode (pad) of adjacent devices
Upper voltage tests size of current between them, the as isolation effect under active area.Fig. 6 is the adjacent devices isolation on sample
The test I-V curve of effect.
Claims (9)
1. a kind of gallium arsenide substrate mHEMT active area electric isolation method, characterized by the following steps:
Step 1, organic washing and inorganic cleaning are carried out to sample, to ensure sample clean cleaning；Sample is in gallium arsenide substrate
The epitaxial material system of the change component multilayered structure of growth, and the top layer of the epitaxial material system is cap layers；
Step 2, the active area of spin coating photoetching protection sample, and firmly treatment is carried out so as to subsequent isolation to the sample after photoetching
Technique；
Step 3, wet etching, the groove for removing the cap layers of sample, and being formed with conducive to ion implanting are carried out to sample；
Step 4, ion is injected into sample by removal cap layers region, to form high resistant isolation to channel portion, is formed active
The electric isolation in area；
Step 5, the photoetching of ohmic metal growth is carried out to sample, and utilizes electron beam evaporation platform evaporated devices ohm on sample
Metal.
2. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that: step
In rapid 1, the cap layers include In0.53Ga0.47As cap layers and In0.65Ga0.35As cap layers, wherein In0.53Ga0.47As cap layers and
n0.65Ga0.35As cap layers institute doping is Si.
3. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that: step
In rapid 1,
The process of organic washing is carried out to sample specifically: first sample is statically placed in acetone soln and is impregnated, to remove sample
The organic pollutant on surface；Sample is statically placed in aqueous isopropanol again, removes the acetone on sample surfaces；After use deionized water
It rinses, and is dried with nitrogen；
The process of inorganic cleaning is carried out to sample specifically: first impregnate sample with ammonium hydroxide and the mixed solution of deionized water, then use
Deionized water is rinsed, and is dried with nitrogen.
4. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that: step
In rapid 3, the cap layers of citric acid and hydrogen peroxide mixed solution erosion removal sample surfaces are utilized.
5. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that: step
In rapid 4, energy needed for the injection of ion needs to calculate actual ions injection using ion implanting simulation software, and be used to refer to
The energy and dosage of actual ion implanting are led, to reduce the process costs of device.
6. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that: step
In rapid 5, Ni, AuGe, Ni and Au are successively evaporated using electron beam evaporation platform from bottom to top, to form source and drain metal ohmic contact
Electrode.
7. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that: step
In rapid 2 and 5, the process of photoetching specifically: photoresist is first uniformly applied to the surface of sample, recycles deep-UV lithography machine
Sample is exposed, is developed afterwards using developer solution to the sample after exposure, then be fixed with deionized water, and nitrogen is blown
It is dry.
8. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1 or claim 7, it is characterised in that:
In step 2 and step 5, require to carry out the preprocessing process that sample surfaces apply adhesive to sample before each photoetching, with
The adhesiveness for enhancing photoresist and sample surfaces, to improve the success rate of sample photoetching.
9. a kind of gallium arsenide substrate mHEMT active area electric isolation method according to claim 1, it is characterised in that:
It after step 5, still further comprises, step 6, using probe station and with semiconductor test analyzer to the adjacent devices on sample
Electric isolation effect tested, and verify the process of the active area isolation effect.
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| CN108281352A (en) * | 2018-01-26 | 2018-07-13 | 成都海威华芯科技有限公司 | A kind of device isolation method applied to gallium nitride transistor |
| CN112557496B (en) * | 2020-11-20 | 2024-03-15 | 安徽中飞科技有限公司 | Preparation method and application of needle-shaped sample for glow discharge mass spectrum detection |
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| CN1326229A (en) * | 2000-05-31 | 2001-12-12 | 中国科学院半导体研究所 | Transistor with high electron mobility and its preparing process |
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| JP2005039169A (en) * | 2003-06-30 | 2005-02-10 | Matsushita Electric Ind Co Ltd | Hetero-junction bipolar transistor and manufacturing method thereof |
| JP4524298B2 (en) * | 2007-06-04 | 2010-08-11 | パナソニック株式会社 | Manufacturing method of semiconductor device |
| CN104637941B (en) * | 2015-02-04 | 2017-05-10 | 桂林电子科技大学 | Composite channel MHEMT (Metamorphic High Electron Mobility Transistor) microwave oscillator and preparation method thereof |
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| CN1326229A (en) * | 2000-05-31 | 2001-12-12 | 中国科学院半导体研究所 | Transistor with high electron mobility and its preparing process |
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