CN105068327A - 阵列基板及其制作方法、显示面板、显示装置 - Google Patents

阵列基板及其制作方法、显示面板、显示装置 Download PDF

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CN105068327A
CN105068327A CN201510591070.3A CN201510591070A CN105068327A CN 105068327 A CN105068327 A CN 105068327A CN 201510591070 A CN201510591070 A CN 201510591070A CN 105068327 A CN105068327 A CN 105068327A
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conductive layer
array base
base palte
testing cushion
underlay substrate
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王美旭
吴松
代超
李建辉
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Hefei Xinsheng Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
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    • G02F1/13378Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation
    • G02F1/133784Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation by rubbing
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136254Checking; Testing

Abstract

本发明提供了一种阵列基板及其制作方法、显示面板、显示装置,该阵列基板包括衬底基板以及形成在所述衬底基板上的测试垫和取向膜,所述测试垫的表面设置有沟槽,且所述沟槽的延伸方向与所述取向膜的摩擦取向方向一致。本发明提供的阵列基板,通过在测试垫的表面形成沟槽,在对取向膜摩擦取向时,能够减小对摩擦布的损伤,进而减少摩擦不良,同时提高摩擦布的寿命。

Description

阵列基板及其制作方法、显示面板、显示装置
技术领域
本发明涉及显示领域,尤其涉及一种阵列基板及其制作方法、显示面板、显示装置。
背景技术
液晶显示面板(TFT-LCD)具有显示质量高、功耗低、无辐射等优点,近几年发展十分迅速,并在各个领域得到了广泛的应用。
现有的液晶显示面板主要包括阵列基板、彩膜基板和液晶层,其中,在阵列基板的制作工艺中,通常需要对制作的阵列基板的各方面性能进行检测,例如,在检测阵列基板的电学性能时,为减少测试垫的数目,通常利用ShortingBar(短路布线)技术,然而,由于采用ShortingBar(短路布线)技术的测试垫通常面积比较大,且高度较高,在进行后续的取向膜摩擦工艺时,这些测试垫容易对摩擦布造成损伤,从而导致摩擦不良。
发明内容
(一)要解决的技术问题
本发明要解决的技术问题是:如何减小现有技术中阵列基板的测试垫对摩擦布造成的损害。
(二)技术方案
为解决上述技术问题,本发明的技术方案提供了一种阵列基板,包括衬底基板以及形成在所述衬底基板上的测试垫和取向膜,所述测试垫的表面设置有沟槽,且所述沟槽的延伸方向与所述取向膜的摩擦取向方向一致。
优选地,所述测试垫包括设置在所述衬底基板上的第一导电层、绝缘层和第二导电层,所述第二导电层通过所述绝缘层上的过孔与所述第一导电层电连接。
优选地,所述第一导电层包括多条相互平行的条状金属,所述绝缘层与所述第二导电层厚度均匀从而在所述测试垫的表面形成所述沟槽。
优选地,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括设置在所述衬底基板上的栅线、第一保护层、像素电极,所述第一导电层与所述栅线为相同材料并同层设置,所述绝缘层与所述第一保护层为相同材料并同层设置,所述第二导电层与所述像素电极为相同材料并同层设置。
优选地,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括设置在所述衬底基板上的数据线、第二保护层、像素电极,所述第一导电层与所述数据线为相同材料并同层设置,所述绝缘层与所述第二保护层为相同材料并同层设置,所述第二导电层与所述像素电极为相同材料并同层设置。
优选地,所述衬底基板上还设置有短路布线,所述测试垫与所述短路布线相连。
为解决上述技术问题,本发明还提供了一种显示面板,包括上述的阵列基板。
为解决上述技术问题,本发明还提供了一种显示装置,包括上述的显示面板。
为解决上述技术问题,本发明还提供了一种阵列基板的制作方法,包括:
在衬底基板上形成测试垫,所述测试垫的表面形成有沟槽;
在所述衬底基板上形成取向膜,所述取向膜的摩擦取向方向与所述沟槽的延伸方向一致。
优选地,所述在衬底基板上形成测试垫包括:
在所述衬底基板上形成第一导电层,所述第一导电层包括多条相互平行的条状金属;
在所述第一导电层上形成厚度均匀的绝缘层和厚度均匀的第二导电层,所述第二导电层通过所述绝缘层上的过孔与所述第一导电层电连接。
优选地,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括形成在所述衬底基板上的栅线、第一保护层、像素电极,所述第一导电层与所述栅线在一次构图工艺中同时形成,所述绝缘层与所述第一保护层在一次构图工艺中同时形成,所述第二导电层与所述像素电极在一次构图工艺中同时形成。
优选地,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括形成在所述衬底基板上的数据线、第二保护层、像素电极,所述第一导电层与所述数据线在一次构图工艺中同时形成,所述绝缘层与所述第二保护层在一次构图工艺中同时形成,所述第二导电层与所述像素电极在一次构图工艺中同时形成。
(三)有益效果
本发明提供的阵列基板,通过在测试垫的表面形成沟槽,在对取向膜摩擦取向时,能够减小对摩擦布的损伤,进而减少摩擦不良,同时提高摩擦布的寿命。
附图说明
图1是本发明实施方式提供的一种阵列基板的示意图;
图2是图1中的测试垫的俯视图;
图3是本发明实施方式提供的另一种阵列基板的示意图;
图4是图3中的测试垫的俯视图。
具体实施方式
下面结合附图和实施例,对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明,但不用来限制本发明的范围。
图1是本发明实施方式提供的一种阵列基板,该阵列基板包括衬底基板100以及形成在所述衬底基板100上的测试垫200和取向膜,其中,所述测试垫200的表面设置有沟槽210,且所述沟槽210的延伸方向与所述取向膜的摩擦取向方向一致;
参见图2,图2是图1中的测试垫的俯视图,在该测试垫的表面上设置有多个相互平行的条状凸起220,通过使条状凸起220的延伸方向与取向膜的摩擦方向相一致,从而使得相邻两个凸起220之间的沟槽的延伸方向与取向膜的摩擦方向相一致。
本发明实施方式提供的阵列基板,通过在测试垫的表面形成沟槽,在对取向膜摩擦取向时,能够减小对摩擦布的损伤,进而减少摩擦不良,同时提高摩擦布的寿命。
为形成上述形状的测试垫,可以首先在衬底基板上形成一层较厚的导电薄膜,再采用构图工艺对该导电薄膜部分区域上部分的厚度进行刻蚀,从而在其表面形成所需的沟槽,优选地,由于测试垫通常形成在阵列基板的非显示区域,为减少该阵列基板的构图工艺次数,上述测试垫可以在制作阵列基板显示区域上的层结构图案的同时制作得到。
参见图3,图3是本发明实施方式提供的另一种阵列基板的示意图,该阵列基板包括衬底基板100以及形成在衬底基板100上的测试垫和取向膜;
其中,该测试垫包括设置在衬底基板100上的第一导电层201、绝缘层202和第二导电层203,第二导电层203通过绝缘层202上的过孔与第一导电层201电连接;
如图4所示,第一导电层201包括多条相互平行的条状金属2011,绝缘层202上与条状金属2011对应的位置上开设有过孔2021,使得第二导电层203能够通过过孔2021与第一导电层201电连接;
在该测试垫中,由于条状金属2011的延伸方向与取向膜的摩擦方向相一致,且绝缘层202与第二导电层203在各处厚度均匀,从而能够在该测试垫的表面形成延伸方向与取向膜的摩擦方向一致的沟槽。
例如,对于TN模式的阵列基板,其显示区域包括设置在衬底基板上的栅极(与栅线同层)、第一保护层(即栅绝缘层)、有源层、源漏极(与数据线同层)、第二保护层(即钝化层)、像素电极;
当上述的测试垫用于测试阵列基板显示区域上的栅线时,该测试垫连接至对应于栅线的ShortingBar(短路布线),则对于上述结构的测试垫,其第一导电层与显示区域的栅线相连,且两者为相同材料并同层设置,其绝缘层与显示区域的第一保护层为相同材料并同层设置,其第二导电层与显示区域的像素电极为相同材料并同层设置;
当上述的测试垫用于测试阵列基板显示区域上的数据线时,该测试垫连接至对应于数据线的ShortingBar(短路布线),则对于上述的测试垫,第一导电层与所述数据线相连,且两者为相同材料并同层设置,绝缘层与所述第二保护层为相同材料并同层设置,第二导电层与像素电极为相同材料并同层设置。
本发明还提供了一种显示面板,包括上述的阵列基板。
本发明还提供了一种显示装置,包括上述的显示面板。其中,本发明实施方式提供的显示装置可以是笔记本电脑显示屏、液晶显示器、液晶电视、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
本发明实施方式还提供了一种阵列基板的制作方法,包括:
在衬底基板上形成测试垫,所述测试垫的表面形成有沟槽;
在所述衬底基板上形成取向膜,所述取向膜的摩擦取向方向与所述沟槽的延伸方向一致。
优选地,所述在衬底基板上形成测试垫包括:
在所述衬底基板上形成第一导电层,所述第一导电层包括多条相互平行的条状金属;
在所述第一导电层上形成厚度均匀的绝缘层和厚度均匀的第二导电层,所述第二导电层通过所述绝缘层上的过孔与所述第一导电层电连接。
例如,对于TN模式的阵列基板,其显示区域包括设置在衬底基板上的栅极(与栅线同层)、第一保护层(即栅绝缘层)、有源层、源漏极(与数据线同层)、第二保护层(即钝化层)、像素电极,在制作该结构的阵列基板过程中,可以在阵列基板显示区域制作上述层结构图案的同时制作测试垫;
例如,可以在阵列基板的显示区域制作栅线、第一保护层、像素电极的同时,在其非显示区域制作用于测试栅线的测试垫,使其第一导电层与栅线在一次构图工艺中同时形成,绝缘层与第一保护层在一次构图工艺中同时形成,第二导电层与像素电极在一次构图工艺中同时形成;
可以在阵列基板的显示区域制作数据线、第二保护层、像素电极的同时,在其非显示区域制作用于测试数据线的测试垫,使其第一导电层与数据线在一次构图工艺中同时形成,绝缘层与第二保护层在一次构图工艺中同时形成,第二导电层与像素电极在一次构图工艺中同时形成。
此外,在上述的测试垫制作过程中,可以尽量将第一导电层中的条状金属的宽度减小,使其数量增多,从而对摩擦效果有更好的保证,另外,还可以根据具体情况增加测试垫的面积,以弥补由于设置沟槽而造成与其他结构接触面积的减少。
本发明实施方式提供的阵列基板的制作方法,通过在测试垫的表面形成沟槽,在对取向膜摩擦取向时,通过沟槽可以容纳被挤压的摩擦布毛,从而减小摩擦布毛向的影响程度,进而减少摩擦不良,同时提高摩擦布的寿命。
以上实施方式仅用于说明本发明,而并非对本发明的限制,有关技术领域的普通技术人员,在不脱离本发明的精神和范围的情况下,还可以做出各种变化和变型,因此所有等同的技术方案也属于本发明的范畴,本发明的专利保护范围应由权利要求限定。

Claims (12)

1.一种阵列基板,包括衬底基板以及形成在所述衬底基板上的测试垫和取向膜,其特征在于,所述测试垫的表面设置有沟槽,且所述沟槽的延伸方向与所述取向膜的摩擦取向方向一致。
2.根据权利要求1所述的阵列基板,其特征在于,所述测试垫包括设置在所述衬底基板上的第一导电层、绝缘层和第二导电层,所述第二导电层通过所述绝缘层上的过孔与所述第一导电层电连接。
3.根据权利要求2所述的阵列基板,其特征在于,所述第一导电层包括多条相互平行的条状金属,所述绝缘层与所述第二导电层厚度均匀从而在所述测试垫的表面形成所述沟槽。
4.根据权利要求3所述的阵列基板,其特征在于,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括设置在所述衬底基板上的栅线、第一保护层、像素电极,所述第一导电层与所述栅线为相同材料并同层设置,所述绝缘层与所述第一保护层为相同材料并同层设置,所述第二导电层与所述像素电极为相同材料并同层设置。
5.根据权利要求3所述的阵列基板,其特征在于,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括设置在所述衬底基板上的数据线、第二保护层、像素电极,所述第一导电层与所述数据线为相同材料并同层设置,所述绝缘层与所述第二保护层为相同材料并同层设置,所述第二导电层与所述像素电极为相同材料并同层设置。
6.根据权利要求1-5任一所述的阵列基板,其特征在于,所述衬底基板上还设置有短路布线,所述测试垫与所述短路布线相连。
7.一种显示面板,其特征在于,包括权利要求1-6任一所述的阵列基板。
8.一种显示装置,其特征在于,包括权利要求7所述的显示面板。
9.一种阵列基板的制作方法,其特征在于,包括:
在衬底基板上形成测试垫,所述测试垫的表面形成有沟槽;
在所述衬底基板上形成取向膜,所述取向膜的摩擦取向方向与所述沟槽的延伸方向一致。
10.根据权利要求9所述的阵列基板的制作方法,其特征在于,所述在衬底基板上形成测试垫包括:
在所述衬底基板上形成第一导电层,所述第一导电层包括多条相互平行的条状金属;
在所述第一导电层上形成厚度均匀的绝缘层和厚度均匀的第二导电层,所述第二导电层通过所述绝缘层上的过孔与所述第一导电层电连接。
11.根据权利要求10所述的阵列基板的制作方法,其特征在于,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括形成在所述衬底基板上的栅线、第一保护层、像素电极,所述第一导电层与所述栅线在一次构图工艺中同时形成,所述绝缘层与所述第一保护层在一次构图工艺中同时形成,所述第二导电层与所述像素电极在一次构图工艺中同时形成。
12.根据权利要求10所述的阵列基板的制作方法,其特征在于,所述测试垫形成在所述阵列基板的非显示区域,所述阵列基板的显示区域包括形成在所述衬底基板上的数据线、第二保护层、像素电极,所述第一导电层与所述数据线在一次构图工艺中同时形成,所述绝缘层与所述第二保护层在一次构图工艺中同时形成,所述第二导电层与所述像素电极在一次构图工艺中同时形成。
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