CN105047762A - Process for manufacturing gallium arsenide solar cell - Google Patents
Process for manufacturing gallium arsenide solar cell Download PDFInfo
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- CN105047762A CN105047762A CN201510533948.8A CN201510533948A CN105047762A CN 105047762 A CN105047762 A CN 105047762A CN 201510533948 A CN201510533948 A CN 201510533948A CN 105047762 A CN105047762 A CN 105047762A
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- solar cell
- battery
- gallium arsenide
- preparation technology
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- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 39
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title abstract description 3
- 229910052751 metal Inorganic materials 0.000 claims abstract description 36
- 239000002184 metal Substances 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000001465 metallisation Methods 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 15
- 238000005520 cutting process Methods 0.000 claims abstract description 7
- 238000005530 etching Methods 0.000 claims abstract description 4
- 238000005516 engineering process Methods 0.000 claims description 27
- 238000002360 preparation method Methods 0.000 claims description 19
- 239000006117 anti-reflective coating Substances 0.000 claims description 16
- 238000001259 photo etching Methods 0.000 claims description 15
- 238000001704 evaporation Methods 0.000 claims description 11
- 230000008020 evaporation Effects 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 230000004888 barrier function Effects 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 238000005260 corrosion Methods 0.000 claims description 7
- 230000007797 corrosion Effects 0.000 claims description 7
- 238000009713 electroplating Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 13
- 230000017525 heat dissipation Effects 0.000 abstract description 2
- 239000007888 film coating Substances 0.000 abstract 1
- 238000009501 film coating Methods 0.000 abstract 1
- 210000004027 cell Anatomy 0.000 description 30
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 12
- 239000008367 deionised water Substances 0.000 description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 8
- 238000004140 cleaning Methods 0.000 description 7
- 229910021641 deionized water Inorganic materials 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- 230000003667 anti-reflective effect Effects 0.000 description 6
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 239000010931 gold Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 230000001795 light effect Effects 0.000 description 3
- 238000001579 optical reflectometry Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000034303 cell budding Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0687—Multiple junction or tandem solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0693—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells the devices including, apart from doping material or other impurities, only AIIIBV compounds, e.g. GaAs or InP solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/544—Solar cells from Group III-V materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a process for manufacturing a gallium arsenide solar cell, and relates to the technical field of solar cells. The process comprises the following steps: growth of a multi-junction solar cell material, front metallization, front metal mesa etching, antireflection film coating, substrate reduction, back metallization, back electrocoppering, a front cutting process and a lead bonding process. The solar cell manufactured by the process has the characteristics of small thickness, good flexibility, good heat dissipation, high photoelectric conversion efficiency, fastness and reliability.
Description
Technical field
The present invention relates to technical field of solar batteries, particularly relate to a kind of gallium arsenide solar cell preparation technology.
Background technology
Solar cell is also called " solar chip " or " photocell ", is a kind of optoelectronic semiconductor thin slice utilizing the sunlight direct generation of electricity.As long as it is arrived by illumination, moment just exportable voltage and when there being loop generation current.Physically be called photovoltaic (Photovoltaic, photo light, voltaics volt, is abbreviated as PV), be called for short photovoltaic.
Solar cell is the device directly light energy conversion being become electric energy by photoelectric effect or Photochemical effects.With the thin-film type solar cell of photoelectric effect work for main flow, be then also in the budding stage with the enforcement solar cell of Photochemical effects work.Data show 2012, and China's solar cell continues to keep output and superiority of effectiveness, and international competitiveness more strengthens.Along with the development of solar cell industry, interior industry competition is also in continuous aggravation, between large-sized solar battery enterprise M&A integration and capital operation increased, domestic outstanding manufacture of solar cells enterprise more and more payes attention to the research to industry market, particularly to the further investigation of industrial development environment and buyers.Just because of this, large quantities of domestic outstanding solar cell brand emerges rapidly, becomes the outstanding figure in solar cell industry gradually.
Current silicon solar cell is mainly used in ground, and the higher gallium arsenide solar cell of the conversion efficiency that generates electricity is mainly used in space, they are all rigid structures, but need the solar cell of high efficiency flexibility in some specific occasions (as fields such as unmanned plane, dirigible, wearable electronic products).
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of gallium arsenide solar cell preparation technology, and it is thin that the solar cell prepared by described technique has thickness, flexible, good heat dissipation, and photoelectric conversion efficiency is high, solid and reliable feature.
For solving the problems of the technologies described above, the technical solution used in the present invention is: a kind of gallium arsenide solar cell preparation technology, is characterized in that comprising the steps:
The growth of multijunction solar cell material: growth substrates layer, the first battery knot, the first tunnel junction, the second battery knot, the second tunnel junction, the 3rd battery knot, N tunnel junction, N+1 battery are tied respectively from bottom to top, the like and contact layer, battery knot between be communicated with by tunnel junction, wherein N be greater than 2 natural number;
Front-side metallization: erode the contact layer beyond metal electrode by photoetching process, the contact layer upper surface after corrosion forms ohmic contact metal layer by evaporation technology;
Front metal mesa etch: by carrying out photoetching and etching process to ohmic contact metal layer, forms dicing lane, forms the metal electrode be separated between dicing lane with dicing lane;
Antireflective coating applies: the upper surface outside metal electrode forms antireflective coating;
Substrate thinning: by substrate thinning to desired thickness;
Back face metalization: the lower surface of the substrate after thinning forms back face metalization layer;
Back side electro-coppering: the lower surface of metal layer forms copper base layer by electroplating technology overleaf.
Further technical scheme is: described preparation technology also comprises front cutting technique: use cutting machine to cut along dicing lane, depth of cut is as the criterion with 5 microns-10 microns that cut copper base layer, cell piece is cut into independently battery.
Further technical scheme is: described preparation technology also comprises lead key closing process: carry out connection in series-parallel technique with on the electrode of bonding wire battery upper surface after isolation.
Further technical scheme is: described substrate layer uses GaAs or Ge.
Further technical scheme is: described battery knot is Window layer, battery knot layer and barrier layer from top to bottom, and the making material of described Window layer is N-In
xga
(1-x)p, the making material of described barrier layer is P-In
xga
(1-x)p, 0<x<1.
Further technical scheme is: described battery knot layer is double-layer structure, and upper strata is N-GaAs layer, and lower floor is P-GaAs layer; Or described battery knot layer is double-layer structure, and upper strata is N-In
xga
(1-x)as layer, lower floor is P-In
xga
(1-x)as layer, 0<x<1; Or described battery knot layer is double-layer structure, and upper strata is N-In
xga
(1-x)p layer, lower floor is P-In
xga
(1-x)p layer, 0<x<1.
Further technical scheme is: double-layer structure is become in described tunnel, and upper strata is P
++-GaAs layer, lower floor is N
++-GaAs layer; Or double-layer structure is become in described tunnel, upper strata is P
++-Al
xga
(1-x)as layer, lower floor is N
++-In
xga
(1-x)p layer.
Further technical scheme is: described ohmic contact metal layer is three-decker, is followed successively by AuGeNi layer, Ag layer and Au layer from top to bottom.
Further technical scheme is: described antireflective coating is double-layer structure, and upper strata is T
io
2layer, lower floor is S
io
2.
Further technical scheme is: described back face metalization layer is three-layer metal structure, is followed successively by Ti layer, Ag layer and Au layer from top to bottom.
The beneficial effect adopting technique scheme to produce is: the present invention adopts multiple GaAs battery to tie, and improves photoelectric conversion efficiency, reduces the thickness of battery; Owing to improve the photoelectric conversion efficiency of battery, reduce the thickness of battery, effectively reduce the weight of battery, substantially increase the pliability of battery.Adopt the good Cu of conductivity as substrate, greatly reduce process costs, also improve rate of finished products simultaneously.Adopt T
io
2and S
io
2material, as antireflective coating, can obtain good antireflective light effect, effectively reduce the light reflectivity of battery surface, make the gain of short circuit current reach the highest in 400nm-1200nm wavelength band, improves the photoelectric conversion efficiency of product.
Accompanying drawing explanation
Fig. 1 is the structural representation of solar cell described in the embodiment of the present invention;
Fig. 2 is the structural representation of metal electrode in the embodiment of the present invention;
Fig. 3 is the reflectance map of solar cell surface described in the embodiment of the present invention;
Wherein: 1, substrate layer 2, first battery knot 3, first tunnel junction 4, second battery knot the 5, second tunnel junction 6, the 3rd battery knot 7, contact layer 8, ohmic contact metal layer 9, antireflective coating 10, back face metalization layer 11, copper base layer 12, Window layer 13, battery knot layer 14, barrier layer.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Set forth a lot of detail in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here to implement, those skilled in the art can when without prejudice to doing similar popularization when intension of the present invention, therefore the present invention is by the restriction of following public specific embodiment.
The invention discloses a kind of gallium arsenide solar cell preparation technology, comprise the steps:
The growth of multijunction solar cell material: growth substrates layer 1, first battery knot 2, first tunnel junction 3, second battery knot the 4, second tunnel junction 5, the 3rd battery knot 6, N tunnel junction, N+1 battery are tied respectively from bottom to top, the like and contact layer 7, be communicated with by tunnel junction between battery knot, wherein N be greater than 2 natural number, multiple GaAs battery is adopted to tie, improve photoelectric conversion efficiency, reduce the thickness of battery; Owing to improve the photoelectric conversion efficiency of battery, reduce the thickness of battery, effectively reduce the weight of battery, substantially increase the pliability of battery;
Front-side metallization: erode the contact layer 7 beyond metal electrode by photoetching process, contact layer 7 upper surface after corrosion forms ohmic contact metal layer 8 by evaporation technology;
Front metal mesa etch: by carrying out photoetching and etching process to ohmic contact metal layer 8, forms dicing lane, forms the metal electrode be separated between dicing lane with dicing lane;
Antireflective coating applies: the upper surface outside metal electrode forms antireflective coating 9, antireflective coating can obtain good antireflective light effect in 400nm-1200nm wavelength band, effectively reduce the light reflectivity of battery surface, make the gain of short circuit current reach the highest, improve the photoelectric conversion efficiency of product;
Substrate thinning: substrate 1 is thinned to desired thickness;
Back face metalization: the lower surface of the substrate 1 after thinning forms back face metalization layer 10;
Back side electro-coppering: the lower surface of metal layer 10 forms copper base layer 11 by electroplating technology overleaf, adopts the good Cu of conductivity as substrate, greatly reduces process costs, also improve rate of finished products simultaneously.
(1) growth of the multijunction solar cell material described in the present embodiment is specially three-junction gallium arsenide solar battery epitaxial wafer, can certainly be two knots, four knots or more junction gallium arsenide solar cell.In the present embodiment, thickness is selected to be the three-junction gallium arsenide solar energy epitaxial wafer of 355um ± 5um.
The growth of multijunction solar cell material: growth substrates layer 1, first battery knot 2, first tunnel junction 3, second battery knot the 4, second tunnel junction 5, the 3rd battery tie 6 and contact layer 7 respectively from bottom to top, are communicated with between battery knot by tunnel junction.
Described battery knot is Window layer 12, battery knot layer 13 and barrier layer 14 from top to bottom, and the making material of described Window layer 12 is N-In
xga
(1-x)p, the making material of described barrier layer 14 is P-In
xga
(1-x)p, 0<x<1.
Described battery knot layer 13 is double-layer structure, and upper strata is N-GaAs layer, and lower floor is P-GaAs layer; Or described battery knot layer 13 is double-layer structure, and upper strata is N-In
xga
(1-x)as layer, lower floor is P-In
xga
(1-x)as layer, 0<x<1; Or described battery knot layer 13 is double-layer structure, and upper strata is N-In
xga
(1-x)p layer, lower floor is P-In
xga
(1-x)p layer, 0<x<1.Double-layer structure is become in described tunnel, and upper strata is P
++-GaAs layer, lower floor is N
++-GaAs layer; Or double-layer structure is become in described tunnel, upper strata is P
++-Al
xga
(1-x)as layer, lower floor is N
++-In
xga
(1-x)p layer.
(2) front-side metallization: epitaxial wafer is put into glue spreader, at sensitive surface (upper surface of contact layer 7) evenly coating RZJ-390 photoresist.Baking 1 minute above the hot plate being placed on 100 degree, according to the good photolithography plate of the graphic making of Fig. 2, carry out photoetching by mask aligner to sensitive surface, the photoetching time is 5s-8s.Then the epitaxial wafer that photoetching is good being put into developer solution develops after 40s-60s, cleaning 3 minutes inside the deionized water of flowing.Sheet sub-surface is dried up by nitrogen gun, baking 1 minute above the hot plate being placed on 120 degree after cleaning.Then NH is used
4oH:H
2o
2: H
2after the corrosive liquid corrosion 90s of O=1:1:20, in the deionized water of flowing, cleaning 3 minutes, removes the photoresist on sensitive surface surface with acetone.
Contact layer (is used N
++-In
xga
(1-x)as material) epitaxial wafer that corrodes puts into glue spreader, evenly applies photoresist at sensitive surface, baking 2 minutes above the hot plate being placed on 150 degree.According to the good photolithography plate of the graphic making of Fig. 2, by mask aligner, photoetching is carried out to sensitive surface, the photoetching time is 5s-9s, then baking 1 minute above the hot plate epitaxial wafer that photoetching is good being placed on 100 degree, putting into developer solution develops after 40s-60s, inside the deionized water of flowing, cleaning 3 minutes, dries up sheet sub-surface by nitrogen gun, and corrosion washes the impurity in the upper grid line groove of contact layer (sensitive surface) of epitaxial wafer.
Epitaxial wafer is put into the evaporator of automatic evaporation, feed in the crucible and tungsten boat of equipment, at the Au of sensitive surface Ag and 100nm of AuGeNi, 5000nm of evaporation thickness 150nm successively of epitaxial wafer, form ohmic contact metal layer.After evaporation completes, epitaxial wafer is taken out and puts into acetone immersion 15 minutes, ultrasonic 1 minute.Then by the washed with de-ionized water 3 minutes of flowing, sheet sub-surface is dried up by nitrogen gun.After removing photoresist, the ohmic contact metal layer of the sensitive surface of epitaxial wafer is formed the metal electrode of several interconnected shapes as shown in Figure 2.
(3) front metal mesa etch: the epitaxial wafer having formed metal electrode is put into glue spreader, RZJ-390 photoresist is evenly applied at sensitive surface, baking 1 minute above the hot plate being placed on 100 degree, by mask aligner, photoetching is carried out to sensitive surface, the photoetching time is 7-10s, then the epitaxial wafer that photoetching is good being put into developer solution develops after 40s-60s, cleaning 3 minutes inside the deionized water of flowing, sheet sub-surface is dried up by nitrogen gun, baking 2 minutes above the hot plate being placed on 120 degree, after corroding 10 minutes with corrosive liquid, cleaning 3 minutes in the deionized water of flowing, sheet sub-surface is dried up by nitrogen gun.After etched mesa, interconnected metal electrode forms dicing lane, between dicing lane with dicing lane, form the metal electrode be separated;
(4) antireflective coating coating: the battery after corrosion is put on the evaporation disc in evaporator, by T
io
2and S
io
2put into crucible respectively, close door for vacuum chamber, vacuum degree is run to evaporator and is greater than 1.0E-4Pa, at the SiO2 of TiO2 and 90nm of the upper surface priority evaporation 60nm of epitaxial wafer.To the reflectance test of battery surface, obtain good anti-reflective effect shown in Fig. 3, curve is wherein the anti-reflective effect curve of the solar cell not having antireflective coating, and the curve is wherein the anti-reflective effect curve of the solar cell with antireflective coating.Antireflective coating on metal electrode is removed by the process repeating (3) by the epitaxial wafer after evaporation, exposes the surface of gold.
(5) substrate thinning: epitaxial wafer is put into the thinning GaAs substrate of grinder or Ge substrate to certain thickness, about 100 microns.Then NH is used
4oH:H
2o
2the solution polished substrate of=1:8, controls substrate thickness to 50 micron-100 microns according to its corrosion rate.
(6) back face metalization: the epitaxial wafer after thinning clean in acetone 3 minutes, put into isopropyl alcohol cleaning 3 minutes, with deionized water rinsing 3 minutes, remove the spot on surface.Put into HCl:H afterwards
2clean 1 minute in the solution of O=1:1, then use deionized water rinsing 3 minutes, remove the oxide layer on surface.
Epitaxial wafer clean for surface clean is put into the evaporator of automatic evaporation, feed in the crucible of equipment, at the Au at the back side (lower surface of substrate) of epitaxial wafer successively Ag and 60nm of Ti, 1000nm of evaporation thickness 100nm; Take out epitaxial wafer alloy in alloying furnace, temperature 350-450 DEG C, 60 seconds-100 seconds time.
(7) back side electro-coppering: epitaxial wafer front is coated photoresist RZJ-390 photoresist, baking 1 minute above the hot plate being placed on 100 degree.
Estrade epitaxial wafer being put into electro-coppering is electroplated, thickness 20 microns-50 microns.Epitaxial wafer is taken out and puts into acetone immersion 15 minutes, ultrasonic 1 minute.Then by the washed with de-ionized water 3 minutes of flowing, dry up sheet sub-surface by nitrogen gun, the solar battery structure of making as shown in Figure 1.
(8) front cutting: use cutting machine to cut along dicing lane, depth of cut is as the criterion with 3 microns-5 microns that cut copper base layer, cell piece is cut into independently battery.
(9) wire bonding: carry out connection in series-parallel technique with on the electrode of bonding wire battery upper surface after isolation, the composition of described solar cell is as shown in table 1.
The present invention adopts multiple GaAs battery to tie, and improves photoelectric conversion efficiency, reduces the thickness of battery; Owing to improve the photoelectric conversion efficiency of battery, reduce the thickness of battery, effectively reduce the weight of battery, substantially increase the pliability of battery.Adopt the good Cu of conductivity as substrate, greatly reduce process costs, also improve rate of finished products simultaneously.Adopt T
io
2and S
io
2material, as antireflective coating, can obtain good antireflective light effect, effectively reduce the light reflectivity of battery surface, make the gain of short circuit current reach the highest in 400nm-1200nm wavelength band, improves the photoelectric conversion efficiency of product.
Claims (10)
1. a gallium arsenide solar cell preparation technology, is characterized in that comprising the steps:
The growth of multijunction solar cell material: growth substrates layer (1), the first battery knot (2), the first tunnel junction (3), the second battery knot (4), the second tunnel junction (5), the 3rd battery knot (6), N tunnel junction, N+1 battery are tied respectively from bottom to top, the like and contact layer (7), battery knot between be communicated with by tunnel junction, wherein N be greater than 2 natural number;
Front-side metallization: erode the contact layer (7) beyond metal electrode by photoetching process, contact layer (7) upper surface after corrosion forms ohmic contact metal layer (8) by evaporation technology;
Front metal mesa etch: by carrying out photoetching and etching process to ohmic contact metal layer (8), forms dicing lane, forms the metal electrode be separated between dicing lane with dicing lane;
Antireflective coating applies: the upper surface outside metal electrode forms antireflective coating (9);
Substrate thinning: substrate (1) is thinned to desired thickness;
Back face metalization: the lower surface of the substrate (1) after thinning forms back face metalization layer (10);
Back side electro-coppering: the lower surface of metal layer (10) forms copper base layer (11) by electroplating technology overleaf.
2. gallium arsenide solar cell preparation technology as claimed in claim 1, it is characterized in that described preparation technology also comprises front cutting technique: use cutting machine to cut along dicing lane, depth of cut is as the criterion with 5 microns-10 microns that cut copper base layer (11), cell piece is cut into independently battery.
3. gallium arsenide solar cell preparation technology as claimed in claim 2, is characterized in that described preparation technology also comprises lead key closing process: carry out connection in series-parallel technique with the upper and lower surface of bonding wire battery after isolation.
4. gallium arsenide solar cell preparation technology as claimed in claim 1, is characterized in that: described substrate layer (1) uses GaAs or Ge.
5. gallium arsenide solar cell preparation technology as claimed in claim 1, is characterized in that: described battery knot is Window layer (12), battery knot layer (13) and barrier layer (14) from top to bottom, and the making material of described Window layer (12) is N-In
xga
(1-x)p, the making material of described barrier layer (14) is P-In
xga
(1-x)p, 0<x<1.
6. gallium arsenide solar cell preparation technology as claimed in claim 5, is characterized in that: described battery knot layer (13) is double-layer structure, and upper strata is N-GaAs layer, and lower floor is P-GaAs layer; Or described battery knot layer (13) is double-layer structure, and upper strata is N-In
xga
(1-x)as layer, lower floor is P-In
xga
(1-x)as layer, 0<x<1; Or described battery knot layer (13) is double-layer structure, and upper strata is N-In
xga
(1-x)p layer, lower floor is P-In
xga
(1-x)p layer, 0<x<1.
7. gallium arsenide solar cell preparation technology as claimed in claim 1, it is characterized in that: double-layer structure is become in described tunnel, upper strata is P
++-GaAs layer, lower floor is N
++-GaAs layer; Or double-layer structure is become in described tunnel, upper strata is P
++-Al
xga
(1-x)as layer, lower floor is N
++-In
xga
(1-x)p layer.
8. gallium arsenide solar cell preparation technology as claimed in claim 1, is characterized in that: described ohmic contact metal layer (8) is three-decker, is followed successively by AuGeNi layer, Ag layer and Au layer from top to bottom.
9. gallium arsenide solar cell preparation technology as claimed in claim 1, it is characterized in that: described antireflective coating (9) is double-layer structure, upper strata is T
io
2layer, lower floor is S
io
2.
10. gallium arsenide solar cell preparation technology as claimed in claim 1, is characterized in that: described back face metalization layer (10) is three-layer metal structure, is followed successively by Ti layer, Ag layer and Au layer from top to bottom.
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| CN105552140A (en) * | 2016-01-29 | 2016-05-04 | 扬州乾照光电有限公司 | High-specific-power GaAs multi-junction flexible thin film solar cell and preparation method therefor |
| CN110120438A (en) * | 2018-02-05 | 2019-08-13 | 中国科学院苏州纳米技术与纳米仿生研究所 | The preparation method of solar battery based on metal flexible substrate |
| CN110634989A (en) * | 2019-08-22 | 2019-12-31 | 江苏润阳悦达光伏科技有限公司 | Manufacturing method of thin-film solar cell |
| CN110828581A (en) * | 2018-08-09 | 2020-02-21 | 中国科学院苏州纳米技术与纳米仿生研究所 | Flexible solar cell and manufacturing method thereof |
| CN112071961A (en) * | 2020-11-13 | 2020-12-11 | 南昌凯迅光电有限公司 | Battery substrate thinning method and battery |
| CN112366243A (en) * | 2019-07-25 | 2021-02-12 | 江苏宜兴德融科技有限公司 | Four-junction flexible solar cell and preparation method thereof |
| CN112599613A (en) * | 2020-12-16 | 2021-04-02 | 中国电子科技集团公司第十八研究所 | Preparation method of gallium arsenide solar cell electrode combined with germanium and used in space |
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| CN105552140A (en) * | 2016-01-29 | 2016-05-04 | 扬州乾照光电有限公司 | High-specific-power GaAs multi-junction flexible thin film solar cell and preparation method therefor |
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| CN112366243A (en) * | 2019-07-25 | 2021-02-12 | 江苏宜兴德融科技有限公司 | Four-junction flexible solar cell and preparation method thereof |
| CN112366243B (en) * | 2019-07-25 | 2022-07-12 | 江苏宜兴德融科技有限公司 | Four-junction flexible solar cell and preparation method thereof |
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| CN112071961A (en) * | 2020-11-13 | 2020-12-11 | 南昌凯迅光电有限公司 | Battery substrate thinning method and battery |
| CN112599613A (en) * | 2020-12-16 | 2021-04-02 | 中国电子科技集团公司第十八研究所 | Preparation method of gallium arsenide solar cell electrode combined with germanium and used in space |
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