CN105025659A - Method for improving wire dropping of punching dielectric layer of light bar plate - Google Patents
Method for improving wire dropping of punching dielectric layer of light bar plate Download PDFInfo
- Publication number
- CN105025659A CN105025659A CN201510383704.6A CN201510383704A CN105025659A CN 105025659 A CN105025659 A CN 105025659A CN 201510383704 A CN201510383704 A CN 201510383704A CN 105025659 A CN105025659 A CN 105025659A
- Authority
- CN
- China
- Prior art keywords
- dielectric layer
- punching
- lamp batten
- layer falls
- improve
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention discloses a method for improving the wire dropping of a punching dielectric layer of a light bar plate, and the method comprises the steps: A, carrying out circuit film design on the light bar plate, wherein a waste edge is prepared in a mode of copper laying; B, enabling a circuit to be manufactured through miniature etching and washing of the plate, dry film pasting, alignment, exposure and etching; C, carrying out solder mask film design, enabling the waste edge to be covered by solder mask ink, and enabling the waste edge to achieve windowing without soldering resistance; E, manufacturing a solder mask through printing, pre-baking, alignment, exposure, development, and post-baking; F, carrying out the punching of the light bar plate. According to the invention, the circuit waste edge is manufactured in a mode of copper laying, thereby improving the hardness of the waste edge, enabling the wire dropping to be improved greatly, and reducing the risk of crushed scraping caused by that a dielectric layer falls to a desk top.
Description
Technical field
The present invention relates to printed wiring board manufacture technology field, particularly relate to and a kind ofly improve the method that lamp batten punching dielectric layer falls silk.
Background technology
Along with the progress of modern science and technology, LCD TV is towards thinner, wider future development, and this just means that the size of lamp batten will be more and more longer.Due to lamp batten longer dimension, take gong plate mode shaping not only time-consuming, and finished size is difficult to control.And take the shaping not only efficiency of the mode of punching high, and quality can well be ensured.But lamp batten easily occurs that in the process of punching dielectric layer falls the problem of silk, if cleaning is unclean, then there is the risk causing circuit surface to weigh wounded.
Therefore, prior art has yet to be improved and developed.
Summary of the invention
In view of above-mentioned the deficiencies in the prior art, the object of the present invention is to provide and a kind ofly improve the method that lamp batten punching dielectric layer falls silk, be intended to solve lamp batten in prior art in punching process, easily fall the problem of silk.
Technical scheme of the present invention is as follows:
Improve the method that lamp batten punching dielectric layer falls silk, wherein, comprise step:
A, in the design of the lamp batten enterprising row line film, wherein waste material limit adopts paving copper mode to make;
B, to be washed plate by microetch, paste dry film, contraposition, exposure and etch processes, circuit is made;
C, the anti-welding film design, and waste material limit is lid anti-solder ink all, makes the without hindrance unsolder window in waste material limit;
E, by printing, pre-baked, contraposition, exposure, development and rear roasting process, to make anti-welding;
F, punching is carried out to lamp batten.
Described improvement lamp batten punching dielectric layer falls the method for silk, and wherein, microetch washes the travelling speed 2800mm/min of plate.
Described improvement lamp batten punching dielectric layer falls the method for silk, and wherein, pre-baked temperature is 75 DEG C, and the time is 35min.
Described improvement lamp batten punching dielectric layer falls the method for silk, and wherein, developing powder is 3500mm/min.
Described improvement lamp batten punching dielectric layer falls the method for silk, and wherein, the speed of pasting dry film is 3m/min.
Described improvement lamp batten punching dielectric layer falls the method for silk, and wherein, rear roasting temperature is 150 DEG C, and the time is 60min.
Described improvement lamp batten punching dielectric layer falls the method for silk, wherein, and copper paving area little 0.04mm more monolateral than waste material limit.
Beneficial effect: circuit waste material limit takes paving copper mode to make by the present invention, adds waste material limit hardness, a problem is greatly improved, what reduce that dielectric layer drops that table top causes weighs the risk of scrapping wounded.
Accompanying drawing explanation
To be that the present invention is a kind of improve the flow chart that lamp batten punching dielectric layer falls the method preferred embodiment of silk to Fig. 1.
Fig. 2 is the structural representation of the lamp batten that method of the present invention makes.
Embodiment
The invention provides and a kind ofly improve the method that lamp batten punching dielectric layer falls silk, for making object of the present invention, technical scheme and effect clearly, clearly, the present invention is described in more detail below.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Refer to Fig. 1, Fig. 1 provided by the present inventionly a kind ofly improves the flow chart that lamp batten punching dielectric layer falls the method preferred embodiment of silk, and it comprises step:
S1, in the design of the lamp batten enterprising row line film, wherein waste material limit adopts paving copper mode to make;
S2, to be washed plate by microetch, paste dry film, contraposition, exposure and etch processes, circuit is made;
S3, the anti-welding film design, and waste material limit is lid anti-solder ink all, makes the without hindrance unsolder window in waste material limit;
S4, by printing, pre-baked, contraposition, exposure, development and rear roasting process, to make anti-welding;
S5, punching is carried out to lamp batten.
Traditional lamp batten line design is that waste material limit takes not spread copper, full etching mode makes, welding resistance waste material limit is designed to window, and causes sheet material hardness to reduce, have dielectric layer and fall a phenomenon during punching because waste material limit does not spread copper, if cleaning is unclean after punching, then there is the risk causing circuit surface to weigh wounded.As shown in Figure 2, on lamp batten 100, interval arranges circuit 120 and waste material limit 110, and waste material limit takes paving copper mode to make by the present invention, adds waste material limit hardness, a problem is greatly improved, and what reduce that dielectric layer drops that table top causes weighs the risk of scrapping wounded.
In described step S2, microetch washes the travelling speed 2800mm/min of plate.
The speed of pasting dry film is 3m/min.Pasting dry film can be specifically make dry film be adhering closely on the copper face of lamp batten by pressure sintering, and temperature, at 110 DEG C, makes dry film good bond.
Exposure process can select IR light source, and 7 ~ 10KW(is as 8KW) energy, and by cooling system maintain table top temperature 25 ~ 30 DEG C (as 25 DEG C).Development treatment is carried out: adopt Na after exposure
2cO
3liquid medicine (mass percent 1 ~ 2%, as 1.2%), temperature is 30 DEG C, and spraying is 2.5 ~ 3kg/cm
2(as 2.7kg/cm
2), developing time is in 50 ~ 60 seconds (as 55 seconds).Developing powder is 3500mm/min.
Can carry out etch processes after development, specifically etch in etching solution, etching condition is 40 DEG C, and the time is 5min.Etching solution is liquor ferri trichloridi (mass percent is 34 ~ 38%, as 35%).
In described step S4, printing uses liquid photosensitive ink, and its method is on web plate, only make the shelves point resistance ink of hole and orifice ring, prevents in ink ostium.
Pre-baked object is the solvent of driving away in ink, and ink portions is hardened, and is unlikely to stick egative film when exposing.Pre-baked temperature is 75 DEG C, and the time is 35min.
In exposure process: select IR light source, 7 ~ 10KW(is as 9KW) energy, and maintain table top temperature 25 ~ 30 DEG C (as 28 DEG C) by cooling system.
Development conditions adopts Na
2cO
3liquid medicine (mass percent 1 ~ 2%, as 1.5%), temperature is 30 DEG C, and spraying is 2.5 ~ 3kg/cm
2(as 2.8kg/cm
2), developing time is in 50 ~ 60 seconds (as 55 seconds).Developing powder is 3500mm/min.
Rear roasting object is that the epoxy resin of ink is thoroughly hardened, and rear roasting condition is 150 DEG C, and the time is 60min.
In the present invention, copper paving area little 0.04mm more monolateral than waste material limit.
Should be understood that, application of the present invention is not limited to above-mentioned citing, for those of ordinary skills, can be improved according to the above description or convert, and all these improve and convert the protection range that all should belong to claims of the present invention.
Claims (7)
1. improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, comprise step:
A, in the design of the lamp batten enterprising row line film, wherein waste material limit adopts paving copper mode to make;
B, to be washed plate by microetch, paste dry film, contraposition, exposure and etch processes, circuit is made;
C, the anti-welding film design, and waste material limit is lid anti-solder ink all, makes the without hindrance unsolder window in waste material limit;
E, by printing, pre-baked, contraposition, exposure, development and rear roasting process, to make anti-welding;
F, punching is carried out to lamp batten.
2. according to claim 1ly improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, microetch washes the travelling speed 2800mm/min of plate.
3. according to claim 1ly improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, pre-baked temperature is 75 DEG C, and the time is 35min.
4. according to claim 1ly improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, developing powder is 3500mm/min.
5. according to claim 1ly improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, the speed of pasting dry film is 3m/min.
6. according to claim 1ly improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, rear roasting temperature is 150 DEG C, and the time is 60min.
7. according to claim 1ly improve the method that lamp batten punching dielectric layer falls silk, it is characterized in that, copper paving area little 0.04mm more monolateral than waste material limit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201510383704.6A CN105025659B (en) | 2015-07-03 | 2015-07-03 | A kind of method for improving lamp bar plate punching dielectric layer and falling silk |
Applications Claiming Priority (1)
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CN201510383704.6A CN105025659B (en) | 2015-07-03 | 2015-07-03 | A kind of method for improving lamp bar plate punching dielectric layer and falling silk |
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CN105025659A true CN105025659A (en) | 2015-11-04 |
CN105025659B CN105025659B (en) | 2018-03-02 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110753450A (en) * | 2019-11-25 | 2020-02-04 | 深圳市景旺电子股份有限公司 | Manufacturing method of rigid-flex board |
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CN101652019A (en) * | 2008-08-14 | 2010-02-17 | 富葵精密组件(深圳)有限公司 | Circuit board prefabricated product and circuit board assembling method |
CN101951727A (en) * | 2010-09-10 | 2011-01-19 | 广东依顿电子科技股份有限公司 | Method for producing electroplated board edge of circuit board |
CN102223763A (en) * | 2010-04-16 | 2011-10-19 | 宏恒胜电子科技(淮安)有限公司 | Manufacturing method of connecting sheet circuit board |
CN102448249A (en) * | 2010-10-15 | 2012-05-09 | 富葵精密组件(深圳)有限公司 | Method for manufacturing double-sided circuit board |
CN103582313A (en) * | 2012-07-18 | 2014-02-12 | 富葵精密组件(深圳)有限公司 | Manufacturing method of circuit board module group |
-
2015
- 2015-07-03 CN CN201510383704.6A patent/CN105025659B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101652019A (en) * | 2008-08-14 | 2010-02-17 | 富葵精密组件(深圳)有限公司 | Circuit board prefabricated product and circuit board assembling method |
CN102223763A (en) * | 2010-04-16 | 2011-10-19 | 宏恒胜电子科技(淮安)有限公司 | Manufacturing method of connecting sheet circuit board |
CN101951727A (en) * | 2010-09-10 | 2011-01-19 | 广东依顿电子科技股份有限公司 | Method for producing electroplated board edge of circuit board |
CN102448249A (en) * | 2010-10-15 | 2012-05-09 | 富葵精密组件(深圳)有限公司 | Method for manufacturing double-sided circuit board |
CN103582313A (en) * | 2012-07-18 | 2014-02-12 | 富葵精密组件(深圳)有限公司 | Manufacturing method of circuit board module group |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110753450A (en) * | 2019-11-25 | 2020-02-04 | 深圳市景旺电子股份有限公司 | Manufacturing method of rigid-flex board |
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CN105025659B (en) | 2018-03-02 |
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