CN104952791A - Method for manufacturing AMOLED (active matrix organic light emitting diode) display device and structure of AMOLED display device - Google Patents
Method for manufacturing AMOLED (active matrix organic light emitting diode) display device and structure of AMOLED display device Download PDFInfo
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- CN104952791A CN104952791A CN201510366825.XA CN201510366825A CN104952791A CN 104952791 A CN104952791 A CN 104952791A CN 201510366825 A CN201510366825 A CN 201510366825A CN 104952791 A CN104952791 A CN 104952791A
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- 238000000034 method Methods 0.000 title claims abstract description 91
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 229920001621 AMOLED Polymers 0.000 title abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 41
- 239000012528 membrane Substances 0.000 claims abstract description 36
- 230000008569 process Effects 0.000 claims description 56
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 42
- 229910052751 metal Inorganic materials 0.000 claims description 39
- 239000002184 metal Substances 0.000 claims description 39
- 239000000463 material Substances 0.000 claims description 37
- 238000002161 passivation Methods 0.000 claims description 24
- 239000000377 silicon dioxide Substances 0.000 claims description 21
- 239000012212 insulator Substances 0.000 claims description 18
- 238000002955 isolation Methods 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 18
- 238000007788 roughening Methods 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 13
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 8
- 238000005538 encapsulation Methods 0.000 claims description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 7
- 239000011651 chromium Substances 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 239000004411 aluminium Substances 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052804 chromium Inorganic materials 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 239000011733 molybdenum Substances 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 6
- 239000011787 zinc oxide Substances 0.000 claims description 5
- MGWGWNFMUOTEHG-UHFFFAOYSA-N 4-(3,5-dimethylphenyl)-1,3-thiazol-2-amine Chemical compound CC1=CC(C)=CC(C=2N=C(N)SC=2)=C1 MGWGWNFMUOTEHG-UHFFFAOYSA-N 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000007789 gas Substances 0.000 claims description 4
- JCXJVPUVTGWSNB-UHFFFAOYSA-N nitrogen dioxide Inorganic materials O=[N]=O JCXJVPUVTGWSNB-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000008020 evaporation Effects 0.000 claims description 3
- 238000001704 evaporation Methods 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 3
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 claims description 3
- 230000027756 respiratory electron transport chain Effects 0.000 claims description 3
- VGYZOYLDGKIWST-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) zirconium(4+) Chemical compound [O-2].[Zn+2].[Zr+4].[In+3] VGYZOYLDGKIWST-UHFFFAOYSA-N 0.000 claims description 3
- 230000003405 preventing effect Effects 0.000 abstract description 8
- 230000002035 prolonged effect Effects 0.000 abstract 1
- 239000010408 film Substances 0.000 description 23
- 238000010586 diagram Methods 0.000 description 12
- 230000000694 effects Effects 0.000 description 9
- 239000011248 coating agent Substances 0.000 description 8
- 238000000576 coating method Methods 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 230000010287 polarization Effects 0.000 description 7
- 239000011521 glass Substances 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910007717 ZnSnO Inorganic materials 0.000 description 1
- 238000004040 coloring Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
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- Optics & Photonics (AREA)
- Electroluminescent Light Sources (AREA)
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Abstract
The invention provides a method for manufacturing an AMOLED (active matrix organic light emitting diode) display device and a structure of the AMOLED display device. According to the method for manufacturing the AMOLED display device, an inorganic membrane layer is deposited before a gate(3) is manufactured, plasma bombardment is performed, then a gate anti-attack layer (2) is formed, further, an organic membrane layer is deposited before a source/drain (71) and a data line (72) are manufactured, plasma bombardment is performed, then an etching resisting and source/drain anti-attack layer (6) is formed, so that the AMOLED display device has good external environment light reflection preventing effect, the display luminance of the AMOLED display device is improved, the service life of the AMOLED display device is prolonged, and the thickness and the manufacturing cost of the AMOLED display device are reduced. The structure of the AMOLED display device is provided with the gate anti-attack layer (2) and the etching resisting and source/drain anti-attack layer (6), thereby having good external environment light reflection preventing effect, higher display luminance, longer service life, smaller thickness and lower manufacturing cost.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of manufacture method and structure thereof of displayer part.
Background technology
Organic Light Emitting Diode (Organic Light Emitting Display, OLED) display device has self-luminous, driving voltage is low, luminous efficiency is high, the response time is short, definition and high, the nearly 180 ° of visual angles of contrast, serviceability temperature wide ranges, can realize the plurality of advantages such as Flexible Displays and large area total colouring, being known as by industry is the display unit having development potentiality most.
OLED display device can be divided into passive matrix OLED (Passive Matrix OLED, PMOLED) and the large class of active array type OLED (Active Matrix OLED, AMOLED) two according to type of drive.Wherein, AMOLED has the pixel of the arrangement in array, and belong to initiatively display type, luminous efficacy is high, is typically used as the large scale display unit of high definition.
Initiatively organic light emitting display (AMOLED) is a kind of thin film light emitting device utilizing direct voltage drive, AMOLED Display Technique is different from traditional LCD display mode, without the need to backlight, adopt very thin coating of organic material and glass substrate, when have electric current by time, these organic materials will be luminous, and displayer part can do more frivolous, visible angle is larger, and significantly can save electric energy.
As shown in Figure 1, existing displayer part sets gradually usually from bottom to top: glass substrate 100, thin-film transistor (TFT) array layer 200, pixel electrode layer and anode layer 300, organic luminous layer 400, cathode layer 500 and encapsulation cover plate 600.Wherein, grid in tft array layer 200, data wire, with source/drain be metal level, the reflecting power of metal is stronger, and the anode layer 300 being located at the upper and lower both sides of organic luminous layer 400 respectively generally all adopts reflective or semi reflective material with cathode layer 500, simultaneously, in displayer part, the region relative with organic luminous layer 400 is open area, make external ambient light can enter displayer part and strong reflection occurs, affecting the display effect of displayer part.At present, the method solving the reflection of displayer part light is typically employed in a slice rotatory polarization sheet that glass substrate 100 or encapsulation cover plate 600 fit, as Fig. 1 illustrates, former polaroid 700 is fitted in glass substrate 100 lower surface, utilizes rotatory polarization sheet 700 to play anti-reaction.But the negative effect that laminating rotatory polarization sheet brings is: the display brightness of OLED display device reduces obviously, equal display brightness is had before realizing OLED display device and paster, then power consumption can corresponding increase, the increase of power consumption can bring again the significantly shortening in displayer part life-span, the thickness of whole displayer part too increase about 160 μm even more, in addition, the cost of manufacture that rotatory polarization sheet also can draw high displayer part is increased.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method of displayer part, can under the prerequisite not increasing rotatory polarization sheet, displayer part is made to have the good effect preventing external ambient light from reflecting, improve the display brightness of displayer part, extend the useful life of displayer part, reduce thickness and the cost of manufacture of displayer part.
The present invention also aims to provide a kind of MOLED display device structure, have the good effect preventing external ambient light from reflecting, have higher display brightness and useful life, thickness is less, cost of manufacture is lower.
For achieving the above object, the invention provides a kind of manufacture method of displayer part, comprising:
Before making grid, deposit one deck inoranic membrane, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form the step of grid counnter attack layer;
And one deck inoranic membrane was deposited before making source/drain and data wire, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching and stop the step with source/drain counnter attack layer.
The manufacture method of described displayer part comprises the steps:
Step 1, provide a substrate, deposit one deck inoranic membrane on the substrate, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form grid counnter attack layer;
Step 2, on described grid counnter attack layer, deposit the first metal layer, and patterned process is carried out to this first metal layer, form grid;
Step 3, on described grid and grid counnter attack layer deposition of gate insulating barrier;
Step 4, on described gate insulator deposited semiconductor film, and patterned process is carried out to this semiconductor film, forms island active layer;
Step 5, on described island active layer and gate insulator, deposit one deck inoranic membrane, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching to stop and source/drain counnter attack layer, again patterned process is carried out to described etching stop and source/drain counnter attack layer, obtained the first via hole and the second via hole exposing described island active layer both sides respectively;
Step 6, to stop and depositing second metal layer on source/drain counnter attack layer in described etching, and patterned process is carried out to this second metal level, form source/drain and data wire, described source/drain contacts described island active layer respectively by the first via hole with the second via hole;
Step 7, described source/drain, data wire and etching stop with source/drain counnter attack layer on deposit passivation protection film, and patterned process is carried out to this passivation protection film, forms the 3rd via hole exposing part source/drain;
Step 8, on described passivation protection film deposit transparent electrode layer, and carry out patterned process to this transparent electrode layer, form pixel electrode layer, described pixel electrode layer is by the 3rd via hole contact portion source/drain;
Step 9, on described pixel electrode layer and passivation protection film pixel deposition separator, and patterned process is carried out to this pixel isolation layer, forms the opening exposing partial pixel electrode layer;
Step 10, employing evaporation process form organic luminous layer in described opening;
Step 11, on described organic luminous layer and pixel isolation layer, sputter layer of metal cathode layer;
Step 12, use encapsulation cover plate encapsulate.
The material of the inoranic membrane in described step 1 is silicon dioxide, and thickness is
The material of the first metal layer in described step 2 is one or more the combination in chromium, molybdenum, aluminium, copper, and thickness is
The material of the gate insulator in described step 3 is silica, silicon nitride or the combination of the two, and thickness is
In described step 4, the material of semiconductor film is the one in zinc oxide, indium-zinc oxide, zinc tin oxide, indium gallium zinc oxide, indium zirconium zinc oxide, and thickness is
The material of the inoranic membrane in described step 5 is silica, and thickness is
Carry out in described step 1 and step 5 that the gas that plasma bombardment process uses is nitrogen, oxygen or nitrogen dioxide;
In described step 6, the material of the second metal level is one or more the combination in chromium, molybdenum, aluminium, copper, and thickness is
In described step 7, the material of passivation protection film is silica, silicon nitride or the combination of the two, and thickness is
In described step 8, the material of transparent electrode layer is tin indium oxide or indium zinc oxide, and thickness is
The material of the pixel isolation layer in described step 9 is silica, and thickness is
Described step 10 organic luminous layer comprises hole injection layer, hole transmission layer, luminous material layer, electron transfer layer and electron injecting layer.
Present invention also offers a kind of displayer part structure, comprise array base palte and be located at passivation protection film, pixel electrode layer, pixel isolation layer, organic luminous layer, metal cathode layer and the encapsulation cover plate on described array base palte from bottom to top successively;
Described array base palte is provided with shaggy gate metal counnter attack layer under the gate, has shaggy etching stop and source/drain counnter attack layer in source/drain and data wire.
Described array base palte comprises substrate, the grid counnter attack layer be located on described substrate, the grid be located on described grid counnter attack layer, be located at the gate insulator on described grid and grid counnter attack layer, the island active layer be located at above described grid on described gate insulator, be located at etching stop on described island active layer and gate insulator and source/drain counnter attack layer and be located at described etching and stop and the source/drain on source/drain counnter attack layer and data wire; Described etching stops and source/drain counnter attack layer has the first via hole and the second via hole that expose described island active layer both sides respectively; Described source/drain contacts described island active layer respectively by the first via hole with the second via hole;
Described passivation protection film is located at source/drain, data wire and etching and is stopped with on source/drain counnter attack layer, and has the 3rd via hole exposing part source/drain;
Described pixel electrode layer is located on described passivation protection film, and by the 3rd via hole contact portion source/drain;
Described pixel isolation layer is located on pixel electrode layer, and has the opening exposing partial pixel electrode layer;
Described organic luminous layer is located in the opening on described pixel electrode layer;
Described metal cathode layer is located on described organic luminous layer and pixel isolation layer.
The material of described gate metal counnter attack layer is silicon dioxide, and thickness is
Described etching stops that with the material of source/drain counnter attack layer be silica, and thickness is
Beneficial effect of the present invention: the manufacture method of a kind of displayer part provided by the invention, by depositing one deck inoranic membrane before making grid, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form grid counnter attack layer, and one deck inoranic membrane was deposited before making source/drain and data wire, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching to stop and source/drain counnter attack layer, can under the prerequisite not increasing rotatory polarization sheet, displayer part is made to have the good effect preventing external ambient light from reflecting, improve the display brightness of displayer part, extend the useful life of displayer part, reduce thickness and the cost of manufacture of displayer part.A kind of displayer part structure provided by the invention, its array base palte arranges shaggy gate metal counnter attack layer under the gate, have shaggy etching in source/drain and data wire to stop and source/drain counnter attack layer, there is the good effect preventing external ambient light from reflecting, have higher display brightness and useful life, thickness is less, cost of manufacture is lower.
In order to further understand feature of the present invention and technology contents, refer to following detailed description for the present invention and accompanying drawing, but accompanying drawing only provides reference and explanation use, is not used for being limited the present invention.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, by the specific embodiment of the present invention describe in detail, will make technical scheme of the present invention and other beneficial effect apparent.
In accompanying drawing,
Fig. 1 is the structural representation of existing displayer part;
Fig. 2 is the flow chart of the manufacture method of displayer part of the present invention;
Fig. 3 is the schematic diagram of the step 1 of the manufacture method of displayer part of the present invention;
Fig. 4 is the schematic diagram of the step 2 of the manufacture method of displayer part of the present invention;
Fig. 5 is the schematic diagram of the step 3 of the manufacture method of displayer part of the present invention;
Fig. 6 is the schematic diagram of the step 4 of the manufacture method of displayer part of the present invention;
Fig. 7 is the schematic diagram of the step 5 of the manufacture method of displayer part of the present invention;
Fig. 8 is the schematic diagram of the step 6 of the manufacture method of displayer part of the present invention;
Fig. 9 is the schematic diagram of the step 7 of the manufacture method of displayer part of the present invention;
Figure 10 is the schematic diagram of the step 8 of the manufacture method of displayer part of the present invention;
Figure 11 is the schematic diagram of the step 9 of the manufacture method of displayer part of the present invention;
Figure 12 is the schematic diagram of the step 10 of the manufacture method of displayer part of the present invention;
Figure 13 is the schematic diagram of the step 11 of the manufacture method of displayer part of the present invention;
Figure 14 is the schematic diagram of the step 12 of the manufacture method of displayer part of the present invention and the structural representation of displayer part of the present invention.
Embodiment
For further setting forth the technological means and effect thereof that the present invention takes, be described in detail below in conjunction with the preferred embodiments of the present invention and accompanying drawing thereof.
Refer to Fig. 2, first the present invention provides a kind of manufacture method of displayer part, comprises the steps:
Step 1, as shown in Figure 3, provide a substrate 1, described substrate 1 deposits the inoranic membrane that one deck film quality is loose, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form grid counnter attack layer 2.
Particularly, the described substrate 1 in this step 1 is preferably glass substrate; The material of described inoranic membrane is silicon dioxide (SiO
2), thickness is
carrying out the gas that plasma bombardment process uses is nitrogen (N
2), oxygen (O
2) or nitrogen dioxide (NO
2).
Step 2, as shown in Figure 4, described grid counnter attack layer 2 deposits the first metal layer, and patterned process is carried out to this first metal layer, form grid 3.
Particularly, the material of the first metal layer in this step 2 is one or more the combination in chromium (Cr), molybdenum (Mo), aluminium (Al), copper (Cu), and thickness is
described patterned process is by resist coating (PR), exposure, development, wet etching, realize with the technical process of stripping photoresist.
Step 3, as shown in Figure 5, deposition of gate insulating barrier 4 on described grid 3 and grid counnter attack layer 2.
Particularly, the material of gate insulator 4 described in this step 3 is silica (SiO
x), silicon nitride (SiN
x) or the two combination, thickness is
Step 4, as shown in Figure 6, deposited semiconductor film on described gate insulator 4, and patterned process is carried out to this semiconductor film, form island active layer 5.
Particularly, the material of semiconductor film described in this step 4 is the one in zinc oxide (ZnO), indium-zinc oxide (InZnO), zinc tin oxide (ZnSnO), indium gallium zinc oxide (CaInZnO), indium zirconium zinc oxide (ZrInZnO), and thickness is
described patterned process is by resist coating, exposure, development, wet etching, realize with the technical process of stripping photoresist.
Step 5, as shown in Figure 7, described island active layer 5 with gate insulator 4 deposit one deck inoranic membrane, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching to stop and source/drain counnter attack layer 6, again patterned process is carried out to described etching stop and source/drain counnter attack layer 6, obtained the first via hole 61 and the second via hole 62 exposing described island active layer 5 both sides respectively.
Particularly, in this step 5, the material of inoranic membrane is silica, and thickness is
carry out that the gas that plasma bombardment process uses is nitrogen, oxygen or nitrogen dioxide.
Described etching to be stopped and source/drain counnter attack layer 6 carries out patterned process and realized by the technical process of resist coating, exposure, development, dry ecthing and stripping photoresist.
Step 6, as shown in Figure 8, stop and depositing second metal layer on source/drain counnter attack layer 6 in described etching, and patterned process is carried out to this second metal level, form source/drain 71 and data wire 72, described source/drain 71 contacts described island active layer 5 respectively by the first via hole 61 with the second via hole 62.
Particularly, in this step 6, the material of the second metal level is one or more the combination in chromium, molybdenum, aluminium, copper, and thickness is
described patterned process is by resist coating, exposure, development, wet etching, realize with the technical process of stripping photoresist.
Step 7, as shown in Figure 9, described source/drain 71, data wire 72 and etching stop with source/drain counnter attack layer 6 on deposit passivation protection film 8, and patterned process is carried out to this passivation protection film 8, forms the 3rd via hole 81 exposing part source/drain 71.
Particularly, in this step 7, the material of passivation protection film 8 is silica, silicon nitride or the combination of the two, and thickness is
described patterned process is by resist coating, exposure, development, dry ecthing, realize with the technical process of stripping photoresist.
Step 8, as shown in Figure 10, deposit transparent electrode layer on described passivation protection film 8, and patterned process is carried out to this transparent electrode layer, form pixel electrode layer 9, described pixel electrode layer 9 is by the 3rd via hole 81 contact portion source/drain 71.
Particularly, in this step 8, the material of transparent electrode layer is tin indium oxide (ITO) or indium zinc oxide (IZO), and thickness is
carry out patterned process to described transparent electrode layer, the technical process forming pixel electrode layer 9 is: resist coating, exposure, development, wet etching and stripping photoresist.
Step 9, as shown in figure 11, at described pixel electrode layer 9 and pixel deposition separator 10 on passivation protection film 8, and carries out patterned process to this pixel isolation layer 10, forms the opening 101 exposing partial pixel electrode layer 9.
Particularly, the material of the pixel isolation layer 10 in this step 9 is silica, and thickness is
described patterned process is by resist coating, exposure, development, wet etching, realize with the technical process of stripping photoresist.
Step 10, as shown in figure 12, adopts evaporation process to form organic luminous layer 11 in described opening 101.
Particularly, described organic luminous layer 11 comprises again hole injection layer, hole transmission layer, luminous material layer, electron transfer layer and electron injecting layer.
Step 11, as shown in figure 13, described organic luminous layer 11 with pixel isolation layer 10 sputter layer of metal cathode layer 12.
Step 12, as shown in figure 14, uses encapsulation cover plate 13 to encapsulate.
The manufacture method of displayer part of the present invention stops and source/drain counnter attack layer 6 with etching owing to having made grid counnter attack layer 2, scattering can be carried out to the light entered into by external environment condition in displayer part in the two coarse surface, prevent the reflection of grid 3, source/drain 71, data wire 72, pixel electrode layer 9 and metal cathode layer 12 pairs of external ambient light, thus making displayer part have higher display brightness and useful life, thickness is less, cost of manufacture is lower.
On the basis of the manufacture method of above-mentioned displayer part; the present invention also provides a kind of structure of displayer part; as shown in figure 14, comprise array base palte and be located at passivation protection film 8, pixel electrode layer 9, pixel isolation layer 10, organic luminous layer 11, metal cathode layer 12 and the encapsulation cover plate 13 on described array base palte from bottom to top successively.Described array base palte has shaggy gate metal counnter attack layer 2 at grid 3, has shaggy etching stop and source/drain counnter attack layer 6 at source/drain 71 and data wire 72.
Particularly, described array base palte comprises substrate 1, the grid counnter attack layer 2 be located on described substrate 1, the grid 3 be located on described grid counnter attack layer 2, the gate insulator 4 be located on described grid 3 and grid counnter attack layer 2, the island active layer 5 be located at above described grid 3 on described gate insulator 4, is located at described island active layer 5 and the etching stop on gate insulator 4 and source/drain counnter attack layer 6 and is located at described etching and stop and source/drain 71 on source/drain counnter attack layer 6 and data wire 72; Described etching stops and source/drain counnter attack layer 6 has the first via hole 61 and the second via hole 62 exposing described island active layer 5 both sides respectively; Described source/drain 71 contacts described island active layer 5 respectively by the first via hole 61 with the second via hole 62.
Described passivation protection film 8 is located at source/drain 71, data wire 72 and etching and is stopped with on source/drain counnter attack layer 6, and has the 3rd via hole 81 exposing part source/drain 71; Described pixel electrode layer 9 is located on described passivation protection film 8, and by the 3rd via hole 81 contact portion source/drain 71; Described pixel isolation layer 10 is located on pixel electrode layer 9, and has the opening 101 exposing partial pixel electrode layer 9; Described organic luminous layer 11 is located in the opening 101 on described pixel electrode layer 9; Described metal cathode layer 12 is located at described organic luminous layer 11 with on pixel isolation layer 10.
The material of described gate metal counnter attack layer 2 is silicon dioxide, and thickness is
Described etching stops that with the material of source/drain counnter attack layer 6 be silica, and thickness is
Displayer part of the present invention, stop and source/drain counnter attack layer 6 with etching owing to being provided with grid counnter attack layer 2, scattering can be carried out to the light entered into by external environment condition in displayer part in the two coarse surface, prevent the reflection of grid 3, source/drain 71, data wire 72, pixel electrode layer 9 and metal cathode layer 12 pairs of external ambient light, thus making displayer part have higher display brightness and useful life, thickness is less, cost of manufacture is lower.
In sum, the manufacture method of displayer part of the present invention, by depositing one deck inoranic membrane before making grid, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form grid counnter attack layer, and one deck inoranic membrane was deposited before making source/drain and data wire, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching to stop and source/drain counnter attack layer, can under the prerequisite not increasing rotatory polarization sheet, displayer part is made to have the good effect preventing external ambient light from reflecting, improve the display brightness of displayer part, extend the useful life of displayer part, reduce thickness and the cost of manufacture of displayer part.Displayer part structure of the present invention, its array base palte arranges shaggy gate metal counnter attack layer under the gate, have shaggy etching in source/drain and data wire to stop and source/drain counnter attack layer, there is the good effect preventing external ambient light from reflecting, have higher display brightness and useful life, thickness is less, cost of manufacture is lower.
The above, for the person of ordinary skill of the art, can make other various corresponding change and distortion according to technical scheme of the present invention and technical conceive, and all these change and be out of shape the protection range that all should belong to the claims in the present invention.
Claims (10)
1. a manufacture method for displayer part, is characterized in that, comprising:
Deposition one deck inoranic membrane before making grid (3), and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form the step of grid counnter attack layer (2);
And one deck inoranic membrane was deposited before making source/drain (71) with data wire (72), and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching and stop the step with source/drain counnter attack layer (6).
2. the manufacture method of displayer part as claimed in claim 1, is characterized in that, comprise the steps:
Step 1, provide a substrate (1), at described substrate (1) upper deposition one deck inoranic membrane, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form grid counnter attack layer (2);
Step 2, on described grid counnter attack layer (2), deposit the first metal layer, and patterned process is carried out to this first metal layer, form grid (3);
Step 3, at the upper deposition of gate insulating barrier (4) of described grid (3) and grid counnter attack layer (2);
Step 4, at the upper deposited semiconductor film of described gate insulator (4), and patterned process is carried out to this semiconductor film, form island active layer (5);
Step 5, deposit one deck inoranic membrane described island active layer (5) and gate insulator (4) are upper, and plasma bombardment process is carried out to this inoranic membrane, make its surface roughening, form etching to stop and source/drain counnter attack layer (6), again patterned process is carried out to described etching stop and source/drain counnter attack layer (6), obtained the first via hole (61) and the second via hole (62) exposing described island active layer (5) both sides respectively;
Step 6, stop the upper depositing second metal layer with source/drain counnter attack layer (6) in described etching, and patterned process is carried out to this second metal level, form source/drain (71) and data wire (72), described source/drain (71) contacts described island active layer (5) respectively by the first via hole (61) with the second via hole (62);
Step 7, described source/drain (71), data wire (72) and etching stop with source/drain counnter attack layer (6) on deposit passivation protection film (8), and patterned process is carried out to this passivation protection film (8), form the 3rd via hole (81) exposing part source/drain (71);
Step 8, at the upper deposit transparent electrode layer of described passivation protection film (8), and patterned process is carried out to this transparent electrode layer, form pixel electrode layer (9), described pixel electrode layer (9) is by the 3rd via hole (81) contact portion source/drain (71);
Step 9, at the upper pixel deposition separator (10) of described pixel electrode layer (9) and passivation protection film (8), and patterned process is carried out to this pixel isolation layer (10), form the opening (101) exposing partial pixel electrode layer (9);
Step 10, employing evaporation process form organic luminous layer (11) in described opening (101);
Step 11, sputter layer of metal cathode layer (12) described organic luminous layer (11) and pixel isolation layer (10) are upper;
Step 12, use encapsulation cover plate (13) encapsulate.
3. the manufacture method of displayer part as claimed in claim 2, it is characterized in that, the material of the inoranic membrane in described step 1 is silicon dioxide, and thickness is
4. the manufacture method of displayer part as claimed in claim 2, it is characterized in that, the material of the inoranic membrane in described step 5 is silica, and thickness is
5. the manufacture method of displayer part as claimed in claim 2, is characterized in that, carries out that the gas that plasma bombardment process uses is nitrogen, oxygen or nitrogen dioxide in described step 1 and step 5.
6. the manufacture method of displayer part as claimed in claim 2, it is characterized in that, the material of the first metal layer in described step 2 is one or more the combination in chromium, molybdenum, aluminium, copper, and thickness is
The material of the gate insulator (4) in described step 3 is silica, silicon nitride or the combination of the two, and thickness is
In described step 4, the material of semiconductor film is the one in zinc oxide, indium-zinc oxide, zinc tin oxide, indium gallium zinc oxide, indium zirconium zinc oxide, and thickness is
In described step 6, the material of the second metal level is one or more the combination in chromium, molybdenum, aluminium, copper, and thickness is
In described step 7, the material of passivation protection film (8) is silica, silicon nitride or the combination of the two, and thickness is
In described step 8, the material of transparent electrode layer is tin indium oxide or indium zinc oxide, and thickness is
The material of the pixel isolation layer (10) in described step 9 is silica, and thickness is
Described step 10 organic luminous layer (11) comprises hole injection layer, hole transmission layer, luminous material layer, electron transfer layer and electron injecting layer.
7. a displayer part structure, it is characterized in that, comprise array base palte and be located at passivation protection film (8), pixel electrode layer (9), pixel isolation layer (10), organic luminous layer (11), metal cathode layer (12) and the encapsulation cover plate (13) on described array base palte from bottom to top successively;
Described array base palte has shaggy gate metal counnter attack layer (2) at grid (3), has shaggy etching stop and source/drain counnter attack layer (6) at source/drain (71) and data wire (72).
8. displayer part structure as claimed in claim 7, it is characterized in that, described array base palte comprises substrate (1), be located at the grid counnter attack layer (2) on described substrate (1), be located at the grid (3) on described grid counnter attack layer (2), be located at the gate insulator (4) on described grid (3) and grid counnter attack layer (2), the island active layer (5) on described gate insulator (4) is located in described grid (3) top, be located at described island active layer (5) and the etching stop on gate insulator (4) and source/drain counnter attack layer (6), and be located at described etching stop and the source/drain (71) on source/drain counnter attack layer (6) and data wire (72), described etching stops and source/drain counnter attack layer (6) has the first via hole (61) and the second via hole (62) that expose described island active layer (5) both sides respectively, described source/drain (71) contacts described island active layer (5) respectively by the first via hole (61) with the second via hole (62),
Described passivation protection film (8) is located at source/drain (71), data wire (72) and etching and is stopped with on source/drain counnter attack layer (6), and has the 3rd via hole (81) exposing part source/drain (71);
Described pixel electrode layer (9) is located on described passivation protection film (8), and by the 3rd via hole (81) contact portion source/drain (71);
Described pixel isolation layer (10) is located on pixel electrode layer (9), and has the opening (101) exposing partial pixel electrode layer (9);
Described organic luminous layer (11) is located in the opening (101) on described pixel electrode layer (9);
Described metal cathode layer (12) is located at described organic luminous layer (11) with on pixel isolation layer (10).
9. displayer part structure as claimed in claim 8, it is characterized in that, the material of described gate metal counnter attack layer (2) is silicon dioxide, and thickness is
10. displayer part structure as claimed in claim 8, is characterized in that, described etching stops that with the material of source/drain counnter attack layer (6) be silica, and thickness is
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PCT/CN2015/084866 WO2016206150A1 (en) | 2015-06-26 | 2015-07-23 | Structure and manufacturing method of amoled display device |
US14/777,741 US20160380239A1 (en) | 2015-06-26 | 2015-07-23 | Method for manufacturing amoled display device and structure thereof |
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