CN104944362B - Method for manufacturing MEMS (Micro-Electro-Mechanical System) device structure - Google Patents
Method for manufacturing MEMS (Micro-Electro-Mechanical System) device structure Download PDFInfo
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- CN104944362B CN104944362B CN201410114998.8A CN201410114998A CN104944362B CN 104944362 B CN104944362 B CN 104944362B CN 201410114998 A CN201410114998 A CN 201410114998A CN 104944362 B CN104944362 B CN 104944362B
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Abstract
The invention provides a method for manufacturing an MEMS (Micro-Electro-Mechanical System) device structure. The method comprises the steps: (1) providing a first semiconductor substrate and a second semiconductor substrate, wherein a microstructure area, a metal bonding layer and a metal welding pad are formed on the surface of the first semiconductor substrate, and the surface of the second semiconductor substrate is provided with an annular bulge; (2) removing first metal oxide layers from the surface of the metal bonding layer and the surface of the metal welding pad; (3) carrying out a bonding process; (4) carrying out a cutting process, wherein semiconductor particles are adsorbed by the surface of the metal welding pad during cutting; (5) oxidizing the semiconductor particles to form oxide particles, and forming a second metal oxide layer on the surface of the metal welding pad; (6) removing the oxide particles through acidic chemical corrosion; and (7) removing the second metal oxide layer through alkaline chemical corrosion. According to the method, the semiconductor particles adsorbed by the metal welding pad are removed through oxidizing, acid corrosion and alkali corrosion processes, so that the defect that the metal welding pad is liable to corrosion is effectively avoided in the case of not affecting the performance of an MEMS device and the performance of an aluminum welding pad. The method is simple in process and is applicable to industrial production.
Description
Technical field
The invention belongs to MEMS manufactures field, more particularly to a kind of manufacture method of mems device architecture.
Background technology
MEMS (mems, micro-electro-mechanical system) is a kind of advanced manufacturing technology
Platform.It is grown up based on semiconductor fabrication.Mems technology employs photoetching in semiconductor technology, corruption
The a series of prior art such as erosion, thin film and material, therefore for manufacturing technology itself, in mems, basic manufacturing technology is
Ripe.But mems is more focused on ultraprecise machining, and microelectronics to be related to, material, mechanics, chemistry, mechanics are many
Ambit.Physical each branches such as power under minute yardstick, electricity, light, magnetic, sound, surface are also expanded in its subject face to.
MEMS is the mechanical system of micron size, wherein also includes what three-dimensional flat plate printing of different shapes produced
System.The size of these systems is typically between micron to millimeter.Daily physics experience in this magnitude range is often not
It is suitable for.Such as due to the area of MEMS is more much greater than the mechanical system in general daily life to volume ratio, its table
Face phenomenon such as the specific volume phenomenon such as electrostatic, moistening such as inertia or thermal capacity etc. is important.They are usually by similar to production half
The technology of the conductor such as technology such as surface micro-fabrication, build micro Process manufactures.Such as roll including the silicon processing method changed,
Plating, wet etching, dry ecthing, spark machined etc..MEMS refers to collect at microsensor, executor and signal
Reason and control circuit, interface circuit, communication and power supply, in the Micro Electro Mechanical System of one, are independent intelligence systems.Main
To be made up of the suitable, actuator of sensing and micro- energy three parts.MEMS has following basic characteristics, be miniaturized,
Intelligent, multi-functional, high integration.MEMS, it be by the miniaturization of system, integrated come to explore have newly former
Reason, the element of New function and system microcomputer electric system.MEMS is related to Aero-Space, information communication, biochemistry, doctor
Treat, automatically control, the application such as consumer electronics and weapons.The manufacturing process of MEMS mainly has integrated circuit work
Skill, micrometer/nanometer manufacturing process, gadget technique and other special process work posts.Micro electro mechanical system (MEMS) technology foundation main will include
Design and emulation technology, material and process technology, encapsulation and mounting technology, measurement and measuring technology, integrated with systems technology etc..
A kind of manufacture method of existing mems device architecture is as follows:
Step one, provides Semiconductor substrate and bonded substrate, described semiconductor substrate surface be formed with aluminum bonded layer and
Positioned at the aluminum pad of described aluminum bonded layer periphery, described aluminum pad and aluminum bonding layer surface are coated with device architecture, described bonding
Substrate surface has the annular protrusion that can form sealing cooperation with described aluminum bonded layer；
The device architecture that described aluminum pad and aluminum are bonded layer surface is removed by step 2 using photoetching process, exposes described
Aluminum pad and aluminum bonded layer, now, aluminum pad and aluminum bonding layer surface can form one layer of alumina layer；
Step 3, in order to strengthen bond strength, needs to remove, using dhf technique, the aluminium oxide that described aluminum is bonded layer surface
Layer, non-selective due to dhf technique, meanwhile, the alumina layer on described aluminum pad surface also can be removed；
Step 4, is bonded described Semiconductor substrate and described bonded substrate, shape by described aluminum bonded layer and annular protrusion
Become cavity structure；
Step 5, cuts described bonded substrate, removes the semi-conducting material of described annular protrusion periphery, exposes and described partly leads
The aluminum pad of body substrate surface, for used by follow-up line.
The mems structure being obtained by above method has the disadvantages that dhf technique removes the gold on described aluminum pad surface
After belonging to oxide layer, the characteristic on aluminum pad surface can be changed and potential serves as a contrast so as to be bonded during being readily adsorbed in cutting technique
The dust granules that bottom produces, ultimately result in aluminum pad and are corroded and affect performance.
In order to overcome process above defect, a kind of scheme of solution is to increase flushing ability in flushing process after dicing
Degree, but this way easilys lead to some device architectures and is destroyed, and lead to whole component failure.
In view of disadvantages described above, it is an object of the invention to provide a kind of can be with the mems device junction of effectively solving the problems referred to above
The manufacture method of structure.
Content of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of making of mems device architecture
Method, for solving the problems, such as to affect device performance because metal pad adsorbs quasiconductor dust granules in prior art.
For achieving the above object and other related purposes, the present invention provides a kind of manufacture method of mems device architecture, bag
Include step:
1) the first Semiconductor substrate and the second Semiconductor substrate are provided, described first semiconductor substrate surface is formed with micro- knot
Structure area, the metal bonding layer being surrounded on described microstructured area and the metal pad being located at described metal bonding layer periphery, described
Second semiconductor substrate surface has the annular protrusion that can form sealing cooperation with described metal bonding layer；
2) pre-cleaning processes are adopted to remove first metal oxide layer on described metal bonding layer and metal pad surface；
3) it is bonded described first Semiconductor substrate and the second Semiconductor substrate by described metal bonding layer and annular protrusion；
4) cutting technique is carried out to described second Semiconductor substrate, to remove the quasiconductor material of described annular protrusion periphery
Material, during cutting, described metal pad surface adsorption has semiconductor grain；
5) make described semiconductor grain oxidation form oxidation particle using oxidation technology, and make described metal pad Surface Oxygen
Change and form the second metal oxide layer；
6) acidic chemical etching process is adopted to remove described oxidation particle；
7) alkali electroless etching process is adopted to remove described second metal oxide layer.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, described first Semiconductor substrate and
The material of the second Semiconductor substrate is silicon.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, described metal pad and described gold
The material belonging to bonded layer is aluminum.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, step 2) described in prerinse work
Skill cleans dhf technique for dilute hydrofluoric acid.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, step 3) adopts gold silicon eutectic key
Close technique described metal bonding layer and annular protrusion are bonded.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, the cutting technique described in step 4)
For mechanical cutting processes.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, the oxidation technology described in step 5)
For boiler tube thermal oxidation technology.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, step 6) adopts dilute hydrofluoric acid
Cleaning dhf technique removes the semiconductor grain after oxidation.
As a kind of preferred version of the manufacture method of the mems device architecture of the present invention, in described first Semiconductor substrate
It is also formed with cmos device architecture.
As described above, the present invention provides a kind of manufacture method of mems device architecture, includings step: 1) offer the first half is led
Body substrate and the second Semiconductor substrate, described first semiconductor substrate surface is formed with microstructured area, is surrounded on described micro structure
The metal bonding layer in area and the metal pad being located at described metal bonding layer periphery, described second semiconductor substrate surface tool
There is the annular protrusion that can form sealing cooperation with described metal bonding layer；2) pre-cleaning processes are adopted to remove described metal bonding layer
And first metal oxide layer on metal pad surface；3) lead by described metal bonding layer and annular protrusion bonding described the first half
Body substrate and the second Semiconductor substrate；4) cutting technique is carried out to described second Semiconductor substrate, to remove described annular protrusion
The semi-conducting material of periphery, during cutting, described metal pad surface adsorption has semiconductor grain；5) made using oxidation technology described
Semiconductor grain oxidation forms oxidation particle, and makes described metal pad surface oxidation form the second metal oxide layer；6) adopt
Acidic chemical etching process removes described oxidation particle；7) alkali electroless etching process is adopted to remove described second metal oxidation
Layer.The present invention passes sequentially through oxidation technology, sour corrosion technique and alkaline corrosion technique and eliminates metal pad surface adsorption
Semiconductor grain, in the case of not affecting mems device performance and aluminum pad performance, can be effectively prevented from due to quasiconductor
Granule and lead to the defect that metal pad is corroded, present invention process simple it is adaptable to commercial production.
Brief description
Fig. 1 is shown as each steps flow chart schematic diagram of manufacture method of the mems device architecture of the present invention.
Fig. 2 is shown as the structural representation that the manufacture method step 1) of the mems device architecture of the present invention is presented.
Fig. 3 is shown as the manufacture method step 2 of the mems device architecture of the present invention) structural representation that presented.
Fig. 4 is shown as the structural representation that the manufacture method step 3) of the mems device architecture of the present invention is presented.
Fig. 5 is shown as the structural representation that the manufacture method step 4) of the mems device architecture of the present invention is presented.
Fig. 6 is shown as the structural representation that the manufacture method step 5) of the mems device architecture of the present invention is presented.
Fig. 7 is shown as the structural representation that the manufacture method step 6) of the mems device architecture of the present invention is presented.
Fig. 8 is shown as the structural representation that the manufacture method step 7) of the mems device architecture of the present invention is presented.
Component label instructions
101 first Semiconductor substrate
102 microstructured area
103 metal bonding layer
104 metal pads
105 first metal oxide layers
106 second Semiconductor substrate
107 annular protrusions
108 au-si alloy layers
109 semiconductor grains
110 oxidation particles
111 second metal oxide layers
S11～s17 step 1)～step 7)
Specific embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also be by addition different concrete realities
The mode of applying is carried out or applies, and the every details in this specification can also be based on different viewpoints and application, without departing from
Carry out various modifications and changes under the spirit of the present invention.
Refer to Fig. 1～Fig. 8.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only shows the assembly relevant with the present invention rather than then according to package count during actual enforcement in schema
Mesh, shape and size are drawn, and during its actual enforcement, the kenel of each assembly, quantity and ratio can be a kind of random change, and its
Assembly layout kenel is likely to increasingly complex.
As shown in Fig. 1～Fig. 8, the present embodiment provides a kind of manufacture method of mems device architecture, including step:
As shown in Fig. 1～Fig. 2, carry out step 1) s11 first, the first Semiconductor substrate 101 and the second quasiconductor lining are provided
Bottom 106, described first Semiconductor substrate 101 surface is formed with microstructured area 102, is surrounded on the metal of described microstructured area 102
Bonded layer 103 and the metal pad 104 being located at described metal bonding layer 103 periphery, described second Semiconductor substrate 106 table
Face has the annular protrusion 107 that can form sealing cooperation with described metal bonding layer 103；Wherein, described metal bonding layer 103 and
Metal pad 104 surface is formed with the first metal oxide layer 105.
In the present embodiment, the material of described first Semiconductor substrate 101 and the second Semiconductor substrate 106 is silicon.Certainly,
The material of described first Semiconductor substrate 101 and the second Semiconductor substrate 106 can according to demand depending on, can also be such as ge lining
Bottom, gesi substrate, sic substrate or-race's substrate etc., are not limited to this.
In the present embodiment, the material of described metal pad 104 and described metal bonding layer 103 is aluminum, and aluminium surface is formed
There is alumina layer.Certainly, the material of described metal pad 104 and described metal bonding layer 103 can also be that copper etc. such as has gold
Belong to the metal of line function and key function.
As an example, it is also formed with cmos device architecture in described first Semiconductor substrate 101, and, described cmos device
The electrode of part structure is drawn by described metal pad 104.In addition, described microstructured area 102 forms just like pressure transducer, adds
The micro structures such as velocity sensor, light sensor.The shape of described metal bonding layer 103 is according to the shape of described microstructured area 102
Shape determines, can be typically circle, rectangle etc..
As an example, described second Semiconductor substrate 106 surface is had and can be joined with the formation sealing of described metal bonding layer 103
The annular protrusion 107 closing, described annular protrusion 107 is to be formed at described second Semiconductor substrate 106 surface by photoetching process,
For bonding together to form micro structure cavity with described metal bonding layer 103.
As shown in Figures 1 and 3, then carry out step 2) s12, remove described metal bonding layer 103 using pre-cleaning processes
And first metal oxide layer 105 on metal pad 104 surface.
As an example, described pre-cleaning processes clean dhf technique for dilute hydrofluoric acid.Can effectively be gone by dhf technique
Except aluminum is bonded the alumina layer of layer surface, to strengthen the bonding of follow-up first Semiconductor substrate 101 and the second Semiconductor substrate 106
Intensity, but, non-selective due to dhf technique, meanwhile, the alumina layer on described aluminum pad surface also can be removed.
As shown in Fig. 1 and Fig. 4, then carry out step 3) s13, by described metal bonding layer 103 and annular protrusion 107 key
Close described first Semiconductor substrate 101 and the second Semiconductor substrate 106.
In the present embodiment, using gold silicon eutectic bonding technology, described metal bonding layer 103 and annular protrusion 107 are carried out
Bonding, that is, between described annular protrusion 107 and described metal bonding layer 103 formed au-si alloy layer 108 to above-mentioned both enter
Line unit closes.Certainly, bonding technology expected from other is equally applicable to the present embodiment, is not limited to this.
As shown in Figures 1 and 5, then carry out step 4) s14, cutting technique carried out to described second Semiconductor substrate 106,
To remove the semi-conducting material of described annular protrusion 107 periphery, during cutting, described metal pad 104 surface adsorption has quasiconductor
Grain 109.
In the present embodiment, described cutting technique is mechanical cutting processes, can produce substantial amounts of quasiconductor due to during cutting
Granule 109, after dhf technique removes the alumina layer on described aluminum pad surface, can change characteristic and the potential on aluminum pad surface,
Make it easily adsorb these semiconductor grains 109, be easily caused aluminum pad and be corroded and affect performance, therefore, these quasiconductors
Granule 109 is required to be removed.
As shown in Figure 1 and Figure 6, then carry out step 5) s15, so that described semiconductor grain 109 is aoxidized using oxidation technology
Form oxidation particle 110, and make described metal pad 104 surface oxidation form the second metal oxide layer 111.
As an example, described semiconductor grain 109 oxidation is made to form oxidation particle 110 using boiler tube thermal oxidation technology, and
Described metal pad 104 surface oxidation is made to form the second metal oxide layer 111.
As shown in Fig. 1 and Fig. 7, then carry out step 6) s16, described oxidation particle is removed using acidic chemical etching process
110.
As an example, dhf technique is cleaned using dilute hydrofluoric acid and remove the semiconductor grain 109 after oxidation, simultaneously as
Described metal pad 104 surface has the second metal oxide layer 111, can avoid dhf technique that metal pad 104 surface is caused
Damage.
As shown in Fig. 1 and Fig. 8, then carry out step 7) s17, described second metal is removed using alkali electroless etching process
Oxide layer 111.
Using alkali electroless corrosion, described second can be removed while not affecting the characteristic of described metal pad 104
Metal oxide layer 111, obtains functional metal pad 104, for used by the techniques such as follow-up lead.
As described above, the present invention provides a kind of manufacture method of mems device architecture, includings step: 1) offer the first half is led
Body substrate 101 and the second Semiconductor substrate 106, described first Semiconductor substrate 101 surface is formed with microstructured area 102, surrounds
In metal bonding layer 103 and the metal pad 104 being located at described metal bonding layer 103 periphery of described microstructured area 102,
Described second Semiconductor substrate 106 surface has the annular protrusion 107 that can form sealing cooperation with described metal bonding layer 103；
2) pre-cleaning processes are adopted to remove first metal oxide layer 105 on described metal bonding layer 103 and metal pad 104 surface；3)
It is bonded described first Semiconductor substrate 101 and the second Semiconductor substrate by described metal bonding layer 103 and annular protrusion 107
106；4) cutting technique is carried out to described second Semiconductor substrate 106, to remove the quasiconductor material of described annular protrusion 107 periphery
Material, during cutting, described metal pad 104 surface adsorption has semiconductor grain 109；5) described quasiconductor is made using oxidation technology
Grain 109 oxidation forms oxidation particle 110, and makes described metal pad 104 surface oxidation form the second metal oxide layer 111；6)
Described oxidation particle 110 is removed using acidic chemical etching process；7) alkali electroless etching process is adopted to remove described second gold medal
Belong to oxide layer 111.The present invention passes sequentially through oxidation technology, sour corrosion technique and alkaline corrosion technique and eliminates metal pad
The semiconductor grain 109 of 104 surface adsorption, in the case of not affecting mems device performance and aluminum pad performance, can be effective
Avoid the defect that leads to metal pad 104 to be corroded due to semiconductor grain 109, present invention process simple it is adaptable to work
Industry produces.So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
Above-described embodiment only principle of the illustrative present invention and its effect, not for the restriction present invention.Any ripe
The personage knowing this technology all can carry out modifications and changes without prejudice under the spirit and the scope of the present invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete with institute under technological thought without departing from disclosed spirit such as
All equivalent modifications becoming or change, must be covered by the claim of the present invention.
Claims (9)
1. a kind of manufacture method of mems device architecture is it is characterised in that include step:
1) the first Semiconductor substrate and the second Semiconductor substrate are provided, described first semiconductor substrate surface is formed with micro structure
Area, the metal bonding layer being surrounded on described microstructured area and the metal pad being located at described metal bonding layer periphery, described the
Two semiconductor substrate surfaces have the annular protrusion that can form sealing cooperation with described metal bonding layer；
2) pre-cleaning processes are adopted to remove first metal oxide layer on described metal bonding layer and metal pad surface；
3) it is bonded described first Semiconductor substrate and the second Semiconductor substrate by described metal bonding layer and annular protrusion；
4) cutting technique is carried out to described second Semiconductor substrate, to remove the semi-conducting material of described annular protrusion periphery, cut
When cutting, described metal pad surface adsorption has semiconductor grain；
5) make described semiconductor grain oxidation form oxidation particle using oxidation technology, and make described metal pad surface oxidation shape
Become the second metal oxide layer；
6) acidic chemical etching process is adopted to remove described oxidation particle；
7) alkali electroless etching process is adopted to remove described second metal oxide layer.
2. mems device architecture according to claim 1 manufacture method it is characterised in that: described first Semiconductor substrate
And second Semiconductor substrate material be silicon.
3. mems device architecture according to claim 1 manufacture method it is characterised in that: described metal pad and described
The material of metal bonding layer is aluminum.
4. mems device architecture according to claim 1 manufacture method it is characterised in that: step 2) described in prerinse
Technique cleans dhf technique for dilute hydrofluoric acid.
5. mems device architecture according to claim 1 manufacture method it is characterised in that: step 3) adopts gold silicon eutectic
Bonding technology is bonded to described metal bonding layer and annular protrusion.
6. mems device architecture according to claim 1 manufacture method it is characterised in that: the cutting work described in step 4)
Skill is mechanical cutting processes.
7. mems device architecture according to claim 1 manufacture method it is characterised in that: the oxidation work described in step 5)
Skill is boiler tube thermal oxidation technology.
8. mems device architecture according to claim 1 manufacture method it is characterised in that: step 6) adopt dilute hydrogen fluorine
Acid cleaning dhf technique removes the semiconductor grain after oxidation.
9. mems device architecture according to claim 1 manufacture method it is characterised in that: described first Semiconductor substrate
In be also formed with cmos device architecture.
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| CN104944362B true CN104944362B (en) | 2017-01-25 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1428823A (en) * | 2001-12-26 | 2003-07-09 | 旺宏电子股份有限公司 | Method for removing residual polymer from etched weld-padded window |
| CN1815704A (en) * | 2005-02-01 | 2006-08-09 | 探微科技股份有限公司 | Wafer-grade packing method |
| CN102336390A (en) * | 2010-07-26 | 2012-02-01 | 矽品精密工业股份有限公司 | Micro-electro-mechanical structure with pressure sensor and manufacturing method thereof |
| CN102556945A (en) * | 2010-12-13 | 2012-07-11 | 台湾积体电路制造股份有限公司 | Method to prevent metal pad damage in wafer level package |
| CN103420325A (en) * | 2012-04-24 | 2013-12-04 | 罗伯特·博世有限公司 | Method for manufacturing a hybrid integrated component |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7250353B2 (en) * | 2005-03-29 | 2007-07-31 | Invensense, Inc. | Method and system of releasing a MEMS structure |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1428823A (en) * | 2001-12-26 | 2003-07-09 | 旺宏电子股份有限公司 | Method for removing residual polymer from etched weld-padded window |
| CN1815704A (en) * | 2005-02-01 | 2006-08-09 | 探微科技股份有限公司 | Wafer-grade packing method |
| CN102336390A (en) * | 2010-07-26 | 2012-02-01 | 矽品精密工业股份有限公司 | Micro-electro-mechanical structure with pressure sensor and manufacturing method thereof |
| CN102556945A (en) * | 2010-12-13 | 2012-07-11 | 台湾积体电路制造股份有限公司 | Method to prevent metal pad damage in wafer level package |
| CN103420325A (en) * | 2012-04-24 | 2013-12-04 | 罗伯特·博世有限公司 | Method for manufacturing a hybrid integrated component |
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