CN203733778U - Embedded welding pad structure - Google Patents
Embedded welding pad structure Download PDFInfo
- Publication number
- CN203733778U CN203733778U CN201420096802.2U CN201420096802U CN203733778U CN 203733778 U CN203733778 U CN 203733778U CN 201420096802 U CN201420096802 U CN 201420096802U CN 203733778 U CN203733778 U CN 203733778U
- Authority
- CN
- China
- Prior art keywords
- layer
- welding pad
- pad structure
- metal layer
- embedded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/4917—Crossed wires
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
The utility model provides an embedded welding pad structure which is formed on a top metal layer of a chip. The embedded welding pad structure comprises a passivation layer formed on the top metal layer and having an opening exposing the top metal layer, a through hole metal layer deposited in the opening and having a special-shape trench exposing the top metal layer, and a metal welding pad layer filled in the trench until the surfaces of the through hole metal layer and the passivation layer are covered so as to form the embedded welding pad structure. A welding pad is made into an embedded one to enable a welding pad metal layer and the top metal layer to be tightly combined, the adhesion is enhanced, the risk of welding pad stripping is reduced, and the reliability of the chip is improved.
Description
Technical field
The utility model relates to semiconductor process techniques field, particularly relates to a kind of embedded welding pad structure.
Background technology
In semiconductor fabrication process, complete after the manufacture of semiconductor device of leading portion and the manufacturing process of the metal interconnect structure of back segment, need on top-level metallic interconnection line, form weld pad; In packaging technology, outer lead Direct Bonding, on weld pad, or is formed to solder projection on this weld pad.Aluminum metal has lower resistivity, and easily etching and have the advantages such as good caking property with dielectric material, metal material, is commonly used to manufacture weld pad.Because aluminium technique is simple, cost is lower, in the technique of the even less technology node of 65nm, also usually manufactures weld pad by aluminum metal.
Visible, weld pad is structure very special in semiconductor technology, and still, in semiconductor assembly and test link, the situation of test crash is still more common at present, research discovery, and one of them important reason is that the adhesiveness of weld pad and metal level is poor.
Referring to Fig. 1, is the schematic cross-section of welding pad structure of the prior art.As shown in the figure, it is upper that this welding pad structure is formed at the top layer metallic layer 1A of chip, is made up of passivation layer 2A and the welding backing metal layer 4A that be filled in described passivation opening.Conventionally, this welding backing metal layer is aluminium welding pad.As can be seen from Figure, the contact-making surface between welding backing metal layer and top layer metallic layer is plane, causes the adhesiveness between welding backing metal layer and top layer metallic layer poor, and the situation that welding backing metal layer and top layer metallic layer are peeled off easily occurs
Therefore, provide a kind of novel welding pad structure, the adhesiveness strengthening between welding backing metal layer and top layer metallic layer is the problem that those skilled in the art need to solve.
Utility model content
The shortcoming of prior art in view of the above, the purpose of this utility model is to provide a kind of embedded welding pad structure, for solving the bad problem that causes welding backing metal layer to be peeled off of prior art welding backing metal layer and top layer metallic layer adhesiveness.
For achieving the above object and other relevant objects, the utility model provides a kind of embedded welding pad structure, is formed on the top layer metallic layer of chip, and described embedded welding pad structure at least comprises:
Passivation layer, is formed on described top layer metallic layer; Described passivation layer has the opening that exposes described top layer metallic layer;
Via metal layer, is deposited in described opening; Described via metal layer has and exposes the spirality of described top layer metallic layer or the groove of Y-shaped;
Metal welding bed course, is filled in described groove until be covered in described via metal layer and passivation layer surface, forms embedded welding pad structure.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, the metal welding bed course being filled in described groove is embeding layer.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, the shape of described embeding layer is mated with groove, is corresponding spirality or Y-shaped.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, described metal welding bed course is aluminium welding pad.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, the thickness range of described metal welding bed course is 1000~6000 dusts.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, the material of described via metal layer is aluminium.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, described passivation layer is silicon dioxide or silicon nitride.
As the structure of a kind of optimization of embedded welding pad structure of the present utility model, described via metal layer surface is lower than passivation layer surface.
As mentioned above, embedded welding pad structure of the present utility model, described embedded welding pad structure at least comprises: passivation layer, is formed on described top layer metallic layer; Described passivation layer has the opening that exposes described top layer metallic layer; Via metal layer, is deposited in described opening; Described via metal layer has the groove of the given shape that exposes described top layer metallic layer; Metal welding bed course, is filled in described groove until be covered in described via metal layer and passivation layer surface, forms embedded welding pad structure.By weld pad being made into embedded weld pad, welding backing metal layer and top layer metallic layer are combined closely, adhesiveness strengthens, thereby reduces the risk that weld pad is peeled off, and improves the reliability of chip.
Brief description of the drawings
Fig. 1 is welding pad structure schematic diagram of the prior art.
Fig. 2 is that in embedded welding pad structure of the present utility model, embeding layer is spiral cutaway view.
Fig. 3 is that in embedded welding pad structure of the present utility model, embeding layer is spiral stereogram.
Fig. 4 is the cutaway view that in embedded welding pad structure of the present utility model, embeding layer is Y-shaped.
Fig. 5 is the stereogram that in embedded welding pad structure of the present utility model, embeding layer is Y-shaped.
Element numbers explanation
1,1A top layer metallic layer
2,2A passivation layer
3 via metal layers
4,4A welding backing metal layer
41 embeding layers
Embodiment
By particular specific embodiment, execution mode of the present utility model is described below, person skilled in the art scholar can understand other advantages of the present utility model and effect easily by the disclosed content of this specification.
Refer to accompanying drawing.Notice, appended graphic the illustrated structure of this specification, ratio, size etc., all contents in order to coordinate specification to disclose only, understand and read for person skilled in the art scholar, not in order to limit the enforceable qualifications of the utility model, therefore the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under effect that the utility model can produce and the object that can reach, all should still drop on the technology contents that the utility model discloses and obtain in the scope that can contain.Simultaneously, in this specification, quote as " on ", the term of D score, " left side ", " right side ", " centre " and " " etc., also only for ease of understanding of narrating, but not in order to limit the enforceable scope of the utility model, the change of its relativeness or adjustment, changing under technology contents, when being also considered as the enforceable category of the utility model without essence.
Embodiment mono-
As shown in Figures 2 and 3, the utility model provides a kind of embedded welding pad structure, is formed on the top layer metallic layer 1 of chip, and described embedded welding pad structure at least comprises: passivation layer 2, via metal layer 3 and welding backing metal layer 4.
Described passivation layer 2 is formed on described top layer metallic layer 1, and described passivation layer 2 has the opening that exposes described top layer metallic layer 1.This passivation layer 2 can be silicon dioxide, silicon nitride etc., but is not limited to this.In the present embodiment, described passivation layer 2 is silicon dioxide.Can adopt chemical vapor deposition method to prepare described passivation layer 2, preparation method does not limit at this.
Described in the method etching of employing etching, on passivation layer 2, form the opening of exposed top layer metal level 1, the concrete formation method of this opening is: spin coating photoresist layer (diagram) on described passivation layer 2, utilize photoresist layer described in the photoetching technique patternings such as exposure imaging, work as described passivation layer 2 taking photoresist layer as mask layer and carry out etching, form opening.
Described via metal layer 3 is deposited in described opening, and this via metal layer 3 is not filled full described opening, and the surface of via metal layer 3 is lower than passivation layer 2 surfaces.The method that forms described via metal layer 3 can be first to carry out the laggard electroplating of physical vapor deposition (PVD) (ECP) technique.
Described in etching, via metal layer 3 forms the groove with given shape that exposes described top layer metallic layer 1.In the present embodiment, being shaped as of described groove is spiral-shaped.The formation of described groove makes to prepare for follow-up filling welding backing metal layer forms embeding layer.
The material of described via metal layer 3 is aluminium, but is not limited to this, can be also other suitable metal materials.
Described welding backing metal layer 4, is filled in described groove until cover described via metal layer 3 and passivation layer 2 surfaces, forms embedded welding pad structure.Described welding backing metal layer 4 is aluminium welding pad, but is not limited to this.The thickness of described welding backing metal layer 4 is within the scope of 1000~6000 dusts, and in the present embodiment, the thickness of described welding backing metal layer 4 is 2000 dusts.
The welding backing metal layer 4 being filled in described spiral groove is defined as embeding layer 41.Match with groove shape, the embeding layer 41 being formed in spiral groove is also spirality.
As seen from the above description, the embedded welding pad structure that the utility model provides has embeding layer 41, described embeding layer 41 is embedded in the groove of formation of via metal layer 3, and 1 contact of described embeding layer 41 and top layer metallic layer is connected, and realizes the interconnection of weld pad and chip.This have the welding pad structure of embeding layer 41 and the adhesiveness of top layer metallic layer 1 is better, difficult drop-off or peel off.
Embodiment bis-
As shown in Figure 4 and Figure 5, the utility model provides a kind of embedded welding pad structure, is formed on the top layer metallic layer 1 of chip, and described embedded welding pad structure at least comprises: passivation layer 2, via metal layer 3 and welding backing metal layer 4.
Described passivation layer 2 is formed on described top layer metallic layer 1, and described passivation layer 2 has the opening that exposes described top layer metallic layer 1.This passivation layer 2 can be silicon dioxide, silicon nitride etc., but is not limited to this.In the present embodiment, described passivation layer 2 is silicon dioxide.Can adopt chemical meteorology deposition technique to prepare described passivation layer 2, also not limit at this.
Described in the method etching of employing etching, on passivation layer 2, form the opening of exposed top layer metal level 1, the concrete formation method of this opening is: spin coating photoresist layer (diagram) on described passivation layer 2, utilize photoresist layer described in the photoetching technique patternings such as exposure imaging, work as described passivation layer 2 taking photoresist layer as mask layer and carry out etching, form opening.
Described via metal layer 3 is deposited in described opening, and this via metal layer 3 is not filled full described opening, and the surface of via metal layer 3 is lower than passivation layer 2 surfaces.The method that forms described via metal layer 3 can be first to carry out the laggard electroplating of physical vapor deposition (PVD) (ECP) technique.
Described in etching, via metal layer 3 forms the groove with given shape that exposes described top layer metallic layer 1.In the present embodiment, described groove be shaped as Y-shaped shape.The formation of described groove makes to prepare for follow-up filling welding backing metal layer forms embeding layer.
The material of described via metal layer 3 is aluminium, but is not limited to this, can be also other suitable metal materials.
Described welding backing metal layer 4, is filled in described groove until cover described via metal layer 3 and passivation layer 2 surfaces, forms embedded welding pad structure.Described welding backing metal layer 4 is aluminium welding pad, but is not limited to this.The thickness of described welding backing metal layer 4 is within the scope of 1000~6000 dusts, and in the present embodiment, the thickness of described welding backing metal layer 4 is 3000 dusts.
The welding backing metal layer 4 being filled in described Y-shaped groove is defined as embeding layer 41.Match with groove shape, the embeding layer 41 being formed in Y-shaped groove is also Y-shaped.
As seen from the above description, the embedded welding pad structure that the utility model provides has embeding layer 41, described embeding layer 41 is embedded in the groove of formation of via metal layer 3, and 1 contact of described embeding layer 41 and top layer metallic layer is connected, and realizes the interconnection of weld pad and chip.This have the welding pad structure of embeding layer 41 and the adhesiveness of top layer metallic layer 1 is better, difficult drop-off or peel off.
In sum, the utility model provides a kind of embedded welding pad structure, and described embedded welding pad structure at least comprises: passivation layer, is formed on described top layer metallic layer; Described passivation layer has the opening that exposes described top layer metallic layer; Via metal layer, is deposited in described opening; Described via metal layer has the groove of the given shape that exposes described top layer metallic layer; Metal welding bed course, is filled in described groove until be covered in described via metal layer and passivation layer surface, forms embedded welding pad structure.By weld pad being made into embedded weld pad, welding backing metal layer and top layer metallic layer are combined closely, adhesiveness strengthens, thereby reduces the risk that weld pad is peeled off, and improves the reliability of chip.
So the utility model has effectively overcome various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present utility model and effect thereof only, but not for limiting the utility model.Any person skilled in the art scholar all can, under spirit of the present utility model and category, modify or change above-described embodiment.Therefore, have in technical field under such as and conventionally know that the knowledgeable modifies or changes not departing from all equivalences that complete under spirit that the utility model discloses and technological thought, must be contained by claim of the present utility model.
Claims (8)
1. an embedded welding pad structure, is formed on the top layer metallic layer of chip, it is characterized in that, described embedded welding pad structure at least comprises:
Passivation layer, is formed on described top layer metallic layer; Described passivation layer has the opening that exposes described top layer metallic layer;
Via metal layer, is deposited in described opening; Described via metal layer has and exposes the spirality of described top layer metallic layer or the groove of Y-shaped;
Metal welding bed course, is filled in described groove until cover described via metal layer and passivation layer surface, forms embedded welding pad structure.
2. embedded welding pad structure according to claim 1, is characterized in that: the metal welding bed course being filled in described groove is embeding layer.
3. embedded welding pad structure according to claim 2, is characterized in that: the shape of described embeding layer is mated with groove, is corresponding spirality or Y-shaped.
4. embedded welding pad structure according to claim 1, is characterized in that: described metal welding bed course is aluminium welding pad.
5. according to the embedded welding pad structure described in claim 1 or 4, it is characterized in that: the thickness range of described metal welding bed course is 1000~6000 dusts.
6. embedded welding pad structure according to claim 1, is characterized in that: the material of described via metal layer is aluminium.
7. embedded welding pad structure according to claim 1, is characterized in that: described passivation layer is silicon dioxide or silicon nitride.
8. embedded welding pad structure according to claim 1, is characterized in that: described via metal layer surface is lower than passivation layer surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420096802.2U CN203733778U (en) | 2014-03-04 | 2014-03-04 | Embedded welding pad structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420096802.2U CN203733778U (en) | 2014-03-04 | 2014-03-04 | Embedded welding pad structure |
Publications (1)
Publication Number | Publication Date |
---|---|
CN203733778U true CN203733778U (en) | 2014-07-23 |
Family
ID=51203829
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201420096802.2U Expired - Fee Related CN203733778U (en) | 2014-03-04 | 2014-03-04 | Embedded welding pad structure |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN203733778U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108520871A (en) * | 2018-04-20 | 2018-09-11 | 北京智芯微电子科技有限公司 | Embedded pad in wafer stage chip and preparation method thereof |
CN109103069A (en) * | 2017-06-21 | 2018-12-28 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor devices and forming method |
-
2014
- 2014-03-04 CN CN201420096802.2U patent/CN203733778U/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109103069A (en) * | 2017-06-21 | 2018-12-28 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor devices and forming method |
CN109103069B (en) * | 2017-06-21 | 2020-12-22 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor device and forming method |
CN108520871A (en) * | 2018-04-20 | 2018-09-11 | 北京智芯微电子科技有限公司 | Embedded pad in wafer stage chip and preparation method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9773684B2 (en) | Method of manufacturing fan out wafer level package | |
CN103515362B (en) | Stacked package device and the method for encapsulation semiconductor element | |
US8119454B2 (en) | Manufacturing fan-out wafer level packaging | |
CN106653617A (en) | Stacked integrated circuit structure and method of forming | |
CN102969305A (en) | Die-to-die gap control for semiconductor structure and method | |
CN104078431B (en) | Packaging and interconnecting structure and method for copper protruded points filled up with double layers of underfill | |
TWI294151B (en) | Wafer structure and method for fabricating the same | |
CN109979903A (en) | The method of semiconductor devices and manufacturing semiconductor devices with projection cube structure | |
CN103794583A (en) | Method for enhancing the adhesiveness between solder ball and UBM | |
CN102769006A (en) | Semiconductor structure and method for fabricating the same | |
CN203733778U (en) | Embedded welding pad structure | |
Zhang | Fine pitch Cu/Sn solid state diffusion bonding for advanced three-dimensional chip stacking | |
CN104241240A (en) | Semiconductor package and fabrication method thereof | |
CN103050466A (en) | Semiconductor package and fabrication method thereof | |
CN102683309B (en) | Wafer scale plants adapter plate structure of ball indentation brush filling through hole and preparation method thereof | |
CN103681532A (en) | Semiconductor package and fabrication method thereof | |
CN104701288A (en) | Solder joint structure for ball grid array in wafer level package | |
CN106298719A (en) | Metal bump structure and forming method thereof | |
CN100413067C (en) | Chip encapsulation structure and its crystal encapsulation forming method | |
CN103137581B (en) | Semiconductor device with conductive bump, package structure and manufacturing method | |
CN105575911A (en) | Semiconductor package and fabrication method thereof | |
CN106298710B (en) | Substrate structure and manufacturing method thereof and conductive structure | |
CN107564880A (en) | A kind of fan-out package device | |
US8426303B2 (en) | Manufacturing method of semiconductor device, and mounting structure thereof | |
CN107346742A (en) | The preparation method of wafer bumps |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140723 Termination date: 20190304 |
|
CF01 | Termination of patent right due to non-payment of annual fee |