CN104934517A - 一种低热阻贴片发光二极管封装结构及封装方法 - Google Patents

一种低热阻贴片发光二极管封装结构及封装方法 Download PDF

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CN104934517A
CN104934517A CN201510206231.2A CN201510206231A CN104934517A CN 104934517 A CN104934517 A CN 104934517A CN 201510206231 A CN201510206231 A CN 201510206231A CN 104934517 A CN104934517 A CN 104934517A
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led chip
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thermal resistance
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严春伟
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Jiangsu Wenrun Optoelectronic Co Ltd
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/641Heat extraction or cooling elements characterized by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2224/4809Loop shape
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract

本发明公开了一种低热阻贴片发光二极管封装结构,包括铜底材的支架、封装胶、至少一个LED芯片、一条用于使得LED芯片与支架导通的金线;其中,LED芯片固定在支架上,金线键合在LED芯片和支架上,LED芯片的外层包覆有封装胶。本发明还公开了一种低热阻贴片发光二极管封装方法,包括如下步骤:A、提供铜底材的支架;B、将至少一个LED芯片通过固晶机固定到支架上;C、固晶后烘烤,烘烤条件为150℃2HRS;D、采用焊线机将金线键合到LED芯片和支架上,用来导通LED芯片和支架的连接;E、采用压模方式封胶后并切割、测试,完成低热阻贴片发光二极管封装的封装。本发明极大地降低了Chip LED热阻,提升Chip LED散热,降低LED光衰,提升LED寿命。

Description

一种低热阻贴片发光二极管封装结构及封装方法
技术领域
本发明涉及LED芯片封装技术领域,特别是一种低热阻贴片发光二极管封装结构及封装方法。
背景技术
贴片芯片Chip LED是较为标准化的贴片类LED,由于其标准化的特性,使得其便于大规模的生产和使用,广泛的应用于指示和显示领域。
目前Chip SMD发光二极管均采用在PCB板支架上固晶焊线,再压模封装、切割的封装方法。此封装方法虽然封装工艺简单,便于大规模批量生产,但是此种封装的LED采用PCB板支架,PCB的导热系数只能达到16.5W/℃K,造成此种封装的LED热阻较大,产品散热性能较差,产品光衰严重,只能用于封装功率较小的产品。
发明内容
本发明所要解决的技术问题是克服现有技术的不足而提供一种低热阻贴片发光二极管封装结构及封装方法,提升Chip LED散热,降低LED光衰,提升LED寿命。
本发明为解决上述技术问题采用以下技术方案:
根据本发明提出的一种低热阻贴片发光二极管封装结构,包括铜底材的支架、封装胶、至少一个LED芯片、一条用于使得LED芯片与支架导通的金线;其中,
LED芯片固定在支架上,金线键合在LED芯片和支架上,LED芯片的外层包覆有封装胶。
作为本发明所述的一种低热阻贴片发光二极管封装结构进一步优化方案,所述支架的厚度为0.15-0.5mm。
作为本发明所述的一种低热阻贴片发光二极管封装结构进一步优化方案,所述LED芯片是通过固晶机固定到支架上。
作为本发明所述的一种低热阻贴片发光二极管封装结构进一步优化方案,所述金线是通过焊线机键合在LED芯片和支架上。
作为本发明所述的一种低热阻贴片发光二极管封装结构进一步优化方案,所述支架的镀层为银或金或合金。
作为本发明所述的一种低热阻贴片发光二极管封装结构进一步优化方案,所述封装胶为纯树脂或硅胶。
基于一种低热阻贴片发光二极管封装结构的方法,包括如下步骤:
A、提供铜底材的支架;
B、将至少一个LED芯片通过固晶机固定到支架上;
C、固晶后烘烤,烘烤条件为150℃2HRS;
D、采用焊线机将金线键合到LED芯片和支架上,用来导通LED芯片和支架的连接;
E、采用压模方式封胶后并切割、测试,完成低热阻贴片发光二极管的封装。
本发明采用以上技术方案与现有技术相比,具有以下技术效果:
(1)使用铜底材支架替代传统PCB支架,降低了LED热阻,提升了LED散热性能;
(2)在良好的散热条件下使得Chip LED寿命得到保障;
(3)使得Chip LED可以完成中高功率的封装,提升Chip LED的亮度,拓展了Chip LED的应用领域,使得Chip LED应用到照明领域成为可能;
(4)封装工艺与传统工艺一致,适合于大规模批量生产。
附图说明
图1是本发明结构示意图。
图中的附图标记解释为:1-LED芯片,2-金线,3-封装胶,4-支架。
具体实施方式
下面结合附图对本发明的技术方案做进一步的详细说明:
如图1所示是本发明结构示意图,一种低热阻贴片发光二极管封装结构,包括铜底材的支架4、封装胶、至少一个LED芯片1、一条用于使得LED芯片与支架导通的金线2;其中,
LED芯片固定在支架上,金线键合在LED芯片和支架上,LED芯片的外层包覆有封装胶3。
所述支架的厚度为0.15-0.5mm。
所述LED芯片是通过固晶机固定到支架上。
所述金线是通过焊线机键合在LED芯片和支架上。
所述支架的镀层为银或金或合金。
所述封装胶为纯树脂或硅胶。
基于一种低热阻贴片发光二极管封装结构的方法,包括如下步骤:
A、提供铜底材的支架;
B、将至少一个LED芯片通过固晶机固定到支架上;
C、固晶后烘烤,烘烤条件为150℃2HRS;
D、采用焊线机将金线键合到LED芯片和支架上,用来导通LED芯片和支架的连接;
E、采用压模方式封胶后并切割、测试,完成低热阻贴片发光二极管的封装。
此种封装的Chip LED,与传统封装的Chip LED相比,封装工艺与传统封装一致,将传统的PCB支架替换为铜底材支架,PCB导热系数为16.5W/℃K,铜的导热系数为400W/℃K,极大的降低了LED热阻,提升LED散热性能。
本发明采用以上技术方案与现有技术相比,具有以下技术效果:
(1)使用铜底材支架替代传统PCB支架,降低了LED热阻,提升了LED散热性能;
(2)在良好的散热条件下使得Chip LED寿命得到保障;
(3)使得Chip LED可以完成中高功率的封装,提升Chip LED的亮度,拓展了Chip LED的应用领域,使得Chip LED应用到照明领域成为可能;
(4)封装工艺与传统工艺一致,适合于大规模批量生产。
显然,本发明的上述实施例仅仅是为清楚地说明本发明所作的举例,而并非是对本发明的实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而这些属于本发明的实质精神所引伸出的显而易见的变化或变动仍属于本发明的保护范围。

Claims (7)

1.一种低热阻贴片发光二极管封装结构,其特征在于,包括铜底材的支架、封装胶、至少一个LED芯片、一条用于使得LED芯片与支架导通的金线;其中,
LED芯片固定在支架上,金线键合在LED芯片和支架上,LED芯片的外层包覆有封装胶。
2.根据权利要求1所述的一种低热阻贴片发光二极管封装结构,其特征在于,所述支架的厚度为0.15-0.5mm。
3.根据权利要求1所述的一种低热阻贴片发光二极管封装结构,其特征在于,所述LED芯片是通过固晶机固定到支架上。
4.根据权利要求1所述的一种低热阻贴片发光二极管封装结构,其特征在于,所述金线是通过焊线机键合在LED芯片和支架上。
5.根据权利要求1所述的一种低热阻贴片发光二极管封装结构,其特征在于,所述支架的镀层为银或金或合金。
6.根据权利要求1所述的一种低热阻贴片发光二极管封装结构,其特征在于,所述封装胶为纯树脂或硅胶。
7.基于权利要求1所述的一种低热阻贴片发光二极管封装方法,其特征在于,包括如下步骤:
A、提供铜底材的支架;
B、将至少一个LED芯片通过固晶机固定到支架上;
C、固晶后烘烤,烘烤条件为150℃2HRS;
D、采用焊线机将金线键合到LED芯片和支架上,用来导通LED芯片和支架的连接;
E、采用压模方式封胶后并切割、测试,完成低热阻贴片发光二极管的封装。
CN201510206231.2A 2015-04-28 2015-04-28 一种低热阻贴片发光二极管封装结构及封装方法 Pending CN104934517A (zh)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252486A (zh) * 2016-08-03 2016-12-21 中山市雄纳五金照明科技有限公司 一种led贴片灯的制作方法
CN106910721A (zh) * 2017-03-08 2017-06-30 东莞市佳骏电子科技有限公司 一种二极管及其封装工艺流程
WO2020125262A1 (zh) * 2018-12-17 2020-06-25 深圳市瑞丰光电子股份有限公司 一种led封装结构及led灯组件

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202142577U (zh) * 2011-06-21 2012-02-08 深圳市天电光电科技有限公司 Led支架量产片、led支架单体及led封装结构
CN203312364U (zh) * 2013-06-07 2013-11-27 深圳市晶台光电有限公司 一种方形陶瓷cob封装结构
CN204155958U (zh) * 2014-10-27 2015-02-11 深圳市源磊科技有限公司 片上芯片封装光源

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202142577U (zh) * 2011-06-21 2012-02-08 深圳市天电光电科技有限公司 Led支架量产片、led支架单体及led封装结构
CN203312364U (zh) * 2013-06-07 2013-11-27 深圳市晶台光电有限公司 一种方形陶瓷cob封装结构
CN204155958U (zh) * 2014-10-27 2015-02-11 深圳市源磊科技有限公司 片上芯片封装光源

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252486A (zh) * 2016-08-03 2016-12-21 中山市雄纳五金照明科技有限公司 一种led贴片灯的制作方法
CN106910721A (zh) * 2017-03-08 2017-06-30 东莞市佳骏电子科技有限公司 一种二极管及其封装工艺流程
WO2020125262A1 (zh) * 2018-12-17 2020-06-25 深圳市瑞丰光电子股份有限公司 一种led封装结构及led灯组件

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