CN104900212A - Wiring structure for GOA (Gate driver On Array) circuit - Google Patents

Wiring structure for GOA (Gate driver On Array) circuit Download PDF

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Publication number
CN104900212A
CN104900212A CN201510377541.0A CN201510377541A CN104900212A CN 104900212 A CN104900212 A CN 104900212A CN 201510377541 A CN201510377541 A CN 201510377541A CN 104900212 A CN104900212 A CN 104900212A
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CN
China
Prior art keywords
patch cord
resistance
measured
wiring structure
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510377541.0A
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Chinese (zh)
Inventor
王遵淯
郑美俊
游腾亮
杨哲豪
王嘉驹
黄怡平
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AU Optronics Corp
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AU Optronics Corp
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Priority to CN201510377541.0A priority Critical patent/CN104900212A/en
Publication of CN104900212A publication Critical patent/CN104900212A/en
Pending legal-status Critical Current

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Abstract

The invention provides a wiring structure for a GOA (Gate driver On Array) circuit. The wiring structure comprises a scan line to be measured and a rescue line, wherein the scan line to be measured is located in the GOA circuit, and the rescue line is located in the GOA circuit. The scan line to be measured and the rescue line are at least partially overlapped and are electrically coupled in a welding manner, so as to achieve the function of multiplexing the rescue line. Compared with the prior art, the wiring structure has the advantages that the scan line to be measured is electrically coupled to the rescue line in the welding manner, so that the sharing between dummy gate wires in a liquid crystal cell and the rescue line is realized, then, the number of the dummy gate wires in the GOA circuit is reduced, and high-frequency signal interference caused by line variety is lowered. In addition, a simple circuit design is utilized, and the function of multiplexing the rescue line is achieved through testing switching cooperation between a first resistor and a second resistor which are additionally arranged on a circuit board, so that the number of wires in the GOA circuit is reduced, the location of the scan line to be measured can be freely changed and selected, and then, the flexibility of measurement is improved.

Description

A kind of Wiring structure of array base palte horizontal drive circuit
Technical field
The present invention relates to a kind of gate driver circuit of liquid crystal indicator, particularly relate to a kind of Wiring structure of array base palte horizontal drive circuit.
Background technology
Array base palte row cutting (Gate Driver on Array, GOA) technology is directly produced on array base palte (Array Substrate), to replace by a kind of technology of the raster data model wafer of external silicon wafer fabrication by gate driver circuit (Gate Driver ICs).As a rule, used the liquid crystal panel of GOA technology in GOA liquid crystal at Thin Film Transistor-LCD (Thin Film Transistor Liquid Crystal Display, TFT-LCD).Compared with traditional TFT-LCD, GOA liquid crystal not only escapable cost, owing to eliminating the binding technique in grid direction, thus to lifting production capacity advantageously.
In the manufacture process of GOA circuit, because of GOA grid there is short circuit or open circuit, there is short circuit in source electrode or open circuit, liquid crystal cell (cell) the inside have been mixed into the reasons such as dust, panel is often made to occur bad phenomenon, such as short circuit, broken string, bright spot, gray scale inequality or vanishing point etc.In prior art, the cabling of GOA inside circuit comprises patch cord (rescue line), the common electrode wire (array com) of array base palte, many circuits such as common electrode feedback line (array com FB), high frequency clock signal line (HC), dummy gate (dummy gate) of array base palte usually, and the various high-frequency signals that easily causes of circuit disturbs, affect the Signal transmissions of GOA circuit.
In view of this, how designing a kind of Wiring structure of array base palte horizontal drive circuit, to eliminate above-mentioned defect of the prior art or deficiency, is the problem that person skilled is urgently to be resolved hurrily in the industry.
Summary of the invention
For the defect of the various easy formation high-frequency signals interference of GOA circuit because cabling of the prior art, the invention provides a kind of Wiring structure of GOA circuit of novelty.
According to one aspect of the present invention, provide a kind of Wiring structure of GOA circuit, comprising:
One trace wiring to be measured, is positioned at a GOA circuit; And
One patch cord, be positioned at described GOA circuit, wherein, described trace wiring to be measured is overlapping at least partly with described patch cord, by patch cord and described trace wiring to be measured described in welding (welding) mode electric property coupling, thus realize the multiplexing function of described patch cord.
An embodiment wherein, described GOA circuit is positioned at the inside of liquid crystal cell, and the outside of described liquid crystal cell is provided with a testing circuit board, it comprises: one first resistance and one second resistance, and the switching through described first resistance and described second resistance coordinates with the multiplexing function realizing described patch cord.
An embodiment wherein, when line function is repaiied in described patch cord maintenance normally, described first resistance and described patch cord are electrically connected, and described second resistance and described patch cord electrically disconnect, and described trace wiring to be measured and described patch cord electrically disconnect.
An embodiment wherein, when described trace wiring to be measured need carry out measurement operation, described second resistance and described patch cord are electrically connected, and described first resistance and described patch cord electrically disconnect, and described trace wiring to be measured and described patch cord are by welding manner electric property coupling.
An embodiment wherein, the part being positioned at the described patch cord below welding region is cut off.
An embodiment wherein, described first resistance is Zero-ohm resistor.
An embodiment wherein, described second resistance is Zero-ohm resistor.
Adopt the Wiring structure of GOA circuit of the present invention, it comprises a trace wiring to be measured and a patch cord, and trace wiring to be measured and patch cord are overlapping at least partly, trace wiring to be measured is electrically coupled to patch cord by welding manner by this Wiring structure, thus make the dummy gate cabling in liquid crystal cell and patch cord realize sharing, and then reduce the number of the dummy gate cabling in GOA circuit, reduce because of the various caused high-frequency signals interference of circuit.Compared to prior art, the present invention utilizes simple circuit to design, switching between the first resistance set up through testing circuit board and the second resistance coordinates the multiplexing function reaching patch cord, when line function is repaiied in patch cord maintenance normally, the first resistance and patch cord are electrically connected and the second resistance and patch cord electrically disconnect; And trace wiring to be measured need carry out measurement operation time, second resistance and patch cord are electrically connected and the first resistance and patch cord electrically disconnect, and trace wiring to be measured and patch cord are by welding manner electric property coupling, not only reduce the cabling number in GOA circuit, also can freely change and select the position of trace wiring to be measured, and then promote the dirigibility of measuring.
Accompanying drawing explanation
Reader, after having read the specific embodiment of the present invention with reference to accompanying drawing, will become apparent various aspects of the present invention.Wherein,
Fig. 1 illustrates the drive principle schematic diagram of a kind of GOA circuit of the prior art;
Fig. 2 illustrates in the GOA circuit of Fig. 1, adopts multiple dummy gate to measure the schematic diagram of the waveform of corresponding trace wiring;
Fig. 3 (a) illustrates according to one embodiment of the present invention, can reduce the schematic diagram of the Wiring structure of the number of lines in GOA circuit;
Fig. 3 (b) illustrates in the Wiring structure of Fig. 3 (a), the view that trace wiring to be measured is overlapping at least partly with patch cord;
Fig. 4 illustrates in the Wiring structure of Fig. 3 (a), and patch cord is as the first resistance when normally repairing line function and the second resistance switching schematic diagram;
Fig. 5 (a) illustrates in the Wiring structure of Fig. 3 (a), the first resistance when patch cord is multiplexed with the cabling of dummy gate in GOA circuit and the second resistance switching schematic diagram; And
Fig. 5 (b) illustrates in the Wiring structure of Fig. 5 (a), and trace wiring to be measured and patch cord carry out the view of electric property coupling by welding manner.
Embodiment
The technology contents disclosed to make the application is more detailed and complete, and can refer to accompanying drawing and following various specific embodiment of the present invention, mark identical in accompanying drawing represents same or analogous assembly.But those of ordinary skill in the art should be appreciated that hereinafter provided embodiment is not used for limiting the scope that contains of the present invention.In addition, accompanying drawing, only for being schematically illustrated, is not drawn according to its life size.
With reference to the accompanying drawings, the embodiment of various aspects of the present invention is described in further detail.
Fig. 1 illustrates the drive principle schematic diagram of a kind of GOA circuit of the prior art.With reference to Fig. 1, this GOA circuit comprise multilevel scanning circuit Scan 1, Scan 2 ..., Scan6, wherein, high frequency clock signal HC1 inputs to trace wiring Scan 1, and high frequency clock signal HC2 inputs to trace wiring Scan 2, and high frequency clock signal HC3 inputs to trace wiring Scan 3, high frequency clock signal HC4 inputs to trace wiring Scan 4, afterwards, high frequency clock signal HC1 inputs to trace wiring Scan 5, and high frequency clock signal HC2 inputs to trace wiring Scan 6.That is, high frequency clock signal HC1 inputs to trace wiring Scan 1 and Scan 5 simultaneously, and high frequency clock signal HC2 inputs to trace wiring Scan 2 and Scan 6 simultaneously.
In addition, prime trace wiring and rear class trace wiring close association on Control timing sequence.Specifically, the control signal turn off2 that the control signal turn off1 that rear class trace wiring Scan 2 exports is used for closing prime trace wiring Scan 1, rear class trace wiring Scan 3 output is used for closing prime trace wiring Scan 2.Similarly, the control signal turn off4 that the control signal turn off3 that rear class trace wiring Scan 4 exports is used for closing prime trace wiring Scan 3, rear class trace wiring Scan 5 output is used for closing prime trace wiring Scan 4.
Fig. 2 illustrates in the GOA circuit of Fig. 1, adopts multiple dummy gate to measure the schematic diagram of the waveform of corresponding trace wiring.
With reference to Fig. 2, figure notation 100 represents liquid crystal cell (cell), and the GOA circuit of 102 expression liquid crystal cells 100,200 represent testing circuit board (also can be described as P plate).Testing circuit board 200 comprises dummy gate 202 and dummy gate 204, wherein, dummy gate 202 is electrically coupled to the trace wiring to be measured of the correspondence in GOA circuit 102 thus measures its waveform, and dummy gate 204 is electrically coupled to the trace wiring to be measured of the correspondence in GOA circuit 102 thus measures its waveform.
As mentioned before, current GOA inside circuit comprises polytype cabling usually, the common electrode wire (array com) of such as patch cord (rescue line), array base palte, many circuits such as common electrode feedback line (array com FB), high frequency clock signal line (HC), dummy gate (dummy gate) of array base palte, and the various high-frequency signals that easily causes of circuit disturbs, affect the Signal transmissions of GOA circuit.In addition, the connection one_to_one corresponding between dummy gate and trace wiring to be measured, its metering system is more inflexible, cannot measure the waveform on different scanning circuit flexibly.
In order to solve the aforementioned problems in the prior, the invention provides a kind of Wiring structure of GOA circuit of novelty.Fig. 3 (a) illustrates according to one embodiment of the present invention, can reduce the schematic diagram of the Wiring structure of the number of lines in GOA circuit.Fig. 3 (b) illustrates in the Wiring structure of Fig. 3 (a), the view that trace wiring to be measured is overlapping at least partly with patch cord.
With reference to Fig. 3 (a), in this embodiment, Wiring structure of the present invention comprises trace wiring 104 to be measured and a patch cord 106, is all positioned at GOA circuit.It should be noted that, trace wiring 104 to be measured is overlapping at least partly with patch cord 106, as shown in Fig. 3 (b).Thus, trace wiring 104 to be measured can be electrically coupled to patch cord 106 by welding (welding) mode by the present invention, make the patch cord 106 in GOA circuit be used as the cabling of dummy gate 202 in circuit, and then realize the multiplexing of patch cord and sharing functionality.
At a specific embodiment, GOA circuit is positioned at the inside of liquid crystal cell 100, and the outside of liquid crystal cell 100 is provided with a testing circuit board 200.Testing circuit board 200 comprises one first resistance R1 and one second resistance R2, and the present invention coordinates through the switching of the first resistance R1 and the second resistance R2 with the multiplexing function realizing patch cord.At this, switching coordinates and mainly refers to the first resistance R1 and patch cord 106 electric property coupling or disconnection, the second resistance R2 and patch cord 106 electric property coupling or disconnection.
At a specific embodiment, the first resistance R1 is Zero-ohm resistor.Or the second resistance R2 is Zero-ohm resistor.Here, Zero-ohm resistor is also called cross-over connection resistor, is a kind of resistance of specific use, 0 Ohmage the resistance of really is zero, and it is actual is the resistance that resistance value is very little.Such as, when two in board design can not connect with P.e.c., often connect at front cross-line, and in order to allow automatic placement machine and automatism card machine normally work, Zero-ohm resistor can be used to replace cross-line.In a sense, Zero-ohm resistor is used only on circuit board to debug convenient or compatible design etc.
Fig. 4 illustrates in the Wiring structure of Fig. 3 (a), and patch cord is as the first resistance when normally repairing line function and the second resistance switching schematic diagram.
With reference to Fig. 4, in this embodiment, patch cord 106 is used as to repair line function normally.Particularly, when patch cord 106 maintain repair line function normally time, the first resistance R1 and patch cord 106 are electrically connected, and the second resistance R2 and patch cord 106 electrically disconnect.Now, though trace wiring to be measured 104 and patch cord 106 partly overlap, do not apply welding operation, thus electrically do not connect between trace wiring 104 to be measured and patch cord 106.
Fig. 5 (a) illustrates in the Wiring structure of Fig. 3 (a), the first resistance when patch cord is multiplexed with the cabling of dummy gate in GOA circuit and the second resistance switching schematic diagram.Fig. 5 (b) illustrates in the Wiring structure of Fig. 5 (a), and trace wiring to be measured and patch cord carry out the view of electric property coupling by welding manner.
With reference to Fig. 5 (a) and Fig. 5 (b), in this embodiment, patch cord 106 is multiplexed with the cabling of dummy gate 202 at GOA inside circuit, to measure the waveform of trace wiring 104 to be measured.Specifically, when trace wiring 104 to be measured need carry out measurement operation, the second resistance R2 and patch cord 106 are electrically connected, and the first resistance R1 and patch cord 106 electrically disconnect, and trace wiring 104 to be measured and patch cord 106 are by welding manner electric property coupling, as shown in Fig. 5 (b).Preferably, in this case, also a part for the patch cord 104 be positioned at below welding region can be cut off.Be to be understood that, trace wiring to be measured 104 in GOA circuit can be replaced by different trace wirings according to actual measurement demand, because these trace wirings are overlapping at least partly with patch cord 104, therefore welding operation always can be utilized to measure the waveform on any trace wiring in these trace wirings, and then improve the flexibility ratio of measurement.
Adopt the Wiring structure of GOA circuit of the present invention, it comprises a trace wiring to be measured and a patch cord, and trace wiring to be measured and patch cord are overlapping at least partly, trace wiring to be measured is electrically coupled to patch cord by welding manner by this Wiring structure, thus make the dummy gate cabling in liquid crystal cell and patch cord realize sharing, and then reduce the number of the dummy gate cabling in GOA circuit, reduce because of the various caused high-frequency signals interference of circuit.Compared to prior art, the present invention utilizes simple circuit to design, switching between the first resistance set up through testing circuit board and the second resistance coordinates the multiplexing function reaching patch cord, when line function is repaiied in patch cord maintenance normally, the first resistance and patch cord are electrically connected and the second resistance and patch cord electrically disconnect; And trace wiring to be measured need carry out measurement operation time, second resistance and patch cord are electrically connected and the first resistance and patch cord electrically disconnect, and trace wiring to be measured and patch cord are by welding manner electric property coupling, not only reduce the cabling number in GOA circuit, also can freely change and select the position of trace wiring to be measured, and then promote the dirigibility of measuring.
Above, the specific embodiment of the present invention is described with reference to the accompanying drawings.But those skilled in the art can understand, when without departing from the spirit and scope of the present invention, various change and replacement can also be done to the specific embodiment of the present invention.These change and replace and all drop in claims of the present invention limited range.

Claims (7)

1. a Wiring structure for array base palte row cutting (Gate driver On Array, GOA) circuit, it is characterized in that, this Wiring structure comprises:
One trace wiring to be measured, is positioned at a GOA circuit; And
One patch cord, be positioned at described GOA circuit, wherein, described trace wiring to be measured is overlapping at least partly with described patch cord, by patch cord and described trace wiring to be measured described in welding (welding) mode electric property coupling, thus realize the multiplexing function of described patch cord.
2. Wiring structure according to claim 1, is characterized in that, described GOA circuit is positioned at the inside of liquid crystal cell, and the outside of described liquid crystal cell is provided with a testing circuit board, and it comprises:
One first resistance and one second resistance, the switching through described first resistance and described second resistance coordinates with the multiplexing function realizing described patch cord.
3. Wiring structure according to claim 2, it is characterized in that, when line function is repaiied in described patch cord maintenance normally, described first resistance and described patch cord are electrically connected, described second resistance and described patch cord electrically disconnect, and described trace wiring to be measured and described patch cord electrically disconnect.
4. Wiring structure according to claim 2, it is characterized in that, when described trace wiring to be measured need carry out measurement operation, described second resistance and described patch cord are electrically connected, described first resistance and described patch cord electrically disconnect, and described trace wiring to be measured and described patch cord are by welding manner electric property coupling.
5. Wiring structure according to claim 4, is characterized in that, the part being positioned at the described patch cord below welding region is cut off.
6. the Wiring structure according to claim 2 to 5 any one, is characterized in that, described first resistance is Zero-ohm resistor.
7. the Wiring structure according to claim 2 to 5 any one, is characterized in that, described second resistance is Zero-ohm resistor.
CN201510377541.0A 2015-07-01 2015-07-01 Wiring structure for GOA (Gate driver On Array) circuit Pending CN104900212A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109445212A (en) * 2018-12-12 2019-03-08 惠科股份有限公司 A kind of display device and its restorative procedure and display
CN109683413A (en) * 2019-02-13 2019-04-26 深圳市华星光电半导体显示技术有限公司 A kind of array substrate and its broken wire repair method
CN110471812A (en) * 2019-07-23 2019-11-19 广东以诺通讯有限公司 A kind of method of USB and AccessPort multiplexing
CN111770629A (en) * 2020-07-10 2020-10-13 福建升腾资讯有限公司 Method for multiplexing on PCB
CN112290222A (en) * 2020-09-27 2021-01-29 南京大学 Programmable anisotropic coded super surface
WO2023115549A1 (en) * 2021-12-21 2023-06-29 Tcl华星光电技术有限公司 Display panel and display apparatus

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109445212A (en) * 2018-12-12 2019-03-08 惠科股份有限公司 A kind of display device and its restorative procedure and display
CN109683413A (en) * 2019-02-13 2019-04-26 深圳市华星光电半导体显示技术有限公司 A kind of array substrate and its broken wire repair method
CN110471812A (en) * 2019-07-23 2019-11-19 广东以诺通讯有限公司 A kind of method of USB and AccessPort multiplexing
CN111770629A (en) * 2020-07-10 2020-10-13 福建升腾资讯有限公司 Method for multiplexing on PCB
CN111770629B (en) * 2020-07-10 2022-01-07 福建升腾资讯有限公司 Method for multiplexing on PCB
CN112290222A (en) * 2020-09-27 2021-01-29 南京大学 Programmable anisotropic coded super surface
CN112290222B (en) * 2020-09-27 2021-10-08 南京大学 Programmable anisotropic coded super surface
WO2023115549A1 (en) * 2021-12-21 2023-06-29 Tcl华星光电技术有限公司 Display panel and display apparatus

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Application publication date: 20150909