CN104851971A - TFT structure based on piezoelectric material active layer and preparation method thereof - Google Patents

TFT structure based on piezoelectric material active layer and preparation method thereof Download PDF

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Publication number
CN104851971A
CN104851971A CN201510281704.5A CN201510281704A CN104851971A CN 104851971 A CN104851971 A CN 104851971A CN 201510281704 A CN201510281704 A CN 201510281704A CN 104851971 A CN104851971 A CN 104851971A
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piezoelectric
active layer
layer
tft structure
structure based
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叶芸
郭太良
陈恩果
康冬茹
林连秀
汪江胜
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Fuzhou University
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Fuzhou University
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Abstract

The present invention relates to a TFT structure based on a piezoelectric material active layer and a preparation method thereof. The TFT comprises a substrate, a gate, an insulating layer, an active layer, a source electrode and a drain electrode. The active layer is made of an oxide or organic matter with the adding of a piezoelectric material. The oxide or organic matter with the adding of the piezoelectric material is used as the active layer of a TFT device. Due to the characteristics of the piezoelectric material, when gate and drain electrode voltage is applied, the channel in the active layer is deformed under a mechanical force, the carrier concentration of a channel layer is increased, a carrier mobility rate is raised, and the threshold voltage of the device is reduced through integration. The TFT structure based on the piezoelectric material is precise and simple to control, the threshold voltage can be reduced, the mobility is improved, and the TFT performance is improved.

Description

A kind of TFT structure based on piezoelectric active layer and preparation method thereof
Technical field
The present invention relates to a kind of TFT structure based on piezoelectric active layer and preparation method thereof.
Background technology
In recent years, TFT-LCD obtains and develops rapidly.TFT-LCD and Thin Film Transistor (TFT) liquid crystal display are the one in active matrix type display AM-LCD, can initiatively control each independent pixel on screen, and the image realized without crosstalk shows, and greatly can improve the reaction time.In a liquid crystal display, it is unique display device of comprehensively catching up with and surpassing CRT in the combination properties such as brightness, contrast, power consumption, life-span, volume and weight at present, function admirable, can be mass-produced, automaticity is high, the cost of raw material is low, has become the main product of new century, has attracted more and more people to pay close attention to and research.The display quality of TFT-LCD and overall performance depend on the performance of TFT to a great extent.
How to improve in the process of thin-film transistor performance in research, it is found that the channel thickness of active layer has a great impact TFT device performance.Shown the reduction of active layer thickness by theory analysis and experiment, the increase of subthreshold characteristic parameter S can be suppressed, can subthreshold behavior be improved.Suitable thinning active layer thickness, will be conducive to the reduction of off-state current, but thinning exceed certain limit after, on state current also along with remarkable reduction, can cause very bad impact to device, and therefore the thinning of active layer thickness has certain limit.The reduction of active layer thickness, threshold voltage also reduces, and be reduced to a certain degree, threshold voltage tends towards stability.In addition, the electric property of breadth length ratio on TFT of raceway groove also has impact.
For N-shaped TFT, add forward voltage (drain electrode just connects, and source electrode connects negative) in drain-source pole, guide electronics mobile to drain electrode from source electrode.When grid applies zero-bias, or when grid voltage is less than threshold voltage, in raceway groove, charge inducing is little, does not substantially have electric current and flows through.When grid voltage is more than or equal to threshold voltage, and apply drain voltage, source ground, the charge carrier in channel layer is subject to the effect of electric field, in active layer and the accumulation of interfacial dielectric layer place, forms conducting channel.When grid voltage increases, carrier concentration increases, and charge carrier can more easily drift about in raceway groove, thus carrier mobility increases.
Channel length reflects charge carrier by the probability that interface gap state is caught in transition process, and raceway groove is longer, and the probability that charge carrier is captured is larger; Channel width reflects charge carrier not by the probability that interface gap state is caught in transition process, and raceway groove is wider, and the probability that charge carrier is not captured is larger.Therefore, channel width-over-length ratio is larger, and charge carrier more easily drifts about, and threshold voltage is less.Conducting channel length is generally the distance of source-drain electrode, although be less than distance between source-drain electrode by making conducting channel, the length of conducting channel can be shortened, thus improve On current and the characteristic of TFT, but because etching ohmic contact layer forms conducting channel, add the complexity of technique.
Summary of the invention
In view of this, the object of this invention is to provide a kind of TFT structure based on piezoelectric active layer and preparation method thereof.
To achieve these goals, the present invention adopts following a kind of technical scheme: a kind of TFT structure based on piezoelectric active layer, comprise substrate, grid, insulating barrier, piezoelectric active layer, source electrode and drain electrode, described piezoelectric active layer is the semiconductor active layer containing piezoelectric.
Preferably, described piezoelectric active layer carries out by piezoelectric and semiconductor active layer the composite active layer that mixes.
Preferably, described piezoelectric active layer comprises the semiconductor active layer be made up of semi-conducting material and the piezoelectric layer be made up of piezoelectric, and at least one in the upper surface of described semiconductor active layer and lower surface is provided with piezoelectric layer.
Preferably, described piezoelectric comprises at least one in piezoelectric ceramic and piezopolymer, and described piezoelectric ceramic comprises BaTiO 3, PbTiO 3, Pb (TiZr) O 3, Ba (TiSr) O 3, the combination of any one or more in modified PZT and modification BST, described piezopolymer comprises the combination of any one or two kinds of in PVDF and P (VDF-TrFE).
Preferably, the piezoelectric of described composite active layer is made up of the piezoelectric ceramic of 20%-80% and the piezopolymer of 20%-80%.
Preferably, the thickness of described composite active layer is 0.01 μm-50 μm.
Preferably, the thickness of described piezoelectric layer is 5nm-10 μm, and the thickness of described semiconductor active layer is 0.01 μm-50 μm.
To achieve these goals, the present invention also adopts following a kind of technical scheme: a kind of preparation method of the TFT structure based on piezoelectric active layer, comprises the following steps:
(1) cleaning base plate, and dry;
(2) on substrate, bottom electrode is made;
(3) on the substrate making bottom electrode, insulating barrier is made;
(4) piezoelectric and semi-conducting material is adopted to make piezoelectric active layer on the insulating layer;
(5) on piezoelectric active layer, protective layer is made;
(6) top electrode is made on the protection layer.
Preferably, the production method of described piezoelectric active layer comprises the combination of any one or more in ald, laser molecular beam epitaxy, chemical vapour deposition (CVD), pulsed laser deposition, rf magnetron sputtering, inkjet printing and spin coating.
Preferably, the preparation flow of described piezoelectric be prepare burden, be mixed and finely ground, pre-burning, secondary is levigate, granulation, shaping, plastic removal, sinter into porcelain, sharp processing, by electrode, high voltage polarization and burn-in test.
Compared with prior art, the present invention has following beneficial effect: should be more accurate and control simple based on the TFT structure of piezoelectric active layer, can reduce off-state current, reduce threshold voltage, improve ON state current, thus raising device performance.TFT device adopts piezoelectric and semi-conducting material manufacturing piezoelectric active layer, and due to the inverse piezoelectric effect of piezoelectric, when applying grid and drain voltage, in piezoelectric active layer, conducting channel can be subject to mechanical force and deformation; Select different piezoelectrics, by regulation voltage, channel thickness and wide length can be controlled.Apply suitable voltage, thinning channel thickness, be conducive to reducing off-state current, reduce threshold voltage; Reduce the length of raceway groove, be conducive to the ON state current improving device, be conducive to high-resolution product.Due to technique controlling to be difficult to the length and width of raceway groove, utilize the characteristic of piezoelectric here, can finely tune the wide length of raceway groove and thickness.
Accompanying drawing explanation
Fig. 1 is the organigram of the embodiment of the present invention one.
Fig. 2 is the organigram of the embodiment of the present invention two.
Fig. 3 is the organigram of the embodiment of the present invention three.
Fig. 4 is the organigram of the embodiment of the present invention four.
Mark in figure: 11,21,31,41-substrate; 12,22,32,42-grid; 13,23,33,43-insulating barrier; 14,24,34,44-piezoelectric active layer, 241,341,441-semiconductor active layer, 242,342-piezoelectric layer; 442-lower piezoelectric layer; the upper piezoelectric layer of 443-, 15,25,35,45-protective layer, 16,26,36,46-source electrode and drain electrode.
Embodiment
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing, be described in detail below.
embodiment one: as shown in Figure 1; a kind of TFT structure based on piezoelectric active layer; comprise substrate 11, grid 12, insulating barrier 13, piezoelectric active layer 14, protective layer 15, source electrode and drain electrode 16; described piezoelectric active layer 14 is the semiconductor active layers containing piezoelectric, is specifically carried out the composite active layer mixed by piezoelectric and semiconductor active layer.Wherein, described grid 12 is made on substrate 11, and described insulating barrier 13 is uniformly distributed on substrate 11, and described composite active layer is evenly distributed on insulating barrier 13; described protective layer 15 is evenly distributed on composite active layer, and described source electrode and drain electrode 16 are distributed in the two ends of protective layer 15 respectively.
In embodiment one, described piezoelectric is a kind of functional material mechanical energy and electric energy can changed mutually, comprises at least one in piezoelectric ceramic and piezopolymer, as the BaTiO in piezoelectric ceramic 3, PbTiO 3, Pb (TiZr) O 3(i.e. PZT), Ba (TiSr) O 3(i.e. BST), modified PZT, modification BST etc., as PVDF, P (VDF-TrFE) etc. in piezopolymer.The manufacture characteristic of described piezoelectric carries out polarization process to ferroelectric material under strong dc electric field, makes it to have piezoelectric effect; General polarized electric field is 3 ~ 5kV/mm, and temperature is 100 ~ 150 DEG C, and the time is 5 ~ 20min.The piezoelectric effect principle of described piezoelectric is if apply pressure to piezoelectric, can produce potential difference, be referred to as direct piezoelectric effect; Otherwise applying voltage, then produce mechanical stress, is called inverse piezoelectric effect.The technological process of described piezoelectric is as follows: prepare burden, be mixed and finely ground, pre-burning, secondary is levigate, granulation, shaping, plastic removal, sinter into porcelain, sharp processing, by electrode, high voltage polarization and burn-in test.Described piezoelectric is electrically strong, dielectric constant is high, can be processed into arbitrary shape.
In embodiment one, the piezoelectric of described composite active layer can be made up of the piezopolymer of the piezoelectric ceramic of 20%-80% and 20%-80%, such as 50% piezoelectric ceramic and 50% piezopolymer.Described insulating barrier 13 thickness is 50nm-200nm; the thickness of described composite active layer is 0.01 μm-50 μm, and the thickness of described protective layer 15 is 20nm-200nm, and the thickness of described source electrode and drain electrode 16 is 10nm-1000nm; width is 10 μm-500 μm, and the spacing of the two is 1 μm-100 μm.The material of described source electrode and drain electrode 16 is the alloy of any one metal in Al, Cu, Cr, Sn, In, Zn, Ag, Au, Pt, Pd, Cd, Bi and Sb or its oxide or various metals.
In embodiment one, based on the preparation method of the TFT structure of piezoelectric active layer, should comprise the following steps: (1) cleaning base plate 11, and dry; (2) grid 12(and bottom electrode is made on the substrate 11); (3) on the substrate 11 making grid 12, insulating barrier 13 is made; (4) on insulating barrier 13, piezoelectric and semi-conducting material is adopted to carry out mixing manufacture composite active layer; (5) on composite active layer, protective layer 15 is made; (6) on protective layer 15, source electrode is made and drain 16(and top electrode).Concrete operations are as follows:
Step (1): substrate 11 carries out Ultrasonic Cleaning with acetone and ethanol respectively, removing organic substance above and oil stain, then with deionized water residual acetone on the substrate 11 and ethanol purge totally, dry in drying box subsequently; This substrate 11 can be silicon chip, glass etc.
Step (2): silicon substrate can as the grid 12 of TFT, also can deposition of gate 12 on the substrate 11, can adopt the method such as inkjet printing, rf magnetron sputtering, chemical vapour deposition (CVD), electron beam injection.The general ITO of grid 12, also can use metal, metal alloy, as molybdenum, molybdenum alloy or the material such as chromium, evanohm.
Step (3): depositing insulating layer 13 on the substrate 11 having deposited grid 12, PECVD(plasma chemistry gas aggradation can be adopted), the method such as magnetron sputtering, inkjet printing forms insulating barrier 13, to stop that in substrate 11, impurities enters into active layer 14, prevent from impacting the characteristic such as threshold voltage and leakage current of TFT device.
Step (4): adopt piezoelectric and semi-conducting material to carry out mixing manufacture composite active layer on insulating barrier 13, the methods such as ald, laser molecular beam epitaxy, chemical vapour deposition (CVD), pulsed laser deposition, rf magnetron sputtering, inkjet printing, spin coating can be adopted to make, and piezoelectric is as BaTiO 3, can BaO and TiO be used 2preparation.
Step (5): Deposition of protective layer 15 on composite active layer.Protective layer 15 can prevent raceway groove to be subject to oxygen in air and water mitigation, must insulate, and can not affect the primary characteristic of TFT simultaneously, device can be stablized in use, efficient and life-saving, contributes to the electric property improving TFT.
Step (6): form source electrode and drain electrode 16 on protective layer 15, vacuum evaporation can be adopted to prepare electrode, uses mask plate to control the shape of source-drain electrode.Source-drain electrode can use metal A l, Cu, Cr, Sn, In, Zn, Ag, Au, Pt, Pd, Cd, Bi, Sb, or the oxide of these metals, or the alloy of these metallic elements.Channel length (L) and the width (W) of TFT device are determined by the metal mask version adopted during evaporation.Also inkjet printing electrode can be used, like this can without mask plate, Simplified flowsheet.
In embodiment one, when grid 12 and drain electrode apply voltage, composite active layer is subject to mechanical force, and raceway groove generation deformation, can reduce off-state current, reduces threshold voltage, improves ON state current.
embodiment two: as shown in Figure 2, the difference of itself and embodiment one is: described piezoelectric active layer 24 comprises the semiconductor active layer 241 be made up of semi-conducting material and the piezoelectric layer 242 be made up of piezoelectric, and described piezoelectric layer 242 is arranged at the upper surface of semiconductor active layer 241.
In embodiment two, based on the preparation method of the TFT structure of piezoelectric active layer 24, should comprise the following steps: (1) cleaning base plate 21, and dry; (2) grid 22 is made on the base plate (21; (3) on the substrate 21 making grid 22, insulating barrier 23 is made; (4) first on insulating barrier 23, adopt semi-conducting material manufacturing semiconductor active layer 241, then on semiconductor active layer 241, adopt piezoelectric to make piezoelectric layer 242, to form piezoelectric active layer 24; (5) on the piezoelectric layer 242 of piezoelectric active layer 24, protective layer 25 is made; (6) on protective layer 25, make source electrode and drain electrode 26.Concrete operations are as follows:
Step (1)-(3) are identical with embodiment one.
Step (4): first make semiconductor active layer 241 on insulating barrier 23, the methods such as ald, laser molecular beam epitaxy, chemical vapour deposition (CVD), pulsed laser deposition, rf magnetron sputtering, inkjet printing, spin coating can be adopted to make; By preparing burden, being mixed and finely ground, pre-burning, secondary is levigate, granulation, shaping, plastic removal, sinter porcelain, sharp processing into, prepared piezoelectric by electrode, high voltage polarization and burn-in test, and piezoelectric is as BaTiO 3, can BaO and TiO be used 2preparation; On semiconductor active layer 241, adopt piezoelectric to make piezoelectric layer 242 again, the methods such as ald, chemical vapour deposition (CVD), spin coating can be adopted to make.
Step (5): Deposition of protective layer 25 on the piezoelectric layer 242 of piezoelectric active layer 24.Protective layer 25 can prevent raceway groove to be subject to oxygen in air and water mitigation, must insulate, and can not affect the primary characteristic of TFT simultaneously, device can be stablized in use, efficient and life-saving, contributes to the electric property improving TFT.
Step (6) is identical with embodiment one.
In embodiment two, at the upper surface depositing piezoelectric material of semiconductor active layer 241 to form the piezoelectric layer 242 of piezoelectric active layer 24, in order to when applying grid 22 and drain voltage, piezoelectric layer 242 pairs of conducting channels are finely tuned, and are on the one hand to allow raceway groove can easier conducting, prevent when conducting because channel thickness is not and by pinch off, to reduce off-state current on the other hand, reduce threshold voltage, improve ON state current, thus improve device performance.
embodiment three: as shown in Figure 3, the difference of itself and embodiment one is: described piezoelectric active layer 34 comprises the semiconductor active layer 341 be made up of semi-conducting material and the piezoelectric layer 342 be made up of piezoelectric, and described piezoelectric layer 342 is arranged at the lower surface of semiconductor active layer 341.
In embodiment three, based on the preparation method of the TFT structure of piezoelectric active layer, should comprise the following steps: (1) cleaning base plate 31, and dry; (2) grid 32 is made on the substrate 31; (3) on the substrate 31 making grid 32, insulating barrier 33 is made; (4) on insulating barrier 33, first adopt piezoelectric to make piezoelectric layer 342, then on piezoelectric layer 342, adopt semi-conducting material manufacturing semiconductor active layer 341, to form piezoelectric active layer 34; (5) on the semiconductor active layer 341 of piezoelectric active layer 34, protective layer 35 is made; (6) on protective layer 35, make source electrode and drain electrode 36.Concrete operations are as follows:
Step (1)-(3) are identical with embodiment one.
Step (4): by preparing burden, being mixed and finely ground, pre-burning, secondary is levigate, granulation, shaping, plastic removal, sinter porcelain, sharp processing into, prepared piezoelectric by electrode, high voltage polarization and burn-in test, and piezoelectric is as BaTiO 3, can BaO and TiO be used 2preparation; On insulating barrier 33, first adopt piezoelectric to make piezoelectric layer 342, the methods such as ald, chemical vapour deposition (CVD), spin coating can be adopted to make; On piezoelectric layer 342, adopt semi-conducting material manufacturing semiconductor active layer 341 again, the methods such as ald, laser molecular beam epitaxy, chemical vapour deposition (CVD), pulsed laser deposition, rf magnetron sputtering, inkjet printing, spin coating can be adopted to make.
Step (5): Deposition of protective layer 35 on the semiconductor active layer 341 of piezoelectric active layer 34.Protective layer 35 can prevent raceway groove to be subject to oxygen in air and water mitigation, must insulate, and can not affect the primary characteristic of TFT simultaneously, device can be stablized in use, efficient and life-saving, contributes to the electric property improving TFT.
Step (6) is identical with embodiment one.
In embodiment three, at the lower surface depositing piezoelectric material of semiconductor active layer 341 to form the piezoelectric layer 342 of piezoelectric active layer 34, in order to when applying grid 32 and drain voltage, piezoelectric layer 342 pairs of conducting channels are finely tuned, and are on the one hand to allow raceway groove can easier conducting, prevent when conducting because channel thickness is not and by pinch off, to reduce off-state current on the other hand, reduce threshold voltage, improve ON state current, thus improve device performance.
embodiment four: as shown in Figure 4, the difference of itself and embodiment one is: described piezoelectric active layer 44 comprises the semiconductor active layer 441 be made up of semi-conducting material and the piezoelectric layer 442 and 443 be made up of piezoelectric, and the upper surface of described semiconductor active layer 441 and lower surface are provided with piezoelectric layer 442 and 443.
In embodiment four, based on the preparation method of the TFT structure of piezoelectric active layer, should comprise the following steps: (1) cleaning base plate 41, and dry; (2) on substrate 41, grid 42 is made; (3) on the substrate 41 making grid 42, insulating barrier 43 is made; (4) on insulating barrier 43, piezoelectric is first adopted to make lower piezoelectric layer 442, semi-conducting material manufacturing semiconductor active layer 441 is adopted again on lower piezoelectric layer 442, the last piezoelectric that adopts on semiconductor active layer 441 makes piezoelectric layer 443, to form piezoelectric active layer 44; (5) on the semiconductor active layer 441 of piezoelectric active layer 44, protective layer 45 is made; (6) on protective layer 45, make source electrode and drain electrode 46.Concrete operations are as follows:
Step (1)-(3) are identical with embodiment one.
Step (4): by preparing burden, being mixed and finely ground, pre-burning, secondary is levigate, granulation, shaping, plastic removal, sinter porcelain, sharp processing into, prepared piezoelectric by electrode, high voltage polarization and burn-in test, and piezoelectric is as BaTiO 3, can BaO and TiO be used 2preparation; On insulating barrier 43, first adopt piezoelectric to make lower piezoelectric layer 442, the methods such as ald, chemical vapour deposition (CVD), spin coating can be adopted to make; On lower piezoelectric layer 442, adopt semi-conducting material manufacturing semiconductor active layer 441 again, the methods such as ald, laser molecular beam epitaxy, chemical vapour deposition (CVD), pulsed laser deposition, rf magnetron sputtering, inkjet printing, spin coating can be adopted to make; The last piezoelectric that adopts on semiconductor active layer 441 makes piezoelectric layer 443, and the methods such as ald, chemical vapour deposition (CVD), spin coating can be adopted to make.
Step (5): Deposition of protective layer 45 on the upper piezoelectric layer 443 of piezoelectric active layer 44.Protective layer 45 can prevent raceway groove to be subject to oxygen in air and water mitigation, must insulate, and can not affect the primary characteristic of TFT simultaneously, device can be stablized in use, efficient and life-saving, contributes to the electric property improving TFT.
Step (6) is identical with embodiment one.
In embodiment four, the upper surface of semiconductor active layer 441 and lower surface respectively depositing piezoelectric material to form the upper and lower piezoelectric layer 442 of piezoelectric active layer 44, in order to when applying grid 42 and drain voltage, piezoelectric layer is finely tuned conducting channel, is on the one hand to allow raceway groove can easier conducting, prevents when conducting because channel thickness is not and by pinch off, to reduce off-state current on the other hand, reduce threshold voltage, improve ON state current, thus improve device performance.
In embodiment two to four, the thickness of described piezoelectric layer 242,342,442 and 443 is 5nm-10 μm, and the thickness of described semiconductor active layer 241,341 and 441 is 0.01 μm-50 μm.
The present invention is not limited to above-mentioned preferred forms, and anyone can draw other various forms of TFT structure based on piezoelectric active layer and preparation method thereof under enlightenment of the present invention.All equalizations done according to the present patent application the scope of the claims change and modify, and all should belong to covering scope of the present invention.

Claims (10)

1. based on a TFT structure for piezoelectric active layer, it is characterized in that: comprise substrate, grid, insulating barrier, piezoelectric active layer, protective layer, source electrode and drain electrode, described piezoelectric active layer is the semiconductor active layer containing piezoelectric.
2. the TFT structure based on piezoelectric active layer according to claim 1, is characterized in that: described piezoelectric active layer carries out by piezoelectric and semiconductor active layer the composite active layer that mixes.
3. the TFT structure based on piezoelectric active layer according to claim 1, it is characterized in that: described piezoelectric active layer comprises the semiconductor active layer be made up of semi-conducting material and the piezoelectric layer be made up of piezoelectric, at least one in the upper surface of described semiconductor active layer and lower surface is provided with piezoelectric layer.
4. the TFT structure based on piezoelectric active layer according to claim 1,2 or 3, is characterized in that: described piezoelectric comprises at least one in piezoelectric ceramic and piezopolymer, and described piezoelectric ceramic comprises BaTiO 3, PbTiO 3, Pb (TiZr) O 3, Ba (TiSr) O 3, the combination of any one or more in modified PZT and modification BST, described piezopolymer comprises the combination of any one or two kinds of in PVDF and P (VDF-TrFE).
5. the TFT structure based on piezoelectric active layer according to claim 2, is characterized in that: the piezoelectric of described composite active layer is made up of the piezoelectric ceramic of 20%-80% and the piezopolymer of 20%-80%.
6. the TFT structure based on piezoelectric active layer according to claim 2 or 5, is characterized in that: the thickness of described composite active layer is 0.01 μm-50 μm.
7. the TFT structure based on piezoelectric active layer according to claim 3, is characterized in that: the thickness of described piezoelectric layer is 5nm-10 μm, and the thickness of described semiconductor active layer is 0.01 μm-50 μm.
8. based on a preparation method for the TFT structure of piezoelectric active layer, it is characterized in that, comprise the following steps:
(1) cleaning base plate, and dry;
(2) on substrate, bottom electrode is made;
(3) on the substrate making bottom electrode, insulating barrier is made;
(4) piezoelectric and semi-conducting material is adopted to make piezoelectric active layer on the insulating layer;
(5) on piezoelectric active layer, protective layer is made;
(6) top electrode is made on the protection layer.
9. the preparation method of the TFT structure based on piezoelectric active layer according to claim 8, is characterized in that: the production method of described piezoelectric active layer comprises the combination of any one or more in ald, laser molecular beam epitaxy, chemical vapour deposition (CVD), pulsed laser deposition, rf magnetron sputtering, inkjet printing and spin coating.
10. the preparation method of the TFT structure based on piezoelectric active layer according to claim 8, is characterized in that: the preparation flow of described piezoelectric be prepare burden, be mixed and finely ground, pre-burning, secondary is levigate, granulation, shaping, plastic removal, sinter into porcelain, sharp processing, by electrode, high voltage polarization and burn-in test.
CN201510281704.5A 2015-05-28 2015-05-28 TFT structure based on piezoelectric material active layer and preparation method thereof Pending CN104851971A (en)

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