CN104843632A - 微机电芯片封装及其制造方法 - Google Patents

微机电芯片封装及其制造方法 Download PDF

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CN104843632A
CN104843632A CN201410325061.5A CN201410325061A CN104843632A CN 104843632 A CN104843632 A CN 104843632A CN 201410325061 A CN201410325061 A CN 201410325061A CN 104843632 A CN104843632 A CN 104843632A
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mems chip
contact
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周世文
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Chipmos Technologies Inc
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    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0061—Packages or encapsulation suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
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    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
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    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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Abstract

本发明提供一种微机电芯片封装及其制造方法，该微机电芯片封装包括：一封装基板、一围阻环、一微机电芯片、以及一封装材料。封装基板具有一内表面及对应的一外表面，并具有一信号开口，穿透内表面及外表面。封装基板具有至少一内接点，外表面上具有至少一外接点，内接点与外接点电性连接。围阻环配置于内表面，并环绕信号开口；微机电芯片具有一有源表面，有源表面具有至少一感应元件及至少一芯片接点。有源表面贴附于围阻环，使得感应元件位于围阻环内，芯片接点与内接点电性连接。封装材料包覆微机电芯片、围阻环外侧及内接点。

Description

微机电芯片封装及其制造方法
技术领域
本发明是有关于一种微机电芯片封装及其制造方法，特别是有关于一种具有开口的微机电芯片封装及其制造方法。
背景技术
微机电系统(Micro Electro Mechanical Systems，MEMS)，其定义为一个智能型微小化的系统，包含感测、处理或致动的功能，包含两个或多个电子、机械、光学、化学、生物、磁学或其他性质整合到一个单一或多芯片上。其应用领域极为广泛，包括制造业、自动化、信息与通讯、航太工业、交通运输、土木营建、环境保护、农林渔牧等。举例来说，微型麦克风就是个典型的例子，广泛配备于目前许多移动装置(mobile device)。微型麦克风就是由一微机电芯片所构成，由于需要感测声波的震动，在芯片封装上必须留有开口。
请参照图6，其绘示一种已知微机电芯片封装。已知微机电芯片封装600，是将微机电芯片602，比如麦克风芯片，贴附于一封装载体604，比如是球栅阵列封装基板(Ball Grid Array Substrate)。微机电芯片602具有一感测区606，及多个对外接点608，而接点608以导线610与封装载体604电性连接。而上盖612具有一开口614，对应感测区606，固定于封装载体604上，以利微机电芯片602的感测区606可以接收外部的声波。微机电芯片封装600则通过焊球616焊接于主机板上，微机电芯片602可以通过感测区606感测声波，并转换为数字信号，以提供主机板进行后续处理。
如图6所示，已知微机电芯片封装600的设计均为开口614朝上，而且上盖612与封装载体604所形成的容纳空间，并没有任何填充材质，因此外部的空气、粉尘、水蒸气，甚至水等都可以经由开口614进入容纳空间中，很可能造成微机电芯片602的污染，甚至影响其操作。而且，上盖612需要额外开模制造，成本较高。
发明内容
因此本发明的目的之一就在于提供一种微机电芯片封装及其制造方法，可以简化封装结构及工艺，降低成本。
本发明的另一目的就在于提供一种微机电芯片封装及其制造方法，其开口朝下，也就是面对主机板，降低其受外界污染的机会。
本发明的在一目的就在于提供一种微机电芯片封装及其制造方法，可以保护微机电芯片感应元件以外的区域，防止其遭受污染，提高产品可靠度。
根据本发明的上述目的，提供一种微机电芯片封装，包括：一封装基板、一围阻环、一微机电芯片以及一封装材料。封装基板具有一内表面及对应的一外表面，并具有一信号开口，穿透内表面及外表面。封装基板具有至少一内接点，外表面上具有至少一外接点，内接点与外接点电性连接。围阻环配置于内表面，并环绕信号开口；微机电芯片具有一有源表面，有源表面具有至少一感应元件及至少一芯片接点。有源表面贴附于围阻环，使得感应元件位于围阻环内，芯片接点与内接点电性连接。封装材料包覆微机电芯片、围阻环外侧及内接点。
根据本发明的上述目的，也提出一种微机电芯片封装，包括：一封装基板、一围阻环、一微机电芯片、以及一封装材料。封装基板，具有一内表面及对应的一外表面，并具有一信号开口及至少一打线开口，穿透该内表面及该外表面，在打线开口周缘且在内表面及外表面之间具有至少一内接点，外表面上具有至少一外接点，内接点与外接点电性连接。围阻环配置于内表面，并环绕信号开口；微机电芯片具有一有源表面，有源表面具有至少一感应元件及至少一芯片接点。有源表面贴附于围阻环，使得感应元件位于围阻环内，芯片接点借由一导线穿过打线开口与内接点电性连接。封装材料包覆微机电芯片、围阻环外侧及打线开口。
根据本发明的上述目的，还提出一种微机电芯片封装方法，包括：提供一封装基板，封装基板具有一内表面及对应的一外表面，并具有一信号开口及至少一打线开口，穿透内表面及外表面，在打线开口周缘且在内表面及外表面之间具有至少一内接点，外表面上具有至少一外接点，内接点与外接点电性连接。形成一围阻环于内表面上，并环绕信号开口。接着，提供一微机电芯片，微机电芯片具有一有源表面，有源表面具有至少一感应元件，及至少一芯片接点，有源表面贴附于围阻环，使得感应元件位于围阻环内。进行一打线步骤，借由一导线穿过打线开口将芯片接点与内接点电性连接。进行一封装步骤，以一封装材料，包覆微机电芯片，围阻环外侧及打线开口。
在本发明的某些实施例中，外接点更配置一焊球，以对外连接。围阻环的材质为两阶段特性热固性树脂粘合胶(B-Stage Epoxy)。感应元件包括音频感应元件。
本发明的微机电芯片封装，利用围阻环环绕信号开口，使感应元件位于其中得以接收外部的信号(比如声波)，并通过围阻体可以阻隔微机电芯片的其他部分与外界接触，可以防止污染，且提高产品的可靠度。此外本发明的微机电芯片封装，其信号开口与焊球同侧，面对主机板，可以减低外部粉尘自信号开口进入封装内部的机会，可以保护微机电芯片。另外，本发明的微机电芯片封装，封装材料可以包覆除了感应元件以外的区域，强化微机电芯片的保护，可以明显提高产品的稳定度及可靠度。
附图说明
图1至图5绘示根据本发明一实施例，一种微机电芯片封装方法各步骤的剖面示意图。
图3A绘示对应图3的仰视图。
图6绘示一种已知微机电芯片封装。
关于本发明的优点，精神与特征，将以实施例并参照所附附图，进行详细说明与讨论。值得注意的是，为了让本发明能更容易理解，后附的附图仅为示意图，相关尺寸并非以实际比例绘示。
【附图标记说明】
100：封装基板      208：导线
102：内表面        300：封装材料
104：外表面        302：焊球
106：信号开口      600：微机电芯片封装
108：打线开口      602：微机电芯片
110：阶梯状结构    604：封装载体
112：围阻环        606：感测区
114：内接点        608：接点
116：外接点        610：导线
200：微机电芯片    612：上盖
202：有源表面      614：开口
204：感应元件      616：焊球
206：芯片接点
具体实施方式
为了让本发明的优点，精神与特征可以更容易且明确地了解，后续将以实施例并参照所附附图进行详述与讨论。值得注意的是，这些实施例仅为本发明代表性的实施例，其中所举例的特定方法、装置、条件、材质等并非用以限定本发明或对应的实施例。
请参照图1至图5，其绘示根据本发明一实施例，一种微机电芯片封装方法各步骤的剖面示意图。首先参照图1，本发明的微机电芯片封装所采用的封装载体(package carrier)为一封装基板100，较佳是一球栅阵列封装基板(BallGrid Array Substrate)。封装基板100是由一多层高积集度电路板所形成，其具有一内表面102及对应的一外表面104，且具有一信号开口106及打线开口108。信号开口106及打线开口108贯穿内表面102及外表面104。打线开口108的周缘具有一阶梯状结构110，此阶梯状结构110介于内表面102及外表面104之间，比如为多层电路板的其中一层，其上配置有多个内接点114(绘示于图3A)。外表面104则配置有多个外接点116(绘示于图3A)，内接点及外接点是借由多层电路板的内部线路电性连接。值得注意的是，本实施例中虽然以球栅阵列封装基板为例，但本发明并不限于采用此类基板，也可以是PGA基板、LGA基板、软性基板、陶瓷基板、玻璃基板或其他类似基板。
接着，请参照图2，在信号开口106周缘的内表面102上，形成一围阻环112。形成围阻环112的方式可包括印刷、点胶或粘贴等方式形成于封装基板100上，而围阻环112的材质较佳是两阶段特性热固性树脂粘合胶，也就是一般习称的B-stage胶(B-stage Epoxy)。围阻环112会环绕信号开口106呈一环状。较佳的，围阻环112可先进行第一阶段的固化，温度约90度C至150度C，时间约1小时至3小时(其固化时间及温度可随工艺所需而调整)，使围阻环112在基板100上形成半固化的胶膜状。
接着，请参照图3，提供一微机电芯片200，微机电芯片200具有一有源表面202，有源表面202具有至少一感应元件204，比如是一音频感应元件，及至少一芯片接点206。微机电芯片200以有源表面202贴附于围阻环112，且使得感应元件204位于围阻环112内，并对应信号开口106。然后，进行一打线步骤(wire bonding)，借由一导线208，比如是金线(gold wire)、银线(Silverwire)、铜线(copper wire)或其合金线，穿过打线开口108将芯片接点206与内接点114电性连接。值得一提的是，虽然本实施例中是以打线方式为例，然而本发明中微机电芯片与封装基板的连接，并不限于此种方式，也可以是覆晶方式(flip chip)或者卷带式自动接合(Tape Automatic Bonding,TAB)等。另一方面，封装基板的内接点，并不限于配置于阶梯状结构中，也可以配置于内表面，直接与微机电芯片接合，此时打线开口即可以省略。内接点也可以直接配置于外表面，通过打线开口进行打线连接。
请参照图4，接着进行一封装步骤，以一封装材料300，包覆微机电芯片200、围阻环112外侧及打线开口108。其它可行的实施方式例如是，在封装基板100之外表面104预先贴设一层离型膜(附图未揭)，离型膜遮蔽了信号开口106及打线开口108，再配合模具进行封装，因此，微机电芯片200的有源表面202中，除了围阻环112所环绕的区域(包含感应元件)外，皆被封装材料300所包覆。而封装材料300包覆了打线开口108，也包覆导线208及内接点114。待封装工艺完成后，再由该封装基板100之外表面104移除该离型膜(附图未揭)，其中信号开口106、围阻环112及感应元件204所构成的空间，并无填入封装材料，感应元件204可以通过信号开口106接收外部的信号，比如声波。如上所述，如果内接点直接配置于外表面，则封装材料为了包覆导线及内接点，会突出于外表面。然而进行封装步骤中同时也对围阻环112进行了第二阶段固化，温度约为130度C至180度C，时间约为1小时至3小时(其固化时间及温度可随工艺所需而调整)，以确保两阶段特性热固性树脂粘合胶完全固化，提供微机电芯片200稳固的支撑及粘合，并可以有效阻隔其外侧的微机电芯片200与外界接触。
在某些较佳的实施例中，该围阻环112的第二阶段固化工艺亦可在进行封装步骤前，即已事先进行一道加热固化步骤后，再一同进入封装工艺亦可达到相同的效果。
请参照图5，进行一植球步骤(Ball Planting)，将焊球302形成于外接点116(参照图3A)上，以利后续与主机板(或其它连接元件)连接。至此，本发明的微机电芯片封装即完成。因此本发明的微机电芯片封装，主要包括一封装基板100、一围阻环112、一微机电芯片200以及一封装材料300。封装基板100具有一内表面102及对应的一外表面104，并具有一信号开口106，穿透内表面102及外表面104。封装基板100具有至少一内接点114，外表面上具有至少一外接点116，内接点114与外接点116电性连接。围阻环112配置于内表面102，并环绕信号开口106；微机电芯片200具有一有源表面202，有源表面202具有至少一感应元件204及至少一芯片接点206。有源表面202贴附于围阻环112，使得感应元件204位于围阻环112内，芯片接点206与内接点114电性连接。封装材料300包覆微机电芯片200，围阻环外侧112及内接点114。而其中较佳的是，封装基板具有至少一打线开口108，穿透内表面102及外表面104，在打线开口108周缘且在内表面102及外表面104之间形成一阶梯结构110，其上具有至少一内接点114，有助于减少导线208弧高，减少整体结构的封装厚度。
综上所述，本发明的微机电芯片封装，利用围阻环环绕信号开口，使感应元件位于其中得以接收外部的信号(比如声波)，并通过围阻环可以阻隔微机电芯片的其他部分与外界接触，可以防止污染，且提高产品的可靠度。而此种结构可以省去外盖的制造，节省产品成本。此外本发明的微机电芯片封装，其信号开口与焊球同侧，面对主机板(或其它连接元件)，可以减低外部粉尘自信号开口进入封装内部的机会，可以保护微机电芯片。另外，本发明的微机电芯片封装，封装材料可以包覆除了感应元件以外的区域，包含芯片接点，封装基板内接点及导线，强化微机电芯片的保护，可以明显提高产品的稳定度及可靠度。
借由以上较佳具体实施例的详述，是希望能更加清楚描述本发明的特征与精神，而并非以上述所揭露的较佳具体实施例来对本发明的范畴加以限制。相反地，其目的是希望能涵盖各种改变及具相等性的安排于本发明所欲申请的专利范围的范畴内。虽然本发明已以实施方式揭露如上，然其并非用以限定本发明，任何熟习此技艺者，在不脱离本发明的精神和范围内，当可作各种的更动与润饰，因此本发明的保护范围当视权利要求书所界定者为准。

Claims (12)

1.一种微机电芯片封装，其特征在于，包括：
一封装基板，具有一内表面及对应的一外表面，并具有一信号开口及至少一打线开口，穿透该内表面及该外表面，在该打线开口周缘且在该内表面及该外表面之间具有至少一内接点，该外表面上具有至少一外接点，该内接点与该外接点电性连接；
一围阻环，配置于该内表面，并环绕该信号开口；
一微机电芯片，具有一有源表面，该有源表面具有至少一感应元件，及至少一芯片接点，该有源表面贴附于该围阻环，使得该感应元件位于该围阻环内，该芯片接点借由一导线穿过该打线开口与该内接点电性连接；以及
一封装材料，包覆该微机电芯片、该围阻环外侧及该打线开口。
2.如权利要求1所述的微机电芯片封装，其特征在于，更包括至少一焊球配置于该外接点。
3.如权利要求1所述的微机电芯片封装，其特征在于，该围阻环的材质为两阶段特性热固性树脂粘合胶。
4.如权利要求1所述的微机电芯片封装，其特征在于，该感应元件包括音频感应元件。
5.一种微机电芯片封装方法，其特征在于，包括：
提供一封装基板，该封装基板具有一内表面及对应的一外表面，并具有一信号开口及至少一打线开口，穿透该内表面及该外表面，在该打线开口周缘且在该内表面及该外表面之间具有至少一内接点，该外表面上具有至少一外接点，该内接点与该外接点电性连接；
形成一围阻环于该内表面上，并环绕该信号开口；
提供一微机电芯片，该微机电芯片具有一有源表面、该有源表面具有至少一感应元件及至少一芯片接点，该有源表面贴附于该围阻环，使得该感应元件位于该围阻环内；
进行一打线步骤，借由一导线穿过该打线开口将该芯片接点与该内接点电性连接；以及
进行一封装步骤，以一封装材料、包覆该微机电芯片、该围阻环外侧及该打线开口。
6.如权利要求1所述的微机电芯片封装方法，其特征在于，更包括形成至少一焊球于该外接点上。
7.如权利要求1所述的微机电芯片封装方法，其特征在于，该围阻环的材质为两阶段特性热固性树脂粘合胶，且该微机电芯片封装方法更包括：
在形成该围阻环于该内表面上之后，进行一第一阶段固化；以及
在该封装步骤中进行一第二阶段固化。
8.如权利要求1所述的微机电芯片封装方法，其特征在于，该感应元件包括音频感应元件。
9.一种微机电芯片封装，其特征在于，包括：
一封装基板，具有一内表面及对应的一外表面，并具有一信号开口，穿透该内表面及该外表面，该封装基板具有至少一内接点，该外表面上具有至少一外接点，该内接点与该外接点电性连接；
一围阻环，配置于该内表面，并环绕该信号开口；
一微机电芯片，具有一有源表面，该有源表面具有至少一感应元件，及至少一芯片接点，该有源表面贴附于该围阻环，使得该感应元件位于该围阻环内，该芯片接点与该内接点电性连接；以及
一封装材料，包覆该微机电芯片、该围阻环外侧及该内接点。
10.如权利要求1所述的微机电芯片封装，其特征在于，更包括至少一焊球配置于该外接点。
11.如权利要求1所述的微机电芯片封装，其特征在于，该围阻环的材质为两阶段特性热固性树脂粘合胶。
12.如权利要求1所述的微机电芯片封装，其特征在于，该感应元件包括音频感应元件。
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Application publication date: 20150819