CN104810302B - A kind of application method monitoring wafer - Google Patents
A kind of application method monitoring wafer Download PDFInfo
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- CN104810302B CN104810302B CN201410032441.XA CN201410032441A CN104810302B CN 104810302 B CN104810302 B CN 104810302B CN 201410032441 A CN201410032441 A CN 201410032441A CN 104810302 B CN104810302 B CN 104810302B
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- wafer
- monitoring
- outer box
- box structure
- inward flange
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
Abstract
The invention discloses a kind of monitoring wafers and preparation method thereof, and wherein the monitoring wafer has outer box structure, and inward flange and the outer edge of the outer box structure are concentric figure.The present invention is by the wafer with outer box structure that etches single layer as monitoring wafer, due in the prior art including that outer box structure and inner case structure need to obtain just obtaining by two layers of etching, and the monitoring wafer only has outer box structure, carrying out single layer etching can be obtained, there will be no the registration errors between two layer patterns for single layer etching, the central value that can be realized in the x direction and the y direction is zero, with specific target value, when the abnormal conditions such as occurs drifting about in the target value of board, it can confirm and adjust in time.It when existing monitoring wafer occurs damaged, can be replaced immediately with the wafer with identical outer box structure, there is substitutability.
Description
Technical field
The present invention relates to semiconductor processing technology field more particularly to a kind of application methods for monitoring wafer.
Background technique
In semiconducter process, overlay is one of most important monitoring project in photoetching process, is directly reflected
Register situation between figure.Quaestor Q7 (5) equipment of measurement board as overlay, stable measurement technique
It is the reliable guarantee of data really inevitable premise and product quality.
In semiconductor manufacturing industry, the overlay measurement technology stability monitoring of Quaestor Q7 (5) series board,
Generally include two aspects: first, whether measurement result of single board during long-term production be consistent；Second, multiple machines
Whether measurement result of the platform within the same period be consistent.Either single board measurement or multiple bench monitorings, are all by regular
The box-in-box structure on particular wafer (wafer) is measured to realize.Generally making above-mentioned specifically monitored wafer, there are two types of sides
Method: first method forms box-in-box structure with two layers of etching technics, can bring larger technique registration error, practical to supervise
The accuracy for controlling the box-in-box structure of wafer is difficult control 0/0；Second method is directly formed with single layer etching technics
Box-in-box structure then needs additionally to make mask plate, higher cost, but above two method has respective drawback.
If by taking above-mentioned first method as an example, using the wafer in scrap products, by measuring two layers of etching (Etch)
The box-in-box structure that technique is formed, schematic diagram is as shown in Figure 1, the register when measurement result includes the formation of two layer patterns misses
Difference.Since there are the registration errors of two layers of graphics art, central value not can determine that according to above-mentioned measurement result, i.e., which not can determine that
A numerical value is target value, therefore target is uncertain.In addition, if using average value as target value, and this registration error is fixed
, then when the monitoring wafer fails or damages, it is brilliant to can not find the substitution with identical registration error (i.e. same target value)
Circle.Therefore, the monitoring wafer that the method etched using two layers is obtained does not have substitutability.
Summary of the invention
(1) technical problems to be solved
In view of the foregoing drawbacks, having the technical problem to be solved by the present invention is to the wafer for using monitoring can replace
Dai Xing.
(2) technical solution
To solve the above problems, the monitoring wafer has outer box structure, described the present invention provides a kind of monitoring wafer
The inward flange of outer box structure is concentric figure with outer edge.
Further, the graphics shape of the monitoring wafer is round or rectangular.
Further, when the figure of the monitoring wafer is rectangular, the figure of the monitoring wafer is in four edge directions
The distance between edge and outer edge are all the same.
Further, the side length of the inward flange of the figure of the monitoring wafer is 20um, and the side length that outer edge is is 30um.
Further, the distance between inward flange and outer edge be not unique on the figure of different monitoring wafers, according to institute
State the figure of the usage scenario selection inward flange of monitoring wafer and the monitoring wafer of outer edge different distance.
Further, the target value of the testing result of the figure of the monitoring wafer is zero, has specific target value, works as machine
When platform target value drift, it is adjusted in time.
Further, brilliant with the monitoring with identical outer box structure when monitoring wafer currently in use damages on board
Circle substitution.
In order to solve the above technical problems, the present invention also provides a kind of monitoring wafer preparation methods, comprising: carved on wafer
Erosion forms the monitoring wafer with outer box structure, and inward flange and the outer edge of the outer box structure are concentric figure.
Further, the etching is formed, and there is the monitoring wafer of outer box structure to specifically include:
The outer edge of the outer box figure is etched first, then etches the inward flange of the outer box figure；
Or the inward flange of the outer box figure is etched first, then etch the outer edge of the outer box figure；
Or the outer edge and inward flange for box figure of going out are etched simultaneously.
Further, the graphics shape of the monitoring wafer is round or rectangular.
Further, when the figure of the monitoring wafer is rectangular, the figure of the monitoring wafer is in four edge directions
The distance between edge and outer edge are all the same.
Further, the side length of the inward flange of the figure of the monitoring wafer is 20um, and outer peripheral side length is 30um.
(3) beneficial effect
The present invention provides a kind of application methods for monitoring wafer, and wherein the monitoring wafer has outer box structure, described outer
The inward flange of box structure is concentric figure with outer edge.The present invention passes through the wafer with outer box structure that etches single layer
As monitoring wafer, due to needing just obtain by two layers of etching including outer box structure and inner case structure in the prior art, and
The monitoring wafer only has outer box structure, i.e. progress single layer etching can be obtained, and there will be no between two layer patterns for single layer etching
Registration error, the central value that can be realized in the x direction and the y direction is zero, have specific target value, when the target of board
Value occur drifting about etc. abnormal conditions when, can confirm and adjust in time.It, can be immediately when existing monitoring wafer occurs damaged
It is replaced with the wafer with identical outer box structure, there is substitutability.
Detailed description of the invention
Fig. 1 is the box-in-box structural schematic diagram for monitoring wafer in the prior art；
Fig. 2 is a kind of outer box structure design diagram of the monitoring wafer provided in the embodiment of the present invention；
Fig. 3 is the outer box structural design drawing that figure provided in an embodiment of the present invention is concentric circles.
Specific embodiment
With reference to the accompanying drawings and examples, specific embodiments of the present invention will be described in further detail.Implement below
Example is not intended to limit the scope of the invention for illustrating the present invention.
It includes outer box structure 01 and inner case structure 02 that wafer (wafer) is monitored in Fig. 1 of the prior art, and outer box structure 01 is
Outer box, inner case structure 02 are inner box, the monitoring wafer of board serial for Quaestor Q7 (5) be it is rectangular,
Middle inner box is that side length is the rectangular of 10um, and the inward flange of outer box is that side length is the rectangular of 20um, outer box's
Outer edge is that side length is the rectangular of 30um.
The measurement result for using the monitoring wafer of the prior art to obtain is X-direction: (x2-x1)/2；Y-direction: (y2-y1)/
2, wherein x1 is the right side inward flange of outer box structure 01 and the distance between the right side outer edge of inner case structure 02, and x2 is outer box knot
The left side inward flange of structure 01 and the distance between the left side outer edge of inner case structure 02, y1 are the upside inward flange of outer box structure 01
The distance between upside outer edge of inner case structure 02, y2 are under the downside inward flange and inner case structure 02 of outer box structure 01
The distance between side outer edge.
Above-mentioned outer box structure 01 and inner case structure 02 are to etch obtained figure by two layers, this two layer pattern is deposited when being formed
It is not easily found and replaces when failure or damage since registration error has just been fixed after the completion of the monitoring wafer in registration error
Wafer is changed to be replaced.
A kind of monitoring wafer is provided in the use of the new type embodiment, which has outer box structure 01, outer box knot
The inward flange S2 and outer edge S1 of structure are concentric figure.
Preferably, the graphics shape of above-mentioned monitoring wafer is round or rectangular, it is, of course, also possible to be selected according to the case where board
Select the monitoring wafer of other shapes, but be the need to ensure that monitoring wafer outer edge and inward flange be concentric figure, can be
Concentric circles can also be other shapes of concentric figure.For example, as shown in figure 3, outer edge and inward flange are the monitoring of concentric circles
Wafer graphic structure.Board in the present embodiment is the board of Quaestor Q7 (5) series, therefore selects the figure of monitoring wafer
Shape structure be it is rectangular, schematic diagram is as shown in Figure 2.Wherein the outer edge of outer box structure indicates that inward flange is indicated with S2 with S1, x1 '
It is the left side outer edge S1 of outer box structure 01 for the distance between the right side outer edge S1 and inward flange S2 of outer box structure 01, x2 '
The distance between inward flange S2, y1 ' are the distance between the upside outer edge S1 and inward flange S2 of outer box structure 01, and y2 ' is
The distance between downside outer edge S1 and inward flange S2 of outer box structure 01.
As can be seen from FIG. 2, when the figure for monitoring wafer is rectangular, inward flange of the figure in four edge directions of wafer is monitored
The distance between outer edge is all the same.It can be with for the inward flange and the distance between outer edge size that monitor the figure of wafer
It is adjusted as needed, as long as guaranteeing that monitoring board can identify outer edge and inward flange adjusted, and can be used to calculate
?.
In addition, the distance between inward flange and outer edge be not unique on the figure of different monitoring wafers, it is brilliant according to monitoring
The monitoring wafer of round usage scenario selection inward flange and outer edge different distance.Preferably, the monitoring wafer in the present embodiment
Figure inward flange side length be 20um, outer peripheral side length be 30um.
The target value of the testing result of the figure of monitoring wafer in the present embodiment is zero, has specific target value, works as machine
When platform target value drift, it can be adjusted in time.By taking the monitoring wafer in the present embodiment as an example, obtained testing result are as follows:
X-direction: (x2 '-x1 ')/2；
Y-direction: (y2 '-y1 ')/2.
Using the monitoring wafer in the present embodiment due to there was only one layer of etched features, obtained measurement result does not include
Registration error between two layer patterns, central value (i.e. design value) in the x direction and the y direction is zero, while in the present embodiment
Monitoring wafer also has an advantage in that when monitoring wafer currently in use damages on board, with identical outer box structure
Monitor wafer substitution.
Only have to the single layer in the monitoring wafer and the present embodiment in the prior art with two layer patterns individually below outer
The monitoring wafer of box structure is on three different platforms respectively in five point in time measurement with the same figure on wafer
The monitoring result that structure obtains is as follows:
Table 1
Table 2
Above-mentioned table 1 is the monitored results of the prior art, and table 2 is the monitored results of the present embodiment, according in Tables 1 and 2
Known to data comparison:
1) because there are the registration error of two layers of graphics art, the monitored results of the prior art not can confirm that central value, i.e.,
It cannot illustrate which number is target value.And the central value (i.e. Theoretical Design value) of the present embodiment is zero, there is specific target value, when
When board target value drift, it can find and be adjusted in time.
2) in the prior art if using average value as target value, when the damage of this wafer, it will be difficult to find same target
The substitution wafer of value does not both have substitutability.And the monitoring wafer of single layer etched features is easily found replacement in the present embodiment
Wafer is replaced, and has substitutability.
3) the result value fluctuation that the prior art obtains is very big, and by taking the x value of five measurements on board 1 as an example, minimum value is
0.033um, maximum value are 0.042um, between differ about 0.01um, i.e. fluctuation is very big.And the result machine that the present embodiment obtains
For the x values of five times on platform 1 measurements, minimum value is 0.001um, and maximum value is 0.003um, between differ about 0.002um, and
It is all identical 0.002um there are three numerical value, it is relatively stable as a result substantially in the lower fluctuation above freezing of theoretical design value.Because of row
In addition to registration error, the result of the present embodiment more can really reflect the stability of board.
In conclusion the monitoring wafer provided in the present embodiment has the following characteristics that
1) error is small, since outer box structure is that single layer process is formed, does not include registration error；
2) centrales scale value is clear, when board occurs abnormal, facilitates confirmation and adjustment；
3) alternative strong, when having monitoring wafer damage, it can be replaced with the wafer with identical outer box structure.
Based on above-mentioned, the present embodiment also provides a kind of monitoring wafer preparation method, comprising: etches and is formed on wafer
Monitoring wafer with outer box structure, inward flange and the outer edge of outer box structure are concentric figure.
Preferably, etching is formed, and there is the monitoring wafer of outer box structure to specifically include:
The outer edge of outer box figure is etched first, then etches the inward flange of outer box figure；
Or the inward flange of outer box figure is etched first, then etch the outer edge of outer box figure；Or it etches simultaneously
The outer edge and inward flange of outer box figure out.
Preferably, it is round or rectangular for monitoring the graphics shape of wafer.
Further, when the figure for monitoring wafer is rectangular, monitor the figure of wafer four edge directions inward flange with
The distance between outer edge is all the same.Specifically, the side of the inward flange of the figure for the monitoring wafer that etching obtains in the present embodiment
A length of 20um, outer peripheral side length are 30um.
Based on above-mentioned preparation method, the wafer with outer box structure that single layer is etched is as monitoring wafer, the prison
Control wafer only has outer box structure, i.e. progress single layer etching can be obtained, and there will be no the sets between two layer patterns for single layer etching
Quasi- error, the central value that can be realized in the x direction and the y direction is zero, has specific target value, when the target value of board goes out
Now when the abnormal conditions such as drift, it can confirm and adjust in time.It, can apparatus immediately when existing monitoring wafer occurs damaged
There is the wafer of identical outer box structure to be replaced, there is substitutability.
The above embodiments are only used to illustrate the present invention, and not limitation of the present invention, in relation to the common of technical field
Technical staff can also make a variety of changes and modification without departing from the spirit and scope of the present invention, therefore all
Equivalent technical solution also belongs to scope of the invention, and scope of patent protection of the invention should be defined by the claims.
Claims (6)
1. a kind of application method for monitoring wafer characterized by comprising
When carrying out overlay measurement technology stability monitoring to board, there is outer box knot using what is etched by single layer
The monitoring wafer of structure, when the monitoring wafer currently in use damages on the board, with the identical outer box structure
Monitoring wafer substitution；Wherein, the outer edge of the outer box structure indicates that inward flange is indicated with S2 with S1, and x1 ' is described
The distance between right side outer edge S1 and inward flange S2 of outer box structure, x2 ' be the outer box structure left side outer edge S1 with
The distance between inward flange S2, y1 ' are the distance between the upside outer edge S1 and inward flange S2 of the outer box structure, and y2 ' is
The distance between downside outer edge S1 and inward flange S2 of the outer box structure, obtained testing result are as follows: X-direction: (x2 '-
X1 ')/2, Y-direction: the target value of (y2 '-y1 ')/2, the testing result of the figure of the monitoring wafer are zero；
Wherein, the inward flange with outer edge of the outer box structure are concentric figure.
2. the method according to claim 1, wherein the graphics shape of the monitoring wafer is round or rectangular.
3. according to the method described in claim 2, it is characterized in that, it is described monitoring wafer figure be it is rectangular when, the monitoring
The figure of wafer four edge directions inward flange between outer edge at a distance from it is all the same.
4. according to the method described in claim 3, it is characterized in that, the side length of the inward flange of the figure of the monitoring wafer is
20um, the side length that outer edge is are 30um.
5. the method as described in claim 1, which is characterized in that on the figure of different monitoring wafers inward flange and outer edge it
Between distance it is not unique, according to it is described monitoring wafer usage scenario selection inward flange and outer edge different distance monitoring wafer
Figure.
6. the method according to claim 1, wherein the target value of the testing result of the figure of the monitoring wafer
It is zero, there is specific target value, when board target value drift, is adjusted in time.
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| US6357131B1 (en) * | 1999-12-20 | 2002-03-19 | Taiwan Semiconductor Manufacturing Company | Overlay reliability monitor |
| US6699627B2 (en) * | 2000-12-08 | 2004-03-02 | Adlai Smith | Reference wafer and process for manufacturing same |
| US7605907B2 (en) * | 2007-03-27 | 2009-10-20 | Asml Netherlands B.V. | Method of forming a substrate for use in calibrating a metrology tool, calibration substrate and metrology tool calibration method |
| CN101465310B (en) * | 2007-12-17 | 2010-12-08 | 中芯国际集成电路制造(上海)有限公司 | Alignment method between different platform during silicon wafer making process |
| CN101644898B (en) * | 2008-08-06 | 2011-05-04 | 上海华虹Nec电子有限公司 | Method for measuring alignment precision among lithography machines with different magnifications |
| US8143731B2 (en) * | 2009-07-14 | 2012-03-27 | Nanya Technology Corp. | Integrated alignment and overlay mark |
| CN102097284A (en) * | 2009-12-15 | 2011-06-15 | 中芯国际集成电路制造(上海)有限公司 | Control method and device for making alignment marks |
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Effective date of registration: 20220718 Address after: 518116 founder microelectronics industry, No. 5, Baolong seventh Road, Baolong Industrial City, Longgang District, Shenzhen, Guangdong Province Patentee after: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. Address before: 100871, fangzheng building, 298 Fu Cheng Road, Beijing, Haidian District Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. |