CN104796151A - Sampling rate conversion device and method with continuously variable bandwidth - Google Patents
Sampling rate conversion device and method with continuously variable bandwidth Download PDFInfo
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Abstract
The invention discloses a sampling rate conversion device with continuously variable bandwidth and a method thereof, comprising an up-sampling rate conversion unit and a down-sampling rate conversion unit; the up-sampling rate conversion unit comprises a forming filter, an integral multiple interpolation module A, a fractional multiple interpolation module A, DAC and a control module A, wherein the forming filter receives a sequence to be transmitted and outputs the sequence after processing through the integral multiple interpolation module A, the fractional multiple interpolation module A and a DAC (digital-to-analog converter), the down-sampling rate conversion unit comprises an ADC (analog-to-digital converter), a fractional multiple interpolation module B, an integral multiple extraction module B, a matched filter and a control module B, a signal at a receiving end is input into the ADC and output after processing through the fractional multiple interpolation module B, the integral multiple extraction module B and the matched filter, and the control module controls the integral multiple interpolation multiple, the integral multiple extraction multiple and the. The invention has low hardware resource occupancy rate, can increase and decrease the number of half-band filters according to the relation between the target sampling rate and the symbol rate of the input signal, and is suitable for the sampling rate conversion processing of any bandwidth variable signal.
Description
Technical field
The present invention relates to radio communication, digital processing field, particularly relate to a kind of sample rate conversion device and method of bandwidth continuous variable.
Background technology
Software and radio technique (SDR, Software Definition Radio) is the study hotspot of digital processing field always.Its basic thought allows digital processing element as far as possible near radio-frequency front-end, reduces analog domain signal transacting area, thus on identical hardware designs platform, realize multiband, multi-user, multimodal data processing.Along with the fast development of wireless communication technology, the continuous proposition of various protocols, system, can compatible different rates, and the general software radio design platform of different bandwidth just seems particularly urgent.In software radio system, to the input/output signal of the compatible distinct symbols rate of radio-frequency head, just must adopt sample rate conversion technology, at transmitting terminal, different symbol rates is converted to the data that there is identical sample rate and export; At receiving terminal, the signal of fixed sample rate is converted to the integral multiple of symbol rate.Thus for simplifying radio-frequency front-end, adapting to unlike signal bandwidth requirement, just very can have realistic meaning to the method that the signal of bandwidth continuous variable carries out any multiple sample rate conversion.
China Patent No. 200810057286.1 discloses a kind of implementation method and implement device of digital baseband variable velocity convert modulating system, signal for distinct symbols rate adopts the mode of different channel selecting to realize the output of fixed sample rate, but, the device of this structure is only applicable to use when symbol rate is less, and be merely able to the sample rate conversion realizing integral multiple, the port number of sample rate conversion is then needed to increase to increase symbol rate, the hardware resource occupancy of device is high, flexibility is poor, and larger to the consumption of hardware system.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, the sample rate conversion device and method of the bandwidth continuous variable that a kind of hardware resource occupancy is low, use flexibility is strong is provided, it has the function of arbitrary integer times speed adjustment, the number of half-band filter can be increased and decreased according to the relation of target sampling rate and input signal symbol rate, adapt to the sample rate conversion process of any adaptive-bandwidth signal.
The object of the invention is to be achieved through the following technical solutions: a kind of sample rate conversion device of bandwidth continuous variable, it is made up of up-sampling rate converting unit and down-sampling rate converting unit.
Up-sampling rate converting unit comprises formed filter, integral multiple interpose module A, point several times interpose module A, DAC digital to analog converter and control module A, formed filter is used for the sequence that receiving end/sending end needs to send, and with fixing multiple, filtering interpolation process is carried out to sequence to be sent, complete the spectral shaping of sequence to be sent; The signal output part of formed filter is connected with DAC digital to analog converter with a point several times interpose module A by integral multiple interpose module A successively, integral multiple interpose module A is used for the integer power interpolation process doubly data after spectral shaping being carried out to two, by the sampling rate conversion of data to the interpolation process range of dividing several times interpose module A; Point several times interpose module A is used for carrying out fraction double interpolation process to the data after the process of integral multiple interpolation, makes the sample rate of output data be target sampling rate; DAC digital to analog converter is responsible for the data after by sampling rate conversion and is carried out the conversion of numeric field to analog domain, and output sampling rate is the data of target sampling rate; The control signal output of control module A is connected with a point control signal input of several times interpose module A with integral multiple interpose module A respectively, control module A be used for according to input the symbol rate of sequence to be sent and the proportionate relationship of target sampling rate, the integral multiple interpolation multiple of computes integer times interpose module A, and the fraction double interpolation multiple of point several times interpose module A.
Down-sampling rate converting unit comprises ADC analog to digital converter, point several times interpose module B, integral multiple abstraction module B, matched filter and control module B, ADC analog to digital converter is used at receiving terminal, carry out the conversion of analog domain to numeric field with the analog signal of fixed sample rate to input, the digital signal output end of ADC analog to digital converter is connected with matched filter with integral multiple abstraction module B by a point several times interpose module B successively; Divide several times interpose module B to receive the digital signal of ADC analog to digital converter output, and carry out filtering interpolation process to the digital signal received, the sample rate of the data that point several times interpose module B is exported is the integral multiple of input signal symbol rate; The integral multiple that integral multiple abstraction module B is used for carrying out the data after point several times interpolation process the power side of two extracts process, and output sampling rate is the M signal doubly of input signal symbol rate, and M is a fixed value; Matched filter is used for carrying out matched filtering to extracting the signal after processing; Control module B is used for according to the bandwidth of input signal and the relation of ADC analog to digital converter sample rate, the integral multiple extracting multiple of computes integer times abstraction module B, and the fraction double interpolation multiple of point several times interpose module B.
Concrete, described integral multiple interpose module A and integral multiple abstraction module B structural similarity, form by multiple half-band filter and multiple data selector cascade, the n power that can realize two interpolation doubly or extraction, wherein, n is the half-band filter number of cascade, and data selector is used for the number of the half-band filter of the filtering interpolation process of control and participate in integral multiple or the process of participation integral multiple filtering extraction.
For integral multiple interpose module A, output signal after formed filter molding filtration is as the input signal of integral multiple interpose module A, the input of n-th grade of half-band filter is directly the input signal of integral multiple interpose module A, the output of n-th grade of half-band filter is as an input of the (n-1)th DBMS selector, another of (n-1)th DBMS selector is input as the input signal of integral multiple interpose module A, the output of the (n-1)th DBMS selector is as the input of (n-1)th grade of half-band filter, the output of (n-1)th grade of half-band filter is as an input of the n-th-2 DBMS selector, another of n-th-2 DBMS selector is input as the input signal of integral multiple interpose module A, cascade successively, finally by the output of the 0th DBMS selector as the output signal of integral multiple interpose module A.
For integral multiple abstraction module B, divide the input signal of output signal as integral multiple abstraction module B of several times interpose module B, the input of n-th grade of half-band filter is directly the input signal of integral multiple abstraction module B, the output of n-th grade of half-band filter is as an input of the (n-1)th DBMS selector, another of (n-1)th DBMS selector is input as the input signal of integral multiple abstraction module B, the output of the (n-1)th DBMS selector is as the input of (n-1)th grade of half-band filter, the output of (n-1)th grade of half-band filter is as an input of the n-th-2 DBMS selector, another of n-th-2 DBMS selector is input as the input signal of integral multiple abstraction module B, cascade successively, finally by the output of the 0th DBMS selector as the output signal of integral multiple abstraction module B.
Concrete, for integral multiple interpose module A, total number of inner half-band filter is determined by the symbol rate of the sequence to be sent of minimum input and the ratio of target sampling rate; For integral multiple abstraction module B, total number of inner half-band filter is determined by the ratio of the bandwidth of the minimum input signal of receiving terminal and the sample rate of ADC analog to digital converter.
For integral multiple interpose module A, the number of the half-band filter of described participation integral multiple filtering interpolation process is determined by the symbol rate of the sequence to be sent of current input and the ratio of target sampling rate; For integral multiple abstraction module B, the number of the half-band filter of described participation integral multiple filtering extraction process is determined by the ratio of the symbol rate of current receiving terminal input signal and the sample rate of ADC analog to digital converter.
As preferably, described control module A adopts the mode of software control, and control module B also adopts the mode of software control, realizes the division arithmetic process that hardware circuit not easily realizes.
As preferably, a described point several times interpose module A and point several times interpose module B all adopts polynomial interopolation filter.
As preferably, described formed filter adopts root raised cosine filter.
A sampling rate converting method for bandwidth continuous variable, it comprises the step of a up-sampling rate conversion and the step of a down-sampling rate conversion, and described up-sampling rate conversion comprises following sub-step:
S01: formed filter receiving end/sending end needs the sequence sent, and doubly fix multiple with M filtering interpolation forming processes is carried out to sequence to be sent, make signal spectrum shaping, meanwhile, the sequence that control module A receiving end/sending end is to be sent, according to the symbol rate of sequence to be sent and the ratio R _ u of target sampling rate, calculate the integral multiple interpolation multiple N_u of integral multiple interpose module A and the fraction double interpolation multiple uk_u of point several times interpose module A, ratio R _ u and the relation between integral multiple interpolation multiple N_u, fraction double interpolation multiple uk_u as follows:
R_u=N_u*uk_u*M，
Wherein, M is the fixing interpolation multiple of formed filter;
S02: integral multiple interpose module A receives the data after formed filter process, according to the integral multiple interpolation multiple N_u that control module A provides, the half-band filter needing to participate in the process of integral multiple filtering interpolation is selected, by the incoming frequency scope that the sample rate up-sampling of the data received requires to point several times interpolation by the data selector of inside;
S03: the fraction double interpolation multiple uk_u that point several times interpose module A provides according to control module A, data after integral multiple interpose module A process are carried out to the interpolation processing of point several times, the sample rate conversion after the sample rate of the data after integral multiple interpose module A process is converted by integral multiple is to target sampling rate;
S04:DAC digital to analog converter carries out digital-to-analogue conversion to the data that point several times interpose module A transmits, and exports the data of analog domain;
So far, up-sampling rate transfer process is completed.
Described down-sampling rate conversion comprises following sub-step:
S11:ADC analog to digital converter receives the signal through the front-end processing of radio frequency analog territory, the input signal of optional sign rate is sampled with fixed sample rate fs_d, input signal is transformed into numeric field by analog domain, meanwhile, control module B receives input signal, according to bandwidth parameter f and the ADC sampling rate parameter fs_d of input signal, calculate the integral multiple extracting multiple N_d of point fraction double interpolation multiple uk_d of several times interpose module B and integral multiple abstraction module B, the sample rate of ADC and the ratio of input signal bandwidth is made to be R_d, then ratio R _ d and fraction double interpolation multiple uk_d, relation between integral multiple extracting multiple N_d is as follows:
Wherein, N is the sample rate of signal and the multiple value of current input signal symbol rate of integral multiple abstraction module B output;
S12: the fraction double interpolation multiple uk_d that point several times interpose module B provides according to control module B, filtering interpolation process is carried out to the digital signal received, makes the sample rate of the signal of output be the integral multiple of input signal symbol rate;
S13: the integral multiple extracting multiple N_d that integral multiple abstraction module B provides according to control module B, the half-band filter number HB_step_d needing to participate in the process of integral multiple filtering extraction is selected by the data selector of inside, integral multiple is carried out to the signal after fraction double interpolation process and extracts process, output sampling rate is the N signal doubly of current input signal symbol rate, and the relation between half-band filter number HB_step_d and integral multiple extracting multiple N_d is as follows:
N_d=2
HB_step_d；
S14: matched filter extracts the signal after processing to integral multiple and carries out filtering process, the signal after output filtering;
So far, down-sampling rate transfer process is completed.
Further, a described point several times interpose module A and point several times interpose module B all adopts the mode of polynomial interopolation to realize fraction double interpolation process, and the formula of polynomial interopolation is as follows:
Wherein, l
kx () is basic point x
in Interpolation-Radix-Function (i=0,1 ... n), x is the position needing interpolation point, and namely correspond in device is take uk_d as the not accumulated value in the same time at interval, l
kx () is the value after interpolation.
Further, described DAC digital to analog converter is all operated in identical clock frequency under any symbol rate.
The invention has the beneficial effects as follows:
(1) control module A and control module B all adopts the mode of software control, realizes the division arithmetic that hardware circuit not easily realizes, simplifies hardware circuit, saves hardware spending;
(2) control module A and control module B can configure integral multiple interpolation multiple or integral multiple extracting multiple flexibly, and fraction double interpolation multiple, and the fixed sample rate be suitable in different incoming symbol rate situation exports;
(3) integral multiple interpose module A and integral multiple abstraction module B all adopts the mode of multi-level semi-band filter and the cascade of multi-stage data selector, there is the function of arbitrary integer times speed adjustment, the number of half-band filter can be increased and decreased according to the relation of target sampling rate and input signal symbol rate, the sample rate conversion process of any adaptive-bandwidth signal can be adapted to, enhance adaptability and the signal handling capacity of whole device.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of up-sampling rate converting unit of the present invention;
Fig. 2 is the structured flowchart of down-sampling rate converting unit of the present invention;
Fig. 3 is the input and output schematic diagram of control module A in up-sampling rate converting unit;
Fig. 4 is the theory diagram of integral multiple interpose module A in up-sampling rate converting unit;
Fig. 5 is fraction double interpolation filter input and output schematic diagrams;
Figure 6 shows that the input and output schematic diagram of control module B in down-sampling rate converting unit.
Embodiment
Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail, but protection scope of the present invention is not limited to the following stated.
As shown in Figure 1, a kind of sample rate conversion device of bandwidth continuous variable, it is made up of up-sampling rate converting unit and down-sampling rate converting unit.
Up-sampling rate converting unit comprises formed filter, integral multiple interpose module A, point several times interpose module A, DAC digital to analog converter and control module A, formed filter is used for the sequence that receiving end/sending end needs to send, and with M fixing multiple doubly, filtering interpolation process is carried out to sequence to be sent, complete the spectral shaping of sequence to be sent, M generally gets 4, formed filter can select root raised cosine filter, can certainly select other formed filter; The signal output part of formed filter is connected with DAC digital to analog converter with a point several times interpose module A by integral multiple interpose module A successively, integral multiple interpose module A is used for the integer power interpolation process doubly data after spectral shaping being carried out to two, by the sampling rate conversion of data to the interpolation process range of dividing several times interpose module A; Point several times interpose module A is used for carrying out fraction double interpolation process to the data after the process of integral multiple interpolation, makes the sample rate of output data be target sampling rate; DAC digital to analog converter is responsible for the data after by sampling rate conversion and is carried out the conversion of numeric field to analog domain, and output sampling rate is the data of target sampling rate; The control signal output of control module A is connected with a point control signal input of several times interpose module A with integral multiple interpose module A respectively, control module A be used for according to input the symbol rate of sequence to be sent and the proportionate relationship of target sampling rate, the integral multiple interpolation multiple of computes integer times interpose module A, and the fraction double interpolation multiple of point several times interpose module A, control module A adopts the mode of software control, realize the division arithmetic process that hardware circuit not easily realizes, improve operation efficiency, and save hardware spending.
As shown in Figure 2, down-sampling rate converting unit comprises ADC analog to digital converter, point several times interpose module B, integral multiple abstraction module B, matched filter and control module B, ADC analog to digital converter is used at receiving terminal, carries out the conversion of analog domain to numeric field with the analog signal of fixed sample rate to input.The digital signal output end of ADC analog to digital converter is connected with matched filter with integral multiple abstraction module B by a point several times interpose module B successively; Divide several times interpose module B to receive the digital signal of ADC analog to digital converter output, and carry out filtering interpolation process to the digital signal received, the sample rate of the data that point several times interpose module B is exported is the integral multiple of input signal symbol rate; The integral multiple that integral multiple abstraction module B is used for carrying out the data after point several times interpolation process the power side of two extracts process, and output sampling rate is the M signal doubly of input signal symbol rate, and M is a fixed value, generally gets 4; Matched filter is used for carrying out matched filtering to extracting the signal after processing; Control module B is used for according to the bandwidth of input signal and the relation of ADC analog to digital converter sample rate, the integral multiple extracting multiple of computes integer times abstraction module B, and the fraction double interpolation multiple of point several times interpose module B, control module B adopts the mode of software control, realizes the division arithmetic process that hardware circuit not easily realizes.
Described integral multiple interpose module A and integral multiple abstraction module B structural similarity, as shown in Figure 4, form by multiple half-band filter (HB) and multiple data selector (Mux) cascade, each half-band filter (HB) realizes the interpolation processing of two times, therefore, integral multiple interpose module A can realize the n power interpolation doubly of two, integral multiple abstraction module B can realize the n power extraction doubly of two, wherein, n is half-band filter (HB) number of cascade, data selector (Mux) is for the filtering interpolation process of control and participate in integral multiple or the number of half-band filter (HB) participating in the process of integral multiple filtering extraction.
For integral multiple interpose module A, the output signal after formed filter molding filtration as the input signal of integral multiple interpose module A, n-th grade of half-band filter (HB
n) input be directly the input signal of integral multiple interpose module A, n-th grade of half-band filter (HB
n) output as the (n-1)th DBMS selector (Mux
n-1) an input, the (n-1)th DBMS selector (Mux
n-1) another be input as the input signal of integral multiple interpose module A, the (n-1)th DBMS selector (Mux
n-1) output as (n-1)th grade of half-band filter (HB
n-1) input, (n-1)th grade of half-band filter (HB
n-1) output as the n-th-2 DBMS selector (Mux
n-2) an input, the n-th-2 DBMS selector (Mux
n-2) another be input as the input signal of integral multiple interpose module A, cascade successively, finally by the 0th DBMS selector (Mux
0) output as the output signal of integral multiple interpose module A.
For integral multiple abstraction module B, divide the input signal of output signal as integral multiple abstraction module B of several times interpose module B, n-th grade of half-band filter (HB
n) input be directly the input signal of integral multiple abstraction module B, n-th grade of half-band filter (HB
n) output as the (n-1)th DBMS selector (Mux
n-1) an input, the (n-1)th DBMS selector (Mux
n-1) another be input as the input signal of integral multiple abstraction module B, the (n-1)th DBMS selector (Mux
n-1) output as (n-1)th grade of half-band filter (HB
n-1) input, (n-1)th grade of half-band filter (HB
n-1) output as the n-th-2 DBMS selector (Mux
n-2) an input, the n-th-2 DBMS selector (Mux
n-2) another be input as the input signal of integral multiple abstraction module B, cascade successively, finally by the 0th DBMS selector (Mux
0) output as the output signal of integral multiple abstraction module B.
Concrete, for integral multiple interpose module A, total number of inner half-band filter (HB) is determined by the symbol rate of the sequence to be sent of minimum input and the ratio of target sampling rate fs_u; For integral multiple abstraction module B, total number of inner half-band filter (HB) is determined by the ratio of the bandwidth of the minimum input signal of receiving terminal and the sample rate f s_d of ADC analog to digital converter.
For integral multiple interpose module A, the number of the half-band filter of described participation integral multiple filtering interpolation process is determined by the symbol rate of the sequence to be sent of current input and the ratio of target sampling rate fs_u; For integral multiple abstraction module B, the number of the half-band filter of described participation integral multiple filtering extraction process is determined by the ratio of the symbol rate of current receiving terminal input signal and the sample rate f s_d of ADC analog to digital converter.
As preferably, a described point several times interpose module A and point several times interpose module B all adopts polynomial interopolation filter.
A sampling rate converting method for bandwidth continuous variable, it comprises the step of a up-sampling rate conversion and the step of a down-sampling rate conversion, and described up-sampling rate conversion comprises following sub-step:
S01: formed filter receiving end/sending end needs the sequence sent, and doubly fix multiple with M filtering interpolation forming processes is carried out to sequence to be sent, make signal spectrum shaping, meanwhile, the sequence that control module A receiving end/sending end is to be sent, according to the symbol rate f of sequence to be sent
symbol_uwith the ratio R _ u of target sampling rate fs_u, calculate the integral multiple interpolation multiple N_u of integral multiple interpose module A and the fraction double interpolation multiple uk_u of point several times interpose module A, ratio R _ u and the relation between integral multiple interpolation multiple N_u, fraction double interpolation multiple uk_u as follows:
R_u=N_u*uk_u*M，
Wherein, M is the fixing interpolation multiple of formed filter, and M generally gets 4.
As shown in Figure 3, the input parameter of control module A is the symbol rate f of sequence to be sent
symbol_uwith target sampling rate fs_u, according to proportionate relationship between the two, export fraction double interpolation multiple uk_u and half-band filter number HB_step_u.The pass of half-band filter number HB_step_u and integral multiple interpolation multiple N_u is: N_u=2
hB_step_u, therefore, the input/output relation of control module A can be expressed as:
in formula, the symbol rate of sequence to be sent is multiplied by M is fixing interpolation multiple in order to remove formed filter.
The concrete grammar of control module A computes integer times interpolation multiple N_u and fraction double interpolation multiple uk_u is as follows: first need the symbol rate of sequence to be sent and the relation of target sampling rate that process minimum input, calculate the half-band filter number needed at most, again by the symbol rate of current sequence and the relation of target sampling rate, under determining current sign rate, need number HB_step_u and the fraction double interpolation multiple uk_u of the half-band filter of participation work.Wherein HB_step_u is calculated to the minimum ratio approaching target sampling rate and current sign rate of mode of the HB_step_u power of employing two, ratio as target sampling rate and current sign rate is that 7.5(removes after formed filter fixes interpolation multiple), the integral multiple interpolation multiple that can minimumly approach is the secondary power of two, thus, the value of HB_step_u is 2.Fraction double interpolation multiple uk_u is the ratio of target sampling rate and interpolation post-sampling rate, because integral multiple interpose module A carries out interpolation with the multiple of two, thus fraction double interpolation multiple uk_u is then an arbitrary value between 1 ~ 2, for precedent, ratio is the target sampling rate of interpolation multiple after 4 times of interpolations of 7.5 and the sample rate ratio after integral multiple interpolation is 1.875, thus, the value of fraction double interpolation multiple uk_u is 1.875.
The interpolation multiple of formed filter is fixed as M times of interpolation, is designed by filter normalization, input sampling rate and output sampling rate constant be M relation doubly, thus formed filter parameter can not change along with the change of sequence symbol rate to be sent.
S02: integral multiple interpose module A receives the data after formed filter process, according to the integral multiple interpolation multiple N_u that control module A provides, the half-band filter needing to participate in the process of integral multiple filtering interpolation is selected, by the incoming frequency scope that the sample rate up-sampling of the data received requires to point several times interpolation by the data selector of inside.
Integral multiple interpose module A achieves the integral multiple interpolation processing of data, can be realized the integral multiple interpolation of larger multiple by the mode of multi-level semi-band filter cascade.Seletion calculation amount is common FIR filter amount of calculation half, and compared to cic filter gain be 0 half-band filter based on filter cell, every grade of half-band filter realizes the integral number power interpolation of 2.Each what all carry out is the interpolation processing of 2 times, and in optional sign rate situation, the relative passband of half-band filter, bandwidth of rejection is equal, and thus the coefficient of half-band filter can not change along with the change of symbol rate.The theory diagram of integral multiple interpose module A as shown in Figure 4, when integral multiple interpose module A carries out data processing, first determine by control module A the number n needing at most half-band filter, and needing the number HB_step_u of half-band filter of participation work at every turn, parameter HB_step_u determines the half-band filter number that participates in calculating and every DBMS selector (Mux) is the output selected input signal or select upper level half-band filter (HB).As HB_step_u be 3 time, need three half-band filters to participate in filtering, meanwhile, third level data selector (Mux
3) input signal will be selected as the output of this selector, remainder data selector (Mux
2, Mux
1and Mux
0) all select the output of upper level half-band filter to give next stage half-band filter as the output of data selector, three half-band filter participation work can be ensured like this.
The integral multiple interpolation multiple N_u that control module A calculates should be the integral number power of two, and integral multiple interpose module A participates in the number of the half-band filter of integral multiple filtering interpolation process according to the interval selection of the value of integral multiple interpolation multiple N_u, as N_u be 8 time, three half-band filters will be had to participate in filtering interpolation work.
S03: the fraction double interpolation multiple uk_u that point several times interpose module A provides according to control module A, data after integral multiple interpose module A process are carried out to the interpolation processing of point several times, the sample rate conversion after the sample rate of the data after integral multiple interpose module A process is converted by integral multiple is to target sampling rate.
Fraction double interpolation multiple uk_u is any mark between 1 ~ 2, and the output of point several times interpose module A is target sampling rate, and target sampling rate is no more than the twice of the sample rate of the signal that integral multiple interpose module A exports.
Show sampling rate conversion schematic diagram when point several times interpose module A adopts fraction double interpolation filter as shown in Figure 5, the sample rate f s_int of input is the sample rate after integral multiple interpose module A process, fs_u is target sampling rate, through the analysis of aforementioned control module A, namely the fraction double interpolation multiple uk_u sending into point several times interpose module A is the ratio of the sample rate that target sampling rate and integral multiple interpose module A export, and is expressed as:
S04:DAC digital to analog converter carries out digital-to-analogue conversion to the data that point several times interpose module A transmits, and exports the data of analog domain.Concrete, DAC digital to analog converter is all operated in identical clock frequency under any symbol rate, like this, the bandwidth of follow-up analog filter can be made to remain unchanged, and reduces the pressure of analogue device signal transacting.
So far, up-sampling rate transfer process is completed.
Described down-sampling rate conversion comprises following sub-step:
S11:ADC analog to digital converter receives the signal through the front-end processing of radio frequency analog territory, the input signal of optional sign rate is sampled with fixed sample rate fs_d, input signal is transformed into numeric field by analog domain, wherein, the relation of input signal bandwidth and ADC fixed sample rate fs_d meets nyquist sampling theorem.Meanwhile, control module B receives input signal, according to bandwidth parameter f and the ADC sampling rate parameter fs_d of input signal, calculate the integral multiple extracting multiple N_d of point fraction double interpolation multiple uk_d of several times interpose module B and integral multiple abstraction module B, make the sample rate of ADC and the ratio of input signal bandwidth be R_d, then ratio R _ d and the relation between fraction double interpolation multiple uk_d, integral multiple extracting multiple N_d as follows:
Wherein, N is the sample rate of signal and the multiple value of current input signal symbol rate of integral multiple abstraction module B output.
As shown in Figure 6, the input parameter of control module B is the bandwidth f of input signal and the fixed sample rate fs_d of ADC analog to digital converter, according to proportionate relationship between the two, export fraction double interpolation multiple uk_d and half-band filter number HB_step_d, the pass of half-band filter number HB_step_d and integral multiple extracting multiple N_d is: N_d=2
hB_step_d, the pass between the input/output argument of control module B is:
The account form of control module B is: first according to the bandwidth of input signal and the relation of target sampling rate, determine a point output sampling rate of several times interpose module B, this sample rate be closest to incoming symbol rate 2 the sample rate of integral number power, thus can determine that fraction double interpolation multiple uk_d is any mark between 1 ~ 2, and size is determined by current input symbol rate.During computes integer times extracting multiple N_d, the relation of the minimum signal bandwidth processed as required and the fixed sample rate fs_d of ADC analog to digital converter, determine the number of the half-band filter altogether needed, then determine the current half-band filter number HB_step_d needing to participate in extracting according to the bandwidth of current input signal and the relation of ADC analog to digital converter sample rate.
S12: the fraction double interpolation multiple uk_d that point several times interpose module B provides according to control module B, filtering interpolation process is carried out to the digital signal received, the input sampling rate of this module is the sample frequency of ADC analog to digital converter, and the sample rate of the signal of output is the integral multiple of input signal symbol rate.
Point several times interpose module B input sampling rate is the sample rate of ADC analog to digital converter, output sampling rate be the integer power of two of symbol rate doubly, and output sampling rate is no more than 2 times of input sampling rate.Divide several times interpose module B identical with the structure of up-sampling rate converting unit mid-score times interpose module A.
S13: the integral multiple extracting multiple N_d that integral multiple abstraction module B provides according to control module B, the half-band filter number HB_step_d needing to participate in the process of integral multiple filtering extraction is selected by the data selector of inside, integral multiple is carried out to the signal after fraction double interpolation process and extracts process, output sampling rate is the N signal doubly of current input signal symbol rate, this is also the reason that will be multiplied by N in the relational expression of above-mentioned R_d when integral multiple extracting multiple N_d, and N generally gets 4.
Integral multiple abstraction module B is the half-band filter number HB_step_d participating in the process of integral multiple filtering extraction according to the interval selection of integral multiple extracting multiple N_d, as N_d be 8 time, will have three half-band filters participation filtering extractions.
Integral multiple abstraction module B is identical with the structure of integral multiple interpose module A in up-sampling rate converting unit, is also be made up of the half-band filter of multiple mutual cascade.Each half-band filter can realize the signal extraction of 2 times, and thus D half-band filter can realize the D power extraction process doubly of 2, and D is determined by ADC analog to digital converter sample rate and minimum signal bandwidth.Select the selection course of integral multiple interpose module A in the process of the number of the half-band filter participating in extraction work and up-sampling rate converting unit similar.
S14: matched filter extracts the signal after processing to integral multiple and carries out filtering process, the signal after output filtering.Matched filter is corresponding with formed filter, can select root raised cosine filter, but here, root raised cosine filter does not extract or interpolation processing, only carries out the filtering of signal.
So far, down-sampling rate transfer process is completed.
Further, a described point several times interpose module A and point several times interpose module B all adopts the mode of polynomial interopolation to realize fraction double interpolation process, and the formula of polynomial interopolation is as follows:
Wherein, l
kx () is basic point x
in Interpolation-Radix-Function (i=0,1 ... n), x is the position needing interpolation point, and namely correspond in device is take uk_d as the not accumulated value in the same time at interval, l
kx () is the value after interpolation.
Above sample rate conversion is that example further illustrates implementation process of the present invention below.
Suppose software radio transmitting terminal, the range of symbol rates of the sequence sent is 128KHz ~ 16MHz, the current sequence symbol rate needing transmitting is 1.2MHz, the fixed target sample rate that need reach is 64MHz, adopt up-sampling rate converting unit of the present invention and up-sampling rate conversion method, then the parameter of each module needs configuration is: control module A configures the interpolation multiple that each module needs, according to the number of the half-band filter that the scope determination integral multiple interpose module A of list entries needs altogether.The range of symbol rates of list entries is 128KHz ~ 16MHz, after 4 times of interpolations that formed filter is fixing, the sample rate scope sending into integral multiple interpose module A is 512KHz ~ 64MHz, and also namely interpolation multiple is 0 ~ 125, maximum interpolation multiple is 125 times, needs 6 half-band filters.When incoming symbol rate is 1.2MHz, the sample rate after molding filtration is 4.8MHz, and the interpolation multiple that reach target sampling rate needs is 64MHz/4.8MHz=13.3333 times, and the minimum integral number power approaching 2 of interpolation multiple is that 8, HB_step_u is set to 3.The output of formed filter is by third level data selector (Mux
3) enter integral multiple interpose module A, after 8 times of interpolation, the output sampling rate of integral multiple interpose module A is 4.8*8=38.4MHz.Calculate the fraction double interpolation multiple uk_u=64/38.4=1.6667 of point several times interpose module A further doubly.
Claims (10)
1. a sample rate conversion device for bandwidth continuous variable, is characterized in that: it is made up of up-sampling rate converting unit and down-sampling rate converting unit;
Up-sampling rate converting unit comprises formed filter, integral multiple interpose module A, point several times interpose module A, DAC digital to analog converter and control module A, formed filter is used for the sequence that receiving end/sending end needs to send, and with fixing multiple, filtering interpolation process is carried out to sequence to be sent, complete the spectral shaping of sequence to be sent; The signal output part of formed filter is connected with DAC digital to analog converter with a point several times interpose module A by integral multiple interpose module A successively, integral multiple interpose module A is used for the integer power interpolation process doubly data after spectral shaping being carried out to two, by the sampling rate conversion of data to the interpolation process range of dividing several times interpose module A; Point several times interpose module A is used for carrying out fraction double interpolation process to the data after the process of integral multiple interpolation, makes the sample rate of output data be target sampling rate; DAC digital to analog converter is responsible for the data after by sampling rate conversion and is carried out the conversion of numeric field to analog domain, and output sampling rate is the data of target sampling rate; The control signal output of control module A is connected with a point control signal input of several times interpose module A with integral multiple interpose module A respectively, control module A be used for according to input the symbol rate of sequence to be sent and the proportionate relationship of target sampling rate, the integral multiple interpolation multiple of computes integer times interpose module A, and the fraction double interpolation multiple of point several times interpose module A;
Down-sampling rate converting unit comprises ADC analog to digital converter, point several times interpose module B, integral multiple abstraction module B, matched filter and control module B, ADC analog to digital converter is used at receiving terminal, carry out the conversion of analog domain to numeric field with the analog signal of fixed sample rate to input, the digital signal output end of ADC analog to digital converter is connected with matched filter with integral multiple abstraction module B by a point several times interpose module B successively; Divide several times interpose module B to receive the digital signal of ADC analog to digital converter output, and carry out filtering interpolation process to the digital signal received, the sample rate of the data that point several times interpose module B is exported is the integral multiple of input signal symbol rate; The integral multiple that integral multiple abstraction module B is used for carrying out the data after point several times interpolation process the power side of two extracts process, and output sampling rate is the M signal doubly of input signal symbol rate, and M is a fixed value; Matched filter is used for carrying out matched filtering to extracting the signal after processing; Control module B is used for according to the bandwidth of input signal and the relation of ADC analog to digital converter sample rate, the integral multiple extracting multiple of computes integer times abstraction module B, and the fraction double interpolation multiple of point several times interpose module B.
2. the sample rate conversion device of a kind of bandwidth continuous variable according to claim 1, it is characterized in that: described integral multiple interpose module A and integral multiple abstraction module B structural similarity, form by multiple half-band filter and multiple data selector cascade, the n power that can realize two interpolation doubly or extraction, wherein, n is the half-band filter number of cascade, and data selector is used for the number of the half-band filter of the filtering interpolation process of control and participate in integral multiple or the process of participation integral multiple filtering extraction;
For integral multiple interpose module A, output signal after formed filter molding filtration is as the input signal of integral multiple interpose module A, the input of n-th grade of half-band filter is directly the input signal of integral multiple interpose module A, the output of n-th grade of half-band filter is as an input of the (n-1)th DBMS selector, another of (n-1)th DBMS selector is input as the input signal of integral multiple interpose module A, the output of the (n-1)th DBMS selector is as the input of (n-1)th grade of half-band filter, the output of (n-1)th grade of half-band filter is as an input of the n-th-2 DBMS selector, another of n-th-2 DBMS selector is input as the input signal of integral multiple interpose module A, cascade successively, finally by the output of the 0th DBMS selector as the output signal of integral multiple interpose module A,
For integral multiple abstraction module B, divide the input signal of output signal as integral multiple abstraction module B of several times interpose module B, the input of n-th grade of half-band filter is directly the input signal of integral multiple abstraction module B, the output of n-th grade of half-band filter is as an input of the (n-1)th DBMS selector, another of (n-1)th DBMS selector is input as the input signal of integral multiple abstraction module B, the output of the (n-1)th DBMS selector is as the input of (n-1)th grade of half-band filter, the output of (n-1)th grade of half-band filter is as an input of the n-th-2 DBMS selector, another of n-th-2 DBMS selector is input as the input signal of integral multiple abstraction module B, cascade successively, finally by the output of the 0th DBMS selector as the output signal of integral multiple abstraction module B.
3. the sample rate conversion device of a kind of bandwidth continuous variable according to claim 2, it is characterized in that: for integral multiple interpose module A, total number of inner half-band filter is determined by the symbol rate of the sequence to be sent of minimum input and the ratio of target sampling rate; For integral multiple abstraction module B, total number of inner half-band filter is determined by the ratio of the bandwidth of the minimum input signal of receiving terminal and the sample rate of ADC analog to digital converter.
4. the sample rate conversion device of a kind of bandwidth continuous variable according to claim 2, it is characterized in that: for integral multiple interpose module A, the number of the half-band filter of described participation integral multiple filtering interpolation process is determined by the symbol rate of the sequence to be sent of current input and the ratio of target sampling rate; For integral multiple abstraction module B, the number of the half-band filter of described participation integral multiple filtering extraction process is determined by the ratio of the symbol rate of current receiving terminal input signal and the sample rate of ADC analog to digital converter.
5. the sample rate conversion device of a kind of bandwidth continuous variable according to claim 1, it is characterized in that: described control module A adopts the mode of software control, control module B also adopts the mode of software control, realizes the division arithmetic process that hardware circuit not easily realizes.
6. the sample rate conversion device of a kind of bandwidth continuous variable according to claim 1, is characterized in that: a described point several times interpose module A and point several times interpose module B all adopts polynomial interopolation filter.
7. the sample rate conversion device of a kind of bandwidth continuous variable according to claim 1, is characterized in that: described formed filter adopts root raised cosine filter.
8. a sampling rate converting method for bandwidth continuous variable, is characterized in that: it comprises the step of a up-sampling rate conversion and the step of a down-sampling rate conversion, and described up-sampling rate conversion comprises following sub-step:
S01: formed filter receiving end/sending end needs the sequence sent, and doubly fix multiple with M filtering interpolation forming processes is carried out to sequence to be sent, make signal spectrum shaping, meanwhile, the sequence that control module A receiving end/sending end is to be sent, according to the symbol rate of sequence to be sent and the ratio R _ u of target sampling rate, calculate the integral multiple interpolation multiple N_u of integral multiple interpose module A and the fraction double interpolation multiple uk_u of point several times interpose module A, ratio R _ u and the relation between integral multiple interpolation multiple N_u, fraction double interpolation multiple uk_u as follows:
R_u=N_u*uk_u*M，
Wherein, M is the fixing interpolation multiple of formed filter;
S02: integral multiple interpose module A receives the data after formed filter process, according to the integral multiple interpolation multiple N_u that control module A provides, the half-band filter needing to participate in the process of integral multiple filtering interpolation is selected, by the incoming frequency scope that the sample rate up-sampling of the data received requires to point several times interpolation by the data selector of inside;
S03: the fraction double interpolation multiple uk_u that point several times interpose module A provides according to control module A, data after integral multiple interpose module A process are carried out to the interpolation processing of point several times, the sample rate conversion after the sample rate of the data after integral multiple interpose module A process is converted by integral multiple is to target sampling rate;
S04:DAC digital to analog converter carries out digital-to-analogue conversion to the data that point several times interpose module A transmits, and exports the data of analog domain;
So far, up-sampling rate transfer process is completed;
Described down-sampling rate conversion comprises following sub-step:
S11:ADC analog to digital converter receives the signal through the front-end processing of radio frequency analog territory, the input signal of optional sign rate is sampled with fixed sample rate fs_d, input signal is transformed into numeric field by analog domain, meanwhile, control module B receives input signal, according to bandwidth parameter f and the ADC sampling rate parameter fs_d of input signal, calculate the integral multiple extracting multiple N_d of point fraction double interpolation multiple uk_d of several times interpose module B and integral multiple abstraction module B, the sample rate of ADC and the ratio of input signal bandwidth is made to be R_d, then ratio R _ d and fraction double interpolation multiple uk_d, relation between integral multiple extracting multiple N_d is as follows:
Wherein, N is the sample rate of signal and the multiple value of current input signal symbol rate of integral multiple abstraction module B output;
S12: the fraction double interpolation multiple uk_d that point several times interpose module B provides according to control module B, filtering interpolation process is carried out to the digital signal received, makes the sample rate of the signal of output be the integral multiple of input signal symbol rate;
S13: the integral multiple extracting multiple N_d that integral multiple abstraction module B provides according to control module B, the half-band filter number HB_step_d needing to participate in the process of integral multiple filtering extraction is selected by the data selector of inside, integral multiple is carried out to the signal after fraction double interpolation process and extracts process, output sampling rate is the N signal doubly of current input signal symbol rate, and the relation between half-band filter number HB_step_d and integral multiple extracting multiple N_d is as follows:
N_d=2
HB_step_d；
S14: matched filter extracts the signal after processing to integral multiple and carries out filtering process, the signal after output filtering;
So far, down-sampling rate transfer process is completed.
9. the sampling rate converting method of a kind of bandwidth continuous variable according to claim 8, it is characterized in that: a described point several times interpose module A and point several times interpose module B all adopts the mode of polynomial interopolation to realize fraction double interpolation process, and the formula of polynomial interopolation is as follows:
Wherein, l
kx () is basic point x
in Interpolation-Radix-Function (i=0,1 ... n), x is the position needing interpolation point, and namely correspond in device is take uk_d as the not accumulated value in the same time at interval, l
kx () is the value after interpolation.
10. the sampling rate converting method of a kind of bandwidth continuous variable according to claim 8, is characterized in that: described DAC digital to analog converter is all operated in identical clock frequency under any symbol rate.
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