CN106249215A - A kind of sampling ultrasonic phase array signal resolution power that rises the most again improves method - Google Patents

Abstract

The invention discloses a kind of sampling ultrasonic phase array signal resolution power that rises the most again and improve method, including: A rises sampling to different frequency probe echo-signal multiple γ in proportion；B carries out decimal n to a liter sampling multiple γ_FRemove point with integer I, i.e. γ=n_FI, it is achieved multistage liter is sampled；C realizes decimal n respectively_FWith I times of interpolation of integer, described decimal n_FTimes interpolation carries out interpolation by multinomial, and I times of interpolation of described integer is realized by heterogeneous FIR interpolation filtering technology.The invention reside in ultrasonic phase array instrument signal software and rise the exploitativeness of sampling algorithm, versatility, alleviate single, single to rise sampling algorithm processor performance transition is relied on, its shortcoming is avoided with parallel data tupe by multiformity interpolation algorithm, multilevel interpolation cascade, moreover it is accomplished that and arbitrarily rises sampling again, ensure data integrity, improve digital resolution power, and then improve signal to noise ratio.

Description

A kind of sampling ultrasonic phase array signal resolution power that rises the most again improves method

Technical field

The present invention relates to a kind of sampling ultrasonic phase array signal resolution power that rises the most again and improve method.

Background technology

The ultrasonic phase array digital detection system that digitized bit wide is certain to obtain high digital resolution power and signal to noise ratio, needs Echo-signal is carried out high-speed sampling, generally by improving ADC sample rate, multichannel collecting and numeral resampling bank of filters interpolation Though method can realize liter sampling, but soft and hardware system complex, it is achieved difficulty is bigger, and it rises brought googol evidence of sampling Amount, processes to follow-up data and brings difficulty.It addition, the high-speed sampling to echo-signal, need to sample according to practical situation adjustable Rate, application is flexibly.

Hardware system ADC sample rate is usually fixing f_s, and for ultrasonic probe frequency diversity, herein by software Resampling technique is to different frequency f_pProbe echo carries out a liter sampling so that sample rate becomes certain ratio to close with frequency probe System, i.e. sample rate f '_s=R f_p(R is a certain constant Proportional factor, depending on different system), and rise sampling multiple γ=f'_s/ f_s, optimization sampling can be realized and improve digital resolution power further.Feature is filtered with polyphase interpolating: multinomial based on polynomial interopolation Formula interpolation method so that interpolation knot value is constant, has signal locally completeness advantage, easily realizes any times of decimal interpolation；Heterogeneous Interpolation filtering, can guarantee that signal spectrum integrity after interpolation, the advantage with signal overall situation integrity, easily realizes any times of integer Interpolation.It is heterogeneous interior that proposition three Spline-Hemite polynomial interpolations of segmented plain (little several times interpolation) combines FIR filter Insert filtering (integral multiple interpolation) (data rate exceeds FPGA working clock frequency) algorithm, it is achieved arbitrarily rising sampling again, FIR filters Device polyphase interpolating carries out heterogeneous low rate output to the signal of two-forty, has simple in construction, realizes easy, real-time, mistake The features such as difference is little.It is prone to the real-time pipeline processes of FPGA, fully demonstrates this liter of sampling method and improve the advantage of digital resolution power, by FPGA verifies its effect, has important real value.

Summary of the invention

For solving above-mentioned technical problem, any sampling ultrasonic phase array signal that rises the most again of a kind of offer is provided and divides Distinguish that power improves method, the single liter sampling plan of tradition is improved, by section three Spline-Hemite multinomials of slip Interpolation method (little several times interpolation) combines FIR filter polyphase interpolating filtering (integral multiple interpolation), and (data rate works beyond FPGA Clock frequency) algorithm, it is achieved arbitrarily rise sampling again, make sample rate from f_sRise to γ × f_s, improve digital resolution by a liter sampling Power.

The purpose of the present invention is realized by following technical scheme:

A kind of sampling ultrasonic phase array signal resolution power that rises the most again improves method, including:

A rises sampling to different frequency probe echo-signal multiple γ in proportion；

B carries out decimal n to a liter sampling multiple γ_FRemove point with integer I, i.e. γ=n_FI, it is achieved multistage liter is sampled；

C realizes decimal n respectively_FWith I times of interpolation of integer, described decimal n_FTimes interpolation carries out interpolation by multinomial, described whole I times of interpolation of number is realized by heterogeneous FIR interpolation filtering technology.

Compared with prior art, one or more embodiments of the invention can have the advantage that

Digital interpolation rises sampling, a liter sampling multiple γ is resolved into two numbers and is multiplied γ=n_FI pattern, whereinMinimize n_F, maximize I, n_F(close to 1 floating number) times interpolation is real by polynomial interpolation Existing, belong to the direct interpolation of time domain so that interpolation knot value is constant, there is signal locally completeness advantage, easily realize inserting the most again Value, can regard thin interpolation as；I (integer) times interpolation is to be realized by polyphase interpolating filtering, based on frequency domain interpolation, can guarantee that interpolation Rear signal spectrum integrity, the advantage with signal overall situation integrity, but it is more difficult to realize little several times interpolation, can regard as thick Insert.So, γ=n_FI pattern is by combining both interpolation schemes, it is achieved any times of interpolation rises sampling, is conducive to ultrasonic phase Control battle array instrument echo-signal realizes optimization and rises the FPGA realization of sampling and algorithm.

The feature of this method is that ultrasonic phase array instrument signal software rises the exploitativeness of sampling algorithm, versatility, subtracts The most single, single rises sampling algorithm and relies on processor performance transition, by multiformity interpolation algorithm, multilevel interpolation cascade with also Row data processing mode avoids its shortcoming, moreover is accomplished that and arbitrarily rises sampling again, ensures data integrity, improves digital resolution Power, and then improve signal to noise ratio.

Accompanying drawing explanation

Accompanying drawing is for providing a further understanding of the present invention, and constitutes a part for description, with the reality of the present invention Execute example to be provided commonly for explaining the present invention, be not intended that limitation of the present invention.In the accompanying drawings:

Fig. 1 is to rise sampling ultrasonic phase array signal resolution power the most again to improve method flow diagram；

Fig. 2 is that polynomial interopolation combines liter sampling block diagram with polyphase interpolating filtering；

Fig. 3 is three Spine-Hermite fixed point interpolation FPGA circuitry structures of segmented plain；

Fig. 4 be ultrasonic phase array S sweep with cursor at A sweep oscillogram；

Fig. 5 is three Spline-Hermite interpolation method emulation of segmented plain and realizes design sketch；

Fig. 6 is 4 times of polyphase interpolating FIR Filtering Simulations and realize design sketch；

Fig. 7 is design sketch before and after ultrasound echo signal interpolation.

Detailed description of the invention

For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with embodiment and accompanying drawing to this Bright it is described in further detail.

As it is shown in figure 1, improve method flow diagram for rising sampling ultrasonic phase array signal resolution power the most again, the method includes Following steps:

Step 10 carries out software multiple γ in proportion to different frequency probe echo and rises sampling, it is achieved optimization is sampled；

In hardware ADC sample rate f_sUnder certain condition, many for meeting frequency probe multiformity correspondence echo signal sample rate The requirement of sample, can realize resampling, different frequency probe f by digital interpolation techniques_pFactor R is carried out according to a certain percentage Sampling, then software rises sampling multiple γ=f_p·R/f_sSo that different frequency probe carries out rising through identical multiple R sample rate to be adopted Sample, it is achieved optimization is sampled.

Step 20 carries out decimal n to a liter sampling multiple γ_FRemove point with integer I, i.e. γ=n_FI, it is achieved multistage liter is sampled；

Concrete methods of realizing is as follows:

Based on numerical computations and Digital Signal Processing feature, in using little several times polynomial interpolation (carefully inserting), integral multiple Insert the pattern that filter method (slightly inserting) combines, improve the exploitativeness of algorithm, motility, it is easy to FPGA hardware quickly realizes.Under Face research arbitrarily rises sampling multiple γ and realizes two-stage liter sample interpolation multiple optimum distribution γ=n_FI, solves decimal n_FWith whole Number I scheme.

If the data volume that N is phased array system front-end collection, given arbitrarily liter sampling multiple γ (> 1), can be classified as whole Number I, decimal n_F' two parts sum, i.e. γ=I+n_F', orderγ=nF I can be tried to achieve, i.e. have a following formula:

Solve I, n_F, wherein,Table rounds downwards, can be derived from n_F∈[1,2)。

Can be realized by following interpolation procedure:

1. first order interpolation (polynomial interopolation), it is achievedData volume stretches, and extensibility is little Number n_F,[] table rounds；

2. second level interpolation (interpolation filtering), it is achievedData volume stretches, and extensibility is integer I.

Given arbitrarily liter sampling multiple γ, can try to achieve an optimal interpolation multiple distribution formula γ=n_FI, it is achieved sampling Rate f_s→n_F×I×f_sPromote.n_F∈ [1,2) a times interpolation be prone to interpolation polynomial (small data volume stretching) technology realize, and I times of interpolation of integer is prone to interpolation filter and realizes so that arbitrarily γ times interpolation realizes optimization and rise sampling, and whole process is prone to The fast parallel realization of FPGA, improves efficiency of algorithm.Table 1 rises 100 times of thickness two-stage multiple allocation tables of sampling for probe.Phase in table Control battle array instrument commonly use frequency probe 1MHz, 2MHz, 2.25MHz, 2.5MHz, 3.5MHz, 4.75MHz, 5MHz, 7.5MHz, 10MHz, if ADC sample rate f_s=100MHz, rises sampling (× 100) by optimization and is scaling up respectively 1 × f_s、2×f_s、 2.25×f_s、2.5×f_s、3.5×f_s、4.75×f_s、5×f_s、7.5×f_s、10×f_s, for frequency probe 2.25,2.5, 3.5,4.75MHz, can try to achieve liter little several times n of sampling_F=1.5,1.125,1.25,1.667,1.1875 ∈ [1,2), interpolation integer Being respectively I=1,2,2,3,4 again, the FIR polyphase interpolating method of I times is prone to FPGA and realizes.

Step 30 decimal n_FTimes interpolation carries out interpolation by multinomial, and I times of interpolation of integer passes through heterogeneous FIR

Table 1 probe rises 100 times of thickness two-stage multiple allocation tables of sampling

Interpolation filtering technology realizes, it is achieved step is as follows:

Fig. 2 is that polynomial interopolation combines liter sampling block diagram with polyphase interpolating filtering；By polynomial interopolation and heterogeneous FIR interpolation Module forms.Herein according to three Spline polynomial interpolations, three Hermite two kinds of interpolation method features of band derivative multinomial (three Spline interpolation can guarantee that the convergence of interpolation curve, has the advantages that smoothness is good, error is little, but often calculates one Interpolation point needs whole interpolation knot number N to carry out computing, and operand is big), propose a kind of three Spine-Hermite of segmented plain and insert Value-based algorithm, its thinking: for N number of interpolation point, insert by solving three Spline of relatively point N ' (much smaller than N, segmented plain) Value multinomial, travels through all of interpolation point N with sliding-modes, obtains its discrete derivative, then substitute into Hermite formula for interpolation, can Try to achieve its interpolation polynomial.The corresponding less operand of less N' value is (herein in ultrasonic echo sample rate 100MHz, bandwidth During 0.5-15MHz, releasing best-fit value N'=7 through emulation, emulate the ultrasonic echo of 15MHz, result shows this Method is consistent with three Spline polynomial interpolation maximum relative errors, reaches 0.35%), interpolation curve smoothness can be made The features such as well, error is little, convergence good, amount of calculation is minimum, it is easy to FPGA streamline quickly realizes.Following is a brief introduction of three times Spline, Hermite multinomial.

Three Spline interpolation algorithms require that piecewise interpolation function has continuous print single order on whole interval or second order is led Number, its mathematical definition is at interval [t₀,t_n] superior function f (t) and n+1 coordinate node (t₀,y₀)、(t₁,y₁)、…(t_n,y_n), then At [t_i-1,t_i] meet functional expression on interval:

$\begin{array}{c}{S}_{pline-i}\left(t\right)=N_{i-1}\frac{{(t_i-t)}^3}{6h_i}+M_i\frac{{(t-t_{i-1})}^3}{6h_i}+(y_{i-1}-\frac{M_{i-1}}{6}{h}_i^2)\frac{(t_i-t)}{h_i}+(y_i-\frac{M_i}{6}{h}_i^2)\frac{(t-t_{i-1})}{h_i}\\ (t\∈\[t_{i-1},t_i\],i=1,2,\mathrm{...}n)\end{array}---\left(2\right)$

S_pline-iT () is referred to as function f (t) at interval [t_i-1,t_i] three Spline interpolation polynomials, M_iFor corresponding node (t_i,y_i) second order lead, nodal pitch h_i=h_i-1-h_i, its derivative S'_pline-iT () is represented by:

$S_{pline-i}^{\′}\left(t\right)=-M_{i-1}\frac{{(t_i-t)}^2}{2h_i}+M_i\frac{{(t-t_{i-1})}^2}{2h_i}+\frac{y_i-y_{i-1}}{h_i}-\frac{h_i}{6}(M_i-M_{i-1})---\left(3\right)$

M_iCan be solved by three moments euqation:

$\left\{\begin{array}{c}{\mathrm{\μ}}_1{M}_0+2M_1+{\mathrm{\λ}}_1{M}_2=g_1\\ {\mathrm{\μ}}_2{M}_1+2M_2+{\mathrm{\λ}}_2{M}_3=g_2\\ \mathrm{...}\\ {\mathrm{\μ}}_{n-1}{M}_{n-2}+2M_{n-1}+{\mathrm{\λ}}_{n-1}{M}_n=g_{n-1}\end{array}\right.---\left(4\right)$

Wherein i=1,2 ... n-1, Second dervative boundary condition further according to two-end-point: S "_pline(t₀)=y "₀=M₀,S”_pline(t_n)=y "_n=M_n, Generally make M₀=M_n=0 (natural boundary conditions), can solve unknown number M_i(i=0,1 ... n), substitute into formula (3) and three times can be obtained Spline Derivatives of Interpolation Polynomials formula S'_pline-i(t)。

Cubic Hamiltonian symmetrical systems method is defined on interval [t₀,t_n] superior function f (t) and n+1 coordinate node (t₀,y₀)、(t₁, y₁)、…(t_n,y_n), and node derivative value y' of correspondence₀=f'(t₀)、y'₁=f'(t₁),…y'_n=f'(t_n), then t ∈ [t_i-1,t_i] meet functional expression on interval:

H_ermite(t)=f (t_i)α₀(x)+f(t_i+1)α₁(t)+f'(t_i)β₀(t)-f'(t_i+1)β₁(t) (5)

H_ermiteT () is referred to as function f (t) at interval [t_i-1,t_i] cubic Hamiltonian symmetrical systems multinomial, its interpolation base letter Number:

${\mathrm{\α}}_0\left(t\right)=(1+2\frac{t-t_i}{t_{i+1}-t_i}){\left(\frac{t-t_{i+1}}{t_i-t_{i+1}}\right)}^2,{\mathrm{\α}}_1\left(t\right)=(1+2\frac{t-t_{i+1}}{t_i-t_{i+1}}){\left(\frac{t-t_i}{t_{i+1}-t_i}\right)}^2,---\left(6\right)$

${\mathrm{\β}}_0\left(t\right)=(t-t_i){\left(\frac{t-t_{i+1}}{t_i-t_{i+1}}\right)}^2,{\mathrm{\β}}_1\left(t\right)=(t-t_{i+1}){\left(\frac{t-t_i}{t_{i+1}-t_i}\right)}^2,$

Uniform sampling time interval h=t_i+1-t_i=1/f_s。

Three Spine-Hermite fixed point interpolation FPGA circuitry of segmented plain of Fig. 3 can be designed according to formula (5), (6) Structure, if taking 4.75MHz frequency probe to carry out analysis of experiments, sample rate is from f_sIt is raised to 4.75f_s, by formula (1), then n_F=4.75/4 =1.1875 (little several times rise sampling), I=4 (integral multiple rises sampling), as the S of Fig. 4 is swept with cursor at A sweep waveform and insert Value (points N after points N=390, interpolation before interpolation_X=N n_F=463, f_s=100MHz).Input parameter N_X、N、f(t_n) (n= 0,1 ... N-1) (original sampling point), obtain endpoint derivative y' in conjunction with three Spline-Hermite interpolation of segmented plain_i、y'_i+1, By through fixed point cubic Hamiltonian symmetrical systems computing, export f (s_n) (n=0,1 ... N_X-1).It can be seen that Hermite interpolation fortune Calculate and only need 8Three Spline-Hermite interpolation correspondence N' point convolution algorithms of N' point segmented plain, need N'/2 DSP-block, therefore algorithm about needs N'/2+8 DSP-block can realize f (t_n) (n=0,1 ... N-1) → f (s_n)(n =0,1 ... N_X-1) data drawing effect.

Fig. 5 is the emulation of three Spline-Hermite interpolation methods of segmented plain and realize design sketch, signal Xin, In_en, Yout, Out_en corresponding input, input respectively enable, export, export enable signal, input 390 sampling point signal (time differences), export 463 sampling point signal (time differences), it is achieved number of samples 390 → 463 conversion, interpolation Multiple n_F=1.1875 simulated effects.A in input Fig. 4 sweeps oscillogram through thin interpolation n of little several times_FRear signal, carries out 4 times of FIR Polyphase interpolating rises sampling emulation and experiment, and Fig. 6 is any 4 times of polyphase interpolating FIR Filtering Simulations and realize design sketch；In figure left, Right figure is respectively 4 phase interpolation filtering ModelSim analogous diagram, SignalTap measured waveform figures, emulates consistent with actual effect. For observing macro-effect after polyphase interpolating, to 4 phase speed f_sSignal syntheses 1 phase speed 4 × f_sSignal, such as Fig. 7 ultrasound echo signal Before and after interpolation shown in design sketch, knowable to the partial enlarged drawing of peak fractions, signal (speed 4 × f after interpolation_s) believe than before interpolation Number (speed f_s) there is higher resolving power, smoothness.

Above-mentioned any times rises sampling ultrasonic phase array signal resolution power raising method, pops one's head according to different frequency, use software Resampling mode improves sample rate, it is achieved optimization sampling improves digital signal resolution.Segmented plain three is used in realization Secondary Spline-Hermite polynomial interopolation combines with heterogeneous FIR interpolation filtering technology, a liter sampling multiple is realized twice and inserts Value, described step specifically includes:

1. to different frequency probe echo according to sample rate f_sDetermine, calculate software and rise sampling multiple γ, be decomposed into γ =n_FI pattern, whereinMinimize n_F, maximize I, it is easy to polynomial interopolation and interpolation filtering, Optimum mode realizes multistage liter and samples；

2. digital interpolation rises sampling section, n_F(n_FFor close to 1 floating number) times interpolation is by three Spline-of segmented plain Hermite polynomial interpolation realizes thin interpolation, and I (I is an integer) times interpolation is to realize thick interpolation by polyphase interpolating filtering, adopts Sample rate f_sIt is promoted to f_s×n_F× I, it is achieved any times of interpolation rises sampling.

Rise sampling ultrasonic phase array signal resolution power the most again to develop skill, rise the method for sampling by numeral and improve numeral point The power of distinguishing realizes optimization sampling, its motility, precision height, it is easy to FPGA realizes.

(1) study and improve numeral point for ultrasonic phase array instrument probe frequency diversity proposition optimization sampling principle Distinguish power, different frequency probe echoes is carried out software resampling, makes sample rate become, with frequency probe, the ratio fixed, it is achieved Optimize sampling；

(2) by analyzing three Spline polynomial interpolation features, (convergence is good, has the spy that smoothness is good, error is little Point) (can make by arranging interpolation knot derivative and controlling curve convergence direction with three Hermite polynomial interpolation features The amplitude error of interpolation curve controls within the specific limits), three Spline-Hermite of small point N' segmented plain are proposed many Formula interpolation method, experiment can recursion go out N' best-fit value (when ultrasonic system sample rate 100MHz, bandwidth 0.5-15MHz, N'= 7), in operand, precision, the aspect such as real-time can there is greater advantage.

(3) the liter method of sampling that research design combines based on polynomial interopolation, heterogeneous FIR interpolation filtering, adopts interpolation liter Sample multiple γ carries out γ=n_FI decomposition (minimizes n_F, maximize I), n_F(it is close to 1 floating number n_F) a times interpolation passes through segmentation Three the Spline-Hermite polynomial interpolations that slide realize thin interpolation, and I times of interpolation of integer is real by polyphase interpolating filtering Now thick interpolation.Realize any times of interpolation by twice Interpolation of signals pattern and rise sampling, there is considerable flexibility, exploitativeness.

Above-described embodiment filters feature based on polynomial interopolation with polyphase interpolating: polynomial interpolation belongs to time domain and directly inserts Value so that interpolation knot value is constant, has signal locally completeness advantage, easily realizes any times of decimal interpolation, can regard as thin Interpolation；Polyphase interpolating is filtered into frequency domain interpolation, can guarantee that signal spectrum integrity after interpolation, has the excellent of signal overall situation integrity Point, easily realizes any times of integer interpolation, can regard thick interpolation as, by polyphase interpolating technology, carries out many to data after liter sampling Exporting mutually, it is easy to the high speed data processing of FPGA, the liter that can be realized any multiple by thickness interpolative mode is sampled, and alleviates list One, processor performance transition is relied on by single liter sampling algorithm, strengthens algorithm motility, improves ultrasonic phase array with software mode Signal resolution power.

Although the embodiment that disclosed herein is as above, but described content is only to facilitate understand the present invention and adopt Embodiment, be not limited to the present invention.Technical staff in any the technical field of the invention, without departing from this On the premise of spirit and scope disclosed by invention, in form and any amendment and change can be made in details implement, But the scope of patent protection of the present invention, still must be defined in the range of standard with appending claims.

Claims (4)

1. one kind rises sampling ultrasonic phase array signal resolution power raising method the most again, it is characterised in that described method includes:

A rises sampling to different frequency probe echo-signal multiple γ in proportion；

B carries out decimal n to a liter sampling multiple γ_FRemove point with integer I, i.e. γ=n_FI, it is achieved multistage liter is sampled；

C realizes decimal n respectively_FWith I times of interpolation of integer, described decimal n_FTimes interpolation carries out interpolation, described integer I by multinomial Times interpolation is realized by heterogeneous FIR interpolation filtering technology.

2. the sampling ultrasonic phase array signal resolution power that rises the most again as claimed in claim 1 improves method, it is characterised in that institute State step A to specifically include: in ADC sample rate f_sUnder certain condition, for meeting frequency probe multiformity correspondence echo signal sample The multifarious requirement of rate, realizes resampling, different frequency probe f by digital interpolation techniques_pFactor R is entered according to a certain percentage Row sampling, then rise sampling multiple γ=f_p·R/f_sSo that different frequency probe carries out a liter sampling through identical multiple R sample rate, Realize optimization sampling.

3. the sampling ultrasonic phase array signal resolution power that rises the most again as claimed in claim 1 improves method, it is characterised in that institute State step B to specifically include:

The pattern using little several times polynomial interpolation, integral multiple interpolation filtering method to combine carries out interpolation；Arbitrarily rise sampling times Number γ realizes two-stage and rises sampling, sample rate f_sIt is promoted to γ × f_s, its interpolation multiple optimum distribution γ=n_FI, solves decimal NF is respectively as follows: with the formula of integer IMake to minimize decimal n_F, maximize integer I, it is easier to many Item formula interpolation and interpolation filtering, it is achieved multistage liter is sampled.

4. the sampling ultrasonic phase array signal resolution power that rises the most again as claimed in claim 1 improves method, it is characterised in that institute State step C to specifically include:

Described interpolation polynomial carries out interpolation by three Spine-Hermite interpolation algorithms of segmented plain, it may be assumed that insert for N number of Value point, by solving three Spline interpolation polynomials of relatively point N ', travels through all of interpolation point N with sliding-modes, obtains Its discrete derivative, then substitute into Hermite formula for interpolation, try to achieve its interpolation polynomial.