CN104796138A - LC voltage-controlled oscillator with automatic output oscillation amplitude correction function - Google Patents
LC voltage-controlled oscillator with automatic output oscillation amplitude correction function Download PDFInfo
- Publication number
- CN104796138A CN104796138A CN201510193555.7A CN201510193555A CN104796138A CN 104796138 A CN104796138 A CN 104796138A CN 201510193555 A CN201510193555 A CN 201510193555A CN 104796138 A CN104796138 A CN 104796138A
- Authority
- CN
- China
- Prior art keywords
- array
- transistor
- switch
- oscillator
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
The invention relates to an LC voltage-controlled oscillator with an automatic output oscillation amplitude correction function. The LC voltage-controlled oscillator comprises an oscillator core circuit module, a low-pass filtering device, a comparator, a digital automatic amplitude correction module, a biasing circuit module and a switch resistor control word generation module. The oscillator core circuit module comprises a first switch resistor array, an LC resonance network, a variable capacitor array/cross coupling transistor and a second switch resistor array. The biasing circuit module comprises a third switch resistor array and a current programmable control array. The LC voltage-controlled oscillator has the advantages that the switch resistor arrays are substituted for conventional current source arrays, so that influence of noise in circuits on phase noise of the oscillator is reduced; a biasing circuit is used for adjusting the output oscillation amplitude of the oscillator in real time, and an output amplitude detection loop is formed by the low-pass filtering device, the comparator and the digital automatic amplitude correction module; output signal amplitude detection points are selected between a resonance network and the switch resistor arrays, and accordingly, influence of detection loop noise on oscillator output signals is reduced.
Description
Technical field
The present invention relates to field of oscillators, be specifically related to a kind of output voltage swing automatic calibration LC voltage controlled oscillator.
Background technology
Previous voltage controlled oscillator output voltage swing or controlled on a certain particular value by circuit design, or adopt tail current source array to carry out output voltage swing dynamic adjustments.The technology that the former adopts is owing to being subject to the impact of temperature drift, voltage and manufacturing process, relatively large deviation is there is between actual output voltage swing and ideal value, and output voltage swing cannot regulate, phase noise performance that is that finally cause voltage controlled oscillator extreme difference and that cannot optimize; Though the latter adopts current source array to carry out dynamic output voltage swing adjustment, but the noise that tail current source array produces can crossing coupling transistor in voltage controlled oscillator and inductor-capacitor resonant network, together enter in output signal with oscillator signal, the severe exacerbation phase noise of oscillator; Amplitude of oscillation test point is chosen at output signal position simultaneously, makes the noise in testing circuit also enter output signal, has had a strong impact on the quality of oscillator output signal.
Summary of the invention
Object of the present invention is just to provide a kind of output voltage swing automatic calibration LC voltage controlled oscillator, and it can effectively solve the problem, and reduces the impact of detection loop noise on oscillator output signal.
For achieving the above object, the present invention implements by the following technical solutions:
A kind of output voltage swing automatic calibration LC voltage controlled oscillator, is characterized in that: comprise oscillator core circuit module, low pass filter, comparator, digital automatic amplitude correction module, biasing circuit module and switch resistance control word generation module, oscillator core circuit module is by the first switch resistance array sequentially connected in turn, LC resonant network, variable capacitor array/crossing coupling transistor and second switch electric resistance array composition, biasing circuit module controls array by the 3rd switch arrays and current programmable and forms, voltage source VDD divides three tunnels respectively with first, three switch resistance arrays are connected with comparator, connected node between first switch resistance array and LC resonant network accesses the input of low pass filter, digital input signals Din from register divides two-way to be delivered to switch resistance control word generation module respectively and current programmable controls array, switch resistance control word generation module output divides two-way respectively with first, three switch resistance arrays are connected, 3rd switch resistance array and the current programmable connected node controlled between array accesses the input of comparator, the output of low pass filter is connected with the input of comparator, numeral automatic amplitude correction module is connected with second switch electric resistance array, current programmable controls array and switch resistance array all accesses ground VSS.
In technique scheme, adopt the current source array in switch resistance array replacement conventional art, reduce the impact of the noise in circuit on oscillator phase; Meanwhile, adopt the real-time adjustment of biasing circuit realization to oscillator output voltage swing, adopt low pass filter, comparator and digital automatic amplitude correction module to form output amplitude detection loop; Amplitude output signal test point is not chosen at oscillator signal output port, but between resonant network and switch resistance array, reduces the impact of detection loop noise on oscillator output signal.
Accompanying drawing explanation
Fig. 1 is structure principle chart of the present invention;
Fig. 2 is the syndeton schematic diagram between oscillator core circuit module and low pass filter, comparator, digital automatic amplitude correction module;
Fig. 3 is the structure principle chart of biasing circuit module;
Fig. 4 is the circuit theory diagrams of comparator;
Fig. 5 is the algorithm flow chart of digital amplitude automatic calibration module;
Fig. 6 is the circuit realiration schematic diagram of digital amplitude automatic calibration module.
Embodiment
In order to make objects and advantages of the present invention clearly understand, below in conjunction with embodiment, the present invention is specifically described.Should be appreciated that following word only in order to describe one or more concrete execution modes of the present invention, considered critical is not carried out to the protection range that the present invention specifically asks.
The technical scheme that the present invention takes as shown in Figure 1, a kind of output voltage swing automatic calibration LC voltage controlled oscillator, comprises oscillator core circuit module 14, low pass filter 13, comparator 15, digital automatic amplitude correction module 16, biasing circuit module 12 and switch resistance control word generation module 11, oscillator core circuit module 14 is by the first switch resistance array 141 sequentially connected in turn, LC resonant network 143, variable capacitor array/crossing coupling transistor 144 and second switch electric resistance array 142 form, biasing circuit module 12 controls array 122 by the 3rd switch arrays 121 and current programmable and forms, voltage source VDD divides three tunnels respectively with first, three switch resistance arrays are connected with comparator 15, connected node between first switch resistance array 141 and LC resonant network 143 accesses the input of low pass filter 13, digital input signals Din from register divides two-way to be delivered to switch resistance control word generation module 11 respectively and current programmable controls array 122, switch resistance control word generation module 11 output divides two-way respectively with first, three switch resistance arrays are connected, 3rd switch resistance array and the current programmable connected node controlled between array 122 accesses the input of comparator 15, the output of low pass filter 13 is connected with the input of comparator 15, numeral automatic amplitude correction module 16 is connected with second switch electric resistance array 142, current programmable controls array 122 and switch resistance array all accesses ground VSS.
Improvements of the present invention are that oscillator output voltage swing cor-rection loop is by oscillator core circuit module 14, low pass filter 13, comparator 15, digital automatic amplitude correction module 16, and biasing circuit module 12 forms; Din is the digital input signals from register; First switch resistance array 141, LC resonant network 143 (inductor-capacitor resonant network), variable capacitor array/crossing coupling transistor 144 and second switch electric resistance array 142 form the core circuit module of oscillator; 3rd switch resistance array and current programmable control the biasing circuit that array 122 forms oscillator; Supply voltage VDD divides three tunnels connect the first switch resistance array 141, the 3rd switch resistance array respectively and provide supply voltage for comparator 15; First switch resistance array 141 and the 3rd switch resistance array have identical circuit structure and device size, and meanwhile, its 6 control bits are also identical, are d [5:0]; LC resonant network 143 determines the vibration fundamental frequency into whole oscillator, and is connected in the bottom of the first switch resistance array 141; Variable capacitor array/crossing coupling transistor 144 is connected with the bottom of LC resonant network 143, is connected with the top of second switch electric resistance array 142, for oscillator provides negative transconductance, and its frequency of oscillation tuning; Access ground, the bottom VSS of second switch electric resistance array 142; The bottom access low pass filter 13 of the first switch resistance array 141, carries out filtering to amplitude information, and produces amplitude detection signal Vt; Bottom and the current programmable of the 3rd switch resistance array control array 122 and are connected, and produce bias voltage Vbias; Current programmable controls the other end access ground VSS of array 122; The voltage Vbias that the output voltage Vt of low pass filter 13 and biasing circuit produce enters comparator 15 simultaneously and compares, gained numeral comparison value enters digital automatic amplitude correction module 16, the 6 bit digital control word S [5:0] produced send into second switch electric resistance array 142, regulate its equivalent resistance; 3 input signal Din from register send into switch resistance control word generation module 11, produce 6 bit digital control word d [5:0] and carry out equivalent resistance adjustment to the first switch resistance array 141 and the 3rd switch resistance array; Identical digital signal D [2:0] also sends into current programmable control array 122 and regulates its current value equivalence value simultaneously; By with upper type, the electric current in the electric current of oscillator core circuit module 14 and biasing circuit is consistent, thus realizes the automatic calibration to output voltage swing.
Detailed scheme is:
Fig. 2 is voltage controlled oscillator core electrocardio road and digital amplitude control loop structure principle chart, and Vin is the output voltage signal from charge pump, D
ftfor the frequency tuning digital signal from register, Voutput+ and Voutput-is respectively the positive and negative output of voltage controlled oscillator, the bias voltage that Vbias produces for biasing module in Fig. 1; Voltage source VDD divides 6 tunnels to be connected with the source electrode of switching transistor M1, M2, M3, M4, M5, M6 respectively; The grid of transistor M1, M2, M3, M4, M5, M6 is controlled by each digit order number d [0], the d [1] of digital signal d [5:0], d [2], d [3], d [4], d [5] respectively, one end of its drain electrode contact resistance array R1, R2, R3, R4, R5, R6 respectively; The other end short circuit of electric resistance array R1, R2, R3, R4, R5, R6, and connect the source electrode of crossing coupling transistor M7, M8, and this short circuit node A is as the output voltage swing test point of oscillator, this node voltage signal enters the low pass filter 13 be made up of R13 and electric capacity C3, and produces output test voltage Vt; The grid of transistor M7 connects the drain electrode of transistor M8, and drain electrode connects the grid of transistor M8; The grid of transistor M8 connects the drain electrode of transistor M7, and drain electrode connects the grid of transistor M7; LC resonant network 143 is composed in parallel by inductance L and variable capacitor array, its one end connects the positive output end Voutput+ of the drain electrode of transistor M7, the grid of M8, basic one end of variable capacitance C1, the drain electrode of transistor M9 and oscillator, and the other end connects the negative output terminal Voutput-of the drain electrode of transistor M8, the grid of M7, basic one end of variable capacitance C2, the drain electrode of transistor M10 and oscillator; The grid of transistor M9 connects the drain electrode of transistor M10, and drain electrode connects the grid of transistor M10; The shorted on one end of electric resistance array R7, R8, R9, R10, R11, R12, and connect the source electrode of transistor M9 and M10, the other end is connected with one end of switch S [0], S [1], S [2], S [3], S [4], S [5] respectively, the other end short circuit also access ground VSS of switch arrays; Voltage Vt inputs from the positive pole of comparator 15, and bias voltage Vbias, from the input of comparator 15 negative pole, compares through comparator 15, output digit signals Dcomp, sends into digital automatic amplitude correction module 16; It is digital amplitude control word that numeral automatic amplitude correction module 16 produces 6 according to the signal of Dcomp, the state of control switch S [0], S [1], S [2], S [3], S [4], S [5] respectively.
Fig. 3 is bias circuit construction schematic diagram, and biasing circuit controls array 122 by the 3rd switch resistance array and current programmable and forms; Supply voltage VDD divides 6 tunnels to be connected with the source electrode of transistor M11, M12, M13, M14, M15, M16 respectively, the grid of transistor M11, M12, M13, M14, M15, M16 is controlled by the d [5] in digital control word d [5:0], d [4], d [3], d [2], d [1], d [0] respectively, and this digital control word d [5:0] is identical with the digital control word d [5:0] in Fig. 2; One end of drain electrode difference contact resistance array R14, R15, R16, R17, R18, R19 of transistor array M11, M12, M13, M14, M15, M16, other end short circuit, and connect output port Vbias; The drain electrode of transistor M17, M18, M19, M20 is shorted together, and connects in output port Vbias; The source electrode of transistor M17, M18, M19, M20 is connected with the input of current source I1, I2, I3 and I4 respectively, and grid is respectively by control signal D [3], the D [2], D [1] and D [0] control that come from register; The other end of current source array accesses ground respectively.
Fig. 4 is the circuit theory diagrams of comparator 15, and Vt is the output voltage of test point A after low pass filter 13 in Fig. 2, is connected to the grid of transistor M21; Vbias is the output voltage of biasing circuit in Fig. 3, is connected to the grid of transistor M22, and the bias voltage that Vbias1 and Vbias2 provides for external circuit is connected to the grid of transistor M32 and M29 respectively; Dcomp is the output voltage of comparator 15; Supply voltage VDD divides 6 tunnels one end of contact resistance R20, R21 and the source electrode of transistor M23, M24, M25, M26 respectively; The resistance R20 other end connects the drain electrode of transistor M21 and the grid of transistor M27, and the resistance R21 other end connects the drain electrode of transistor M22 and the grid of transistor M28; The source shorted of transistor M21 and M22, and the drain electrode connecting transistor M32, the source electrode access ground VSS of transistor M32; Grid and the drain electrode short circuit of transistor M24, and be connected to the grid of transistor M23 and the drain electrode of transistor M27; Grid and the drain electrode short circuit of transistor M25, and be connected to the grid of transistor M26 and the drain electrode of transistor M28; The source shorted of transistor M27 and M28 is also connected to the drain electrode of transistor M29, the source electrode access ground VSS of transistor M29; The drain electrode of transistor M30 and grid short circuit, and connect the drain electrode of transistor M23 and the grid of M31 respectively, the drain electrode of transistor M26 and the drain electrode short circuit of M31, and connect output Dcomp; The source electrode of transistor M30 and M31 all accesses ground VSS.
Fig. 5 is the algorithm flow chart of digital amplitude automatic calibration module, 6 position digital signal d [5:0] produced through switch resistance control word generation module 11 by the digital signal Din coming from register, and S [5:0] is produced by digital amplitude automatic calibration module 7, its initial value is set as " 001000 "; First judge whether the output signal Dcomp of comparator 15 in Fig. 1 is 1, if 1, then judge whether S [5:0] is " 1 " entirely, namely overflows; If S [5:0] overflows, then storing and export S [5:0], if do not overflowed, then making S [5:0] carry out binary system after add-one operation, again judging whether Dcomp is 1; When Dcomp is not 1, makes S [5:0] carry out binary system from subtracting 1 computing, then judge the value of Dcomp, and circulate with this until when Dcomp is 1, store and export S [5:0];
Figure 6 shows that the circuit realiration schematic diagram of digital amplitude automatic calibration module, RESET is that register resets reset terminal, the constant digital signal that DCONST provides for external circuit, in the present invention, its value is " 111111 ", Dcomp is the digital output signal value of comparator in Fig. 2, the cycle control signal that RST provides for external circuit, OUTPUT is automatic amplitude automatic calibration module output signal.The initial value of S [5:0] is stored in register, in the present invention, its value is " 001000 ", register output signal S [5:0] point of three tunnels enter digital comparator respectively, digital adder and digital subtractor, the S [5:0] entering digital comparator compares with DCONST signal, output signal the control end as two-way selector MUX1, the signal S [5:0] entering digital adder carries out add operation with digital value " 1 ", its output connects one end of two-way selector MUX1, when the control end of MUX1 is " 0 ", MUX1 exports the value of S [5:0], when the control end of MUX1 is " 1 ", MUX1 exports S [5:0] and certainly adds the value after 1, the S [5:0] entering digital subtractor carries out subtraction with digital value " 1 ", its output signal enters one end of two-way selector MUX2, two inputs that Dcomp signal and digital constant value " 1 " enter NAND gate NAND respectively carry out asking NAND operation, the output of NAND gate NAND connects the input of inverter INV, the output of inverter INV connects the control end of two-way selector MUX2, the output signal of two-way selector MUX1 connects one end of two-way selector MUX2, when the control end of MUX2 is " 0 ", MUX1 exports the output signal value of two-way selector MUX1, when the control end of MUX1 is " 1 ", MUX1 exports the output signal value of digital subtractor, the output of two-way selector MUX2 connects the input of d type flip flop, d type flip flop carries out periodicity to signal and stores under the control of RST, its output signal is as the output signal of whole module, connect the input of register simultaneously, as the initial value of subsequent time S [5:0].
In a word, the present invention effectively can reduce the impact of detection loop noise on oscillator output signal, and the noise in reduction circuit is on the impact of oscillator phase.
The above is only the preferred embodiment of the present invention; should be understood that; for those skilled in the art; to know in the present invention after contents; under the premise without departing from the principles of the invention; can also make some equal conversion to it and substitute, these convert on an equal basis and substitute and also should be considered as belonging to protection scope of the present invention.
Claims (3)
1. an output voltage swing automatic calibration LC voltage controlled oscillator, is characterized in that: comprise oscillator core circuit module, low pass filter, comparator, digital automatic amplitude correction module, biasing circuit module and switch resistance control word generation module, oscillator core circuit module is by the first switch resistance array sequentially connected in turn, LC resonant network, variable capacitor array/crossing coupling transistor and second switch electric resistance array composition, biasing circuit module controls array by the 3rd switch arrays and current programmable and forms, voltage source VDD divides three tunnels respectively with first, three switch resistance arrays are connected with comparator, connected node between first switch resistance array and LC resonant network accesses the input of low pass filter, digital input signals Din from register divides two-way to be delivered to switch resistance control word generation module respectively and current programmable controls array, switch resistance control word generation module output divides two-way respectively with first, three switch resistance arrays are connected, 3rd switch resistance array and the current programmable connected node controlled between array accesses the input of comparator, the output of low pass filter is connected with the input of comparator, numeral automatic amplitude correction module is connected with second switch electric resistance array, current programmable controls array and switch resistance array all accesses ground VSS.
2. output voltage swing automatic calibration LC voltage controlled oscillator according to claim 1, is characterized in that: first and third switch resistance array is identical.
3. output voltage swing automatic calibration LC voltage controlled oscillator according to claim 1 and 2, it is characterized in that: the 3rd switch resistance array comprises transistor M11, M12, M13, M14, M15, M16, supply voltage VDD divide 6 tunnels respectively with transistor M11, M12, M13, M14, M15, the source electrode of M16 connects, transistor M11, M12, M13, M14, M15, the grid of M16 is respectively by from the control signal d [5] in the digital control word d [5:0] of switch resistance control word generation module, d [4], d [3], d [2], d [1], d [0] controls, transistor M11, M12, M13, M14, M15, the drain electrode contact resistance R14 respectively of M16, R15, R16, R17, R18, one end of R19, resistance R14, R15, R16, R17, R18, the other end short circuit of R19 also connects output port Vbias, current programmable controls array and comprises transistor M17, M18, M19, M20, and the drain electrode of transistor M17, M18, M19, M20 is shorted together and connects with output port Vbias, the source electrode of transistor M17, M18, M19, M20 is connected with the input of current source I1, I2, I3 and I4 respectively, the grid of transistor M17, M18, M19, M20 is respectively by control signal D [3], the D [2], D [1] and D [0] control that come from register, and the other end of current source I1, I2, I3 and I4 accesses ground respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510193555.7A CN104796138B (en) | 2015-04-22 | 2015-04-22 | A kind of output voltage swing corrects LC voltage controlled oscillators automatically |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510193555.7A CN104796138B (en) | 2015-04-22 | 2015-04-22 | A kind of output voltage swing corrects LC voltage controlled oscillators automatically |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104796138A true CN104796138A (en) | 2015-07-22 |
| CN104796138B CN104796138B (en) | 2017-12-26 |
Family
ID=53560694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510193555.7A Expired - Fee Related CN104796138B (en) | 2015-04-22 | 2015-04-22 | A kind of output voltage swing corrects LC voltage controlled oscillators automatically |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104796138B (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106100636A (en) * | 2016-06-06 | 2016-11-09 | 东南大学 | Based on MEMS wideband phase detector and the frequency divider of thermo-compensator |
| CN106374838A (en) * | 2016-08-25 | 2017-02-01 | 电子科技大学 | LC oscillator having automatic amplitude control function and used for FW-UWB transmitter |
| WO2017166048A1 (en) * | 2016-03-29 | 2017-10-05 | 武汉芯泰科技有限公司 | Broadband voltage controlled oscillator and frequency synthesizer |
| CN107800387A (en) * | 2017-09-11 | 2018-03-13 | 西安电子科技大学 | A kind of amplitude control circuit and LC voltage controlled oscillator circuit |
| CN108649902A (en) * | 2018-05-14 | 2018-10-12 | 成都聚利中宇科技有限公司 | A kind of temperature-compensating voltage controlled oscillator and compensation method |
| WO2019183943A1 (en) * | 2018-03-30 | 2019-10-03 | 华为技术有限公司 | Automatic amplitude control device and method |
| CN111917396A (en) * | 2019-05-09 | 2020-11-10 | 复旦大学 | Broadband low-power-consumption oscillator device with self-adaptive voltage bias |
| CN112468143A (en) * | 2020-11-30 | 2021-03-09 | 武汉大学 | Fractional frequency division frequency synthesizer capable of controlling loop bandwidth |
| CN112615621A (en) * | 2020-12-24 | 2021-04-06 | 长沙理工大学 | Constant-amplitude voltage-controlled oscillator using resistor array |
| CN112882529A (en) * | 2020-12-31 | 2021-06-01 | 广州润芯信息技术有限公司 | Swing amplitude detection circuit with DC offset elimination |
| CN115840123A (en) * | 2023-03-01 | 2023-03-24 | 佛山市联动科技股份有限公司 | Transistor parameter testing device and testing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202406087U (en) * | 2011-12-16 | 2012-08-29 | 武汉大学 | High-precision LC orthogonal voltage-controlled oscillator device |
| CN203368442U (en) * | 2013-06-18 | 2013-12-25 | 安凯(广州)微电子技术有限公司 | Low-power high-precision LC voltage-controlled oscillator |
| US20150002237A1 (en) * | 2013-01-04 | 2015-01-01 | International Business Machines Corporation | Design structure for an inductor-capacitor voltage-controlled oscillator |
-
2015
- 2015-04-22 CN CN201510193555.7A patent/CN104796138B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202406087U (en) * | 2011-12-16 | 2012-08-29 | 武汉大学 | High-precision LC orthogonal voltage-controlled oscillator device |
| US20150002237A1 (en) * | 2013-01-04 | 2015-01-01 | International Business Machines Corporation | Design structure for an inductor-capacitor voltage-controlled oscillator |
| CN203368442U (en) * | 2013-06-18 | 2013-12-25 | 安凯(广州)微电子技术有限公司 | Low-power high-precision LC voltage-controlled oscillator |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017166048A1 (en) * | 2016-03-29 | 2017-10-05 | 武汉芯泰科技有限公司 | Broadband voltage controlled oscillator and frequency synthesizer |
| CN106100636A (en) * | 2016-06-06 | 2016-11-09 | 东南大学 | Based on MEMS wideband phase detector and the frequency divider of thermo-compensator |
| CN106100636B (en) * | 2016-06-06 | 2018-10-23 | 东南大学 | Frequency divider based on MEMS wideband phases detector and thermo-compensator |
| CN106374838A (en) * | 2016-08-25 | 2017-02-01 | 电子科技大学 | LC oscillator having automatic amplitude control function and used for FW-UWB transmitter |
| CN107800387A (en) * | 2017-09-11 | 2018-03-13 | 西安电子科技大学 | A kind of amplitude control circuit and LC voltage controlled oscillator circuit |
| CN107800387B (en) * | 2017-09-11 | 2020-11-10 | 西安电子科技大学 | Amplitude control circuit and inductance-capacitance voltage-controlled oscillator circuit |
| WO2019183943A1 (en) * | 2018-03-30 | 2019-10-03 | 华为技术有限公司 | Automatic amplitude control device and method |
| CN111566937A (en) * | 2018-03-30 | 2020-08-21 | 华为技术有限公司 | Automatic amplitude control device and method |
| CN108649902A (en) * | 2018-05-14 | 2018-10-12 | 成都聚利中宇科技有限公司 | A kind of temperature-compensating voltage controlled oscillator and compensation method |
| CN108649902B (en) * | 2018-05-14 | 2024-01-23 | 成都中宇微芯科技有限公司 | Temperature compensation voltage-controlled oscillator and compensation method |
| CN111917396A (en) * | 2019-05-09 | 2020-11-10 | 复旦大学 | Broadband low-power-consumption oscillator device with self-adaptive voltage bias |
| CN112468143A (en) * | 2020-11-30 | 2021-03-09 | 武汉大学 | Fractional frequency division frequency synthesizer capable of controlling loop bandwidth |
| CN112615621A (en) * | 2020-12-24 | 2021-04-06 | 长沙理工大学 | Constant-amplitude voltage-controlled oscillator using resistor array |
| CN112882529A (en) * | 2020-12-31 | 2021-06-01 | 广州润芯信息技术有限公司 | Swing amplitude detection circuit with DC offset elimination |
| CN115840123A (en) * | 2023-03-01 | 2023-03-24 | 佛山市联动科技股份有限公司 | Transistor parameter testing device and testing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104796138B (en) | 2017-12-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104796138A (en) | LC voltage-controlled oscillator with automatic output oscillation amplitude correction function | |
| US8294528B2 (en) | Wideband multi-mode VCO | |
| CN104202048B (en) | Broadband totally-integrated phase-locked loop frequency synthesizer | |
| CN105978560A (en) | Programmable voltage-controlled oscillator | |
| CN102983836B (en) | Active RC filter automatic frequency tuning circuit | |
| CN102332915A (en) | Subharmonic injection and locking voltage-controlled oscillator with wide locking range | |
| CN102045041A (en) | Resistance-capacitance (RC) oscillator and realization method thereof | |
| CN101222214A (en) | Apparatus and method for tuning a band pass filter | |
| CN103166573A (en) | Voltage-controlled oscillator | |
| CN106301284A (en) | A kind of adjustable filter circuit of bandwidth based on memristor and operational approach thereof | |
| CN108494397A (en) | A kind of voltage-controlled oscillator circuit and phaselocked loop | |
| CN105048996A (en) | Mode-mixing low-pass filter with cut-off frequency self-correction | |
| CN110350870B (en) | Class-F2 voltage-controlled oscillator | |
| CN100511968C (en) | Voltage controlled oscillator | |
| CN204928798U (en) | Developments are filled discharge current and are matchd charge pump circuit | |
| CN104202014B (en) | Digital tuning circuit for RC (resistor-capacitor) filter | |
| CN206294138U (en) | A kind of 50Hz symmetrical complements time base circuit chip | |
| CN100492923C (en) | Image inhibiting filtering device capable of compensating LC network loss | |
| CN116317954A (en) | Voltage controlled oscillator with wide tuning range and low phase noise | |
| CN107294513A (en) | Crystal-oscillator circuit | |
| CN103887966A (en) | Charge pump implementation circuit | |
| CN104796139A (en) | Quick frequency stabilization voltage-controlled oscillator | |
| CN206481287U (en) | Charge pump circuit and phaselocked loop | |
| CN202153721U (en) | Relaxation oscillation clock circuit having high-precision oscillation frequency | |
| CN103607173B (en) | A kind of voltage controlled oscillator of variable voltage-controlled sensitivity |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| EXSB | Decision made by sipo to initiate substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171226 Termination date: 20180422 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |