CN104733300B - A kind of thining method of bonding wafer - Google Patents
A kind of thining method of bonding wafer Download PDFInfo
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- CN104733300B CN104733300B CN201310717819.5A CN201310717819A CN104733300B CN 104733300 B CN104733300 B CN 104733300B CN 201310717819 A CN201310717819 A CN 201310717819A CN 104733300 B CN104733300 B CN 104733300B
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Abstract
The present invention provides a kind of thining method of bonding wafer, before device wafer is thinned, is first ground to its edge using emery wheel, to remove its curved edge.It is handled using emery wheel para-linkage chip before thinning process in the present invention, the edge of device wafer arc is ground off, this just effectively prevents wedge angle occur in bonding wafer thinning process, and then the generation of device wafer edge break problem is prevented, it can be under the premise of ensureing that device wafer edge does not rupture, 50 μm are thinned to hereinafter, to meet the needs of follow-up preparation process, ensures the performance with latter made semiconductor devices.Compared with existing reduction process, the present invention will not cause any pollution to board and subsequent technique is thinned, and used equipment is simple, and easily operated, process is succinct, substantially increases production efficiency, reduces production cost and equipment cost.
Description
Technical field
The present invention relates to a kind of semiconductor fabrication process, more particularly to a kind of thining method of bonding wafer.
Background technology
As integrated circuit is higher and higher to the ultrathin requirement of chip, in addition in many field of semiconductor manufacture, example
Such as smart card (Smart Card), MEMS (MEMS), LED chip, cmos image sensing chip (CIS), photovoltaic cell
(photovoltaic cells), crystal grain (stacked die) and multi-chip package (Multi chip package) etc. are stacked
All it is ultra-thin chip (chip thickness is less than 50 μm), but these ultra-thin chips cannot be obtained from ultra thin wafer manufacturing process, and
It is the chip obtained by conventional die manufacturing process, is realized by reduction process.Therefore, wafer thinning process is in integrated electricity
Increasingly consequence is seized of in the manufacturing process of road.
Referring to Fig.1 shown in a-1b, to the sectional view for having each step in most common wafer thinning process flow.Such as
Shown in Fig. 1 a, it will wait for that thinned wafer 12 is fixed on processing chip 11 by techniques such as gluings；As shown in Figure 1 b, it treats and crystalline substance is thinned
Piece 12 is ground polishing.But it is limited using the size that device wafer is thinned the technique, when being thinned to 100 μm or less
When, wait for that the fringe region of thinned wafer just will appear fracture phenomena.Since chip is usually crystal, when the edge of chip is broken
When splitting, crackle can gradually extend along crystal orientation, may finally lead to the fracture of entire chip.It is good in order to make semiconductor devices have
Good performance then cannot achieve when thinned wafer targets thickness is less than 100 μm using the method for the technology.
In order to which by wafer grinding to smaller target thickness, to being improved in above-mentioned original technique, Fig. 2 a-2c are shown
The sectional view of each step in its flow of improved wafer thinning process.Its relative to above-mentioned wafer thinning process improvement it
Be in：Will be after thinned wafer 22 be fixed on processing chip 21, the filling adhesive material 23 in the gap of its corner, so
Thinned wafer 22 is treated again afterwards to be thinned.Although the technique avoids the rupture of Waffer edge to a certain extent, not
The generation of the problem can fundamentally be prevented.Moreover, because the corner in bonding wafer is filled with organic binder, once chip
Edge break is inherently polluted to board and subsequent technique is thinned.
In the Chinese patent application application No. is CN200910197079, it has also been found that a kind of wafer thinning process phase
The technical solution of pass.Fig. 3 a-3c show the sectional view of each step in wafer thinning process flow described in the technical solution.Such as
Shown in Fig. 3 a, provides and waits for thinned wafer 31,；As shown in Figure 3b, treat thinned wafer 31 be ground it is thinned, until stopping thick
Degree；As shown in Figure 3c, thinned wafer 31 is treated by the spray nozzle of wet-method etching equipment 32 and carries out spraying corrosion thinning, until pre-
Determine thickness thinning.By above-mentioned two steps wafer thinning process, the chip for meeting thickness requirement can be obtained.However, in the technology
Following Railway Project is still had in scheme：1. due to the use of wet-etching technology has been arrived, erosion will be pre-set in the wafer
Stop-layer is carved, the chip using substrate high-concentration dopant is thus needed, to make the cost of chip increase；2. due to the use of wet
Method etching technics, this just needs the special wet etching machine bench of higher operating costs, to also increase equipment cost；It compares
In grinding, chemical mechanical milling tech, the film layer of same thickness is removed, the process time needed for wet-etching technology is longer, by
This makes production efficiency reduce, and improves production cost.
In summary it is found that above-mentioned existing several reduction process methods all have corresponding and defect, therefore, it is necessary to
A kind of highly efficient easily thining method, to solve problems of the prior art.
Invention content
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of thinned sides of bonding wafer
Method uses routine wafer reduction process to make the edge break occurred after wafer grinding to certain thickness in the prior art for solving
The problem of, and it is corresponding improve in reduction process using caused by the coated with adhesive material between bonding wafer to machine is thinned
Platform, subsequent technique pollution and using wet etching to chip carry out second be thinned caused by production efficiency reduce, be produced into
The problem of this and equipment cost increase.
In order to achieve the above objects and other related objects, the present invention provides a kind of thining method of bonding wafer, the side
Method includes at least：
1）One slide glass and device wafer are provided；The slide glass and device wafer are bonded, bonding wafer is formed；
2）The device wafer in the bonding wafer is cut or is ground using emery wheel, to remove its curved edge；
3）The device wafer of the removal curved edge is thinned to required size.
Optionally, the slide glass and device wafer bonding pattern be metal bonding, stick together bonding, anode linkage, low temperature it is total
Crystalline substance bonding, glass paste are bonded one kind in several bonding patterns.
Optionally, the slide glass is chip or glass.
Step 2）In, it is described that device wafer is cut or is ground using emery wheel, it at least includes the following steps：
a）Bonding wafer, in chuck surface, is rotated, and device wafer is located on slide glass by vacuum suction with certain speed
Side；
b）Emery wheel is vertically fixed in drive shaft, is rotated with certain speed；
c）The polishing width of emery wheel position, the cutting of setting emery wheel or grinding device Waffer edge is adjusted, emery wheel edge is set
The device wafer edge of polishing width from top to bottom para-linkage chip carry out cutting until removing its curved edge；Or adjustment
Emery wheel position, the grinding depth of setting emery wheel grinding device Waffer edge, emery wheel are right from outside to inside along the grinding depth set
The device wafer edge of bonding wafer carries out grinding until removing its curved edge.
Optionally, the required polishing width of the emery wheel grinding device Waffer edge of setting is less than or equal to 5mm, is more highly preferred to
Ground, the range of required polishing width is between 1mm between 5mm.
Optionally, emery wheel is ground from device wafer to slide glass, until being milled to the contact surface edge of device wafer and slide glass.
Optionally, the cutting or grinding carried out using the device wafer of emery wheel para-linkage chip is by once cutting or grinding
Cutting method or repeatedly cutting or method for grinding are realized.
Optionally, the device wafer of the removal curved edge is thinned using grinding and polishing method.
Optionally, to it is described removal curved edge device wafer carry out thinned size be less than or equal to 50 μm, it is more excellent
Selection of land, thinned size range is between 5 μm to 50 μm.
As described above, the thining method of the bonding wafer of the present invention, has the advantages that：In thinned work in the present invention
It is handled using emery wheel para-linkage chip before sequence, has ground off the edge of device wafer arc, this just effectively prevents key
There is wedge angle in synthetic piece thinning process, and then prevented the generation of device wafer edge break problem, can ensure device
Under the premise of Waffer edge does not rupture, 50 μm are thinned to hereinafter, to meet the needs of follow-up preparation process, ensures then system
The performance of the semiconductor devices of work.Meanwhile compared with existing reduction process, the present invention will not make to board and subsequent technique is thinned
At any pollution, and used equipment is simple, and easily operated, process is succinct, substantially increases production efficiency, reduces production
Cost and equipment cost.
Description of the drawings
Fig. 1 a-1b are shown as the structural schematic diagram of each step in a kind of wafer thinning process flow in the prior art.
Fig. 2 a-2c are shown as the structural schematic diagram of each step in another wafer thinning process flow in the prior art.
Fig. 3 a-3c are shown as the structural schematic diagram of each step in another wafer thinning process flow in the prior art.
Fig. 4 is shown as the flow chart of the thining method of the bonding wafer of the present invention.
Fig. 5 a-5d are shown as the structural schematic diagram of the thining method of bonding wafer of the present invention in each step.
Component label instructions
11,21 processing chip
12,22,31 thinned wafer is waited for
23 binder materials
32 spray nozzles
41 slide glasses
42 device wafers
411 slide glasses and Device wafer contact face
Slide glass and Device wafer contact face in 421 another cases
43 emery wheels
d1The width at device wafer edge to bonding wafer contact surface edge
d2The size that slide glass is ground
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this specification below by way of specific specific example
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
Please refer to Fig. 4 to Fig. 5 d.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, though package count when only display is with related component in the present invention rather than according to actual implementation in schema
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can be a kind of random change, and its
Assembly layout kenel may also be increasingly complex.
As shown in Fig. 4 to Fig. 5 d, the present invention provides the thining method of bonding wafer, and the method includes at least：
1）One slide glass 41 and device wafer 42 are provided；The slide glass 41 and device wafer 42 are bonded, bonding is formed
Chip；
2）The device wafer 42 is cut or is ground using emery wheel 43, to remove its curved edge；
3）The device wafer 42 of the removal curved edge is thinned to required size.
Specifically, in step 1）In, the S1 steps and Fig. 5 a of Fig. 4 are please referred to, a slide glass 41 and device wafer 42 are provided；It will
The slide glass 41 and device wafer 42 are bonded, and bonding wafer is formed.In the present embodiment, the device wafer is located at the load
The top of piece 41, it is well known that existing device wafer and slide edge are arc,（I.e. edge thickness is less than interior thickness, from
And form arc at edge）, a contact surface 411 can be formed after the slide glass 41 and the bonding of device wafer 42, due to 41 He of slide glass
Device wafer 42 is that edge thickness is less than interior thickness, so 42 shape of the slide glass 41 at the contact surface edge and device wafer
At slit, the slit cross section is substantially " V " shaped.
In the present embodiment, device wafer 42 can be any one in following material：On silicon, insulator be laminated silicon, absolutely
Silicon, germanium on insulator SiClx on edge body, stacking SiGe etc. on germanium on insulator and insulator.Although being not shown in Fig. 5 a,
But it generally continues to form MEMS device and/or cmos device etc. on device wafer 42.Wherein MEMS device can be not prepare
The device architecture of completion or complete device, cmos device are, for example, transistor（For example, NMOS and/or PMOS）Deng.In addition,
Can also include on device wafer 42 and the relevant circuit of transistor, such as interconnection layer and interlayer dielectric layer etc..
In the present embodiment, the slide glass 41 is for carrying device wafer 42, to prevent subsequent be thinned etc. in technical process
It is damaged due to the thinner thickness of device wafer 42.Slide glass 41 can be arbitrary chip or glass.The material of slide glass 41 can be
At least one of material being previously mentioned below：Silicon, silicon-on-insulator, stacking silicon on insulator, germanium is laminated on insulator in glass
SiClx, germanium on insulator SiClx and germanium on insulator etc..The material of slide glass 41 and device wafer 42 can be identical, can not also
Together.Although slide glass 41 shown in Fig. 5 a is of the same size with device wafer 42, slide glass 41 and device wafer 42
It can be of different sizes.When slide glass 41 and 42 size of device wafer be not it is preferred that the size of device wafer 42（Directly
Diameter）Less than the size of slide glass 41（Diameter）.Such as shown in Fig. 5 b.Equally in this embodiment, the device wafer 42 is located at institute
41 top of slide glass is stated, the slide glass 41 and device wafer 42 can also form a contact surface 421 after being bonded.Due to slide glass 41 and device
Chip 42 is that edge thickness is less than interior thickness, the contact surface edge occur as soon as slide glass 41 and device wafer 42 formed it is narrow
Seam.In the embodiment, subsequent processing and reduction process after the slide glass 41 and the bonding of device wafer 42 ' and institute in the invention are detailed
State identical in example, specific implementation step can refer to described below.
In the present embodiment, the bonding method of slide glass 41 and device wafer 42 can be used at present or be likely to occur
One kind in a variety of bonding patterns, such as metal bonding, stick together bonding, anode linkage, low temperature eutectic bonding, glass paste bonding
Deng.As an example, device wafer 42 is adhered on the surface of slide glass 41.
In step 2）In, the S2 steps and Fig. 5 c of Fig. 4 are please referred to, the device wafer 42 is cut using emery wheel 43
Or grinding, to remove its curved edge.When slide glass 41 and known dimensions（Diameter）Device wafer 42 be bonded after, due to slide glass 41
It is that edge thickness is less than interior thickness with device wafer 42（It is thinner more to arrive edge）, so slit between the two connects from it
The most edge of contacting surface starts to become larger, and in the present embodiment, determines after device wafer 42 that is, determines the arc-shaped side for needing to be ground
Edge（I.e. from slit minimum, i.e. the edge of contact surface starts to cut）.
Specifically, carrying out edge grind to device wafer 42 using emery wheel 43, at least include the following steps：
a）Bonding wafer is by vacuum suction in chuck（It is not shown）Surface is rotated with certain speed, and device wafer 42
Above slide glass 41；
b）Emery wheel 43 is vertically fixed on drive shaft（It is not shown）On, it is rotated with certain speed；
c）Adjust 43 position of emery wheel, the polishing width at 42 edge of the cutting of setting emery wheel 43 or grinding device wafer, emery wheel 43
Along the polishing width set, from top to bottom 42 edge of device wafer of para-linkage chip cut up to removing its arc-shaped side
Edge；Or adjustment emery wheel 43 position, the grinding depth at 42 edge of the cutting of setting emery wheel 43 or grinding device wafer, emery wheel 43 is along setting
42 edge of device wafer of para-linkage chip be ground up to removing its curved edge the grinding depth set from outside to inside.
In the present embodiment, the material of emery wheel 43 can be used in current semicon industry or following may use
Any one of emery wheel material, as an example, the material of emery wheel 43 is preferably diamond in the present invention.
In the present embodiment, chuck（It is not shown）For installing and fixing bonding wafer, and it is allowed to rotate with it.Chuck
It can be vacuum chuck or electrostatic chuck, and rotation has been driven by motor.
In the present embodiment, the rotation direction of emery wheel 43 and bonding wafer all has adjustability, and the two can be with identical side
To rotation, can also rotate in a reverse direction.
In the present embodiment, emery wheel needs the polishing width set that can be determined according to the oblique angle size of device wafer 42,
To the distance d of the outer of device wafer 42 i.e. at the slit minimum of bonding wafer1.Not according to device wafer size and type
Together, the required polishing width at 42 edge of the grinding device wafer of emery wheel 43. of setting is less than or equal to 5mm, it is further preferable that required mill
Width range is cut between 1mm between 5mm.
Specifically, emery wheel 43 is ground from device wafer 42 to slide glass 41, until being milled to connecing for device wafer 42 and slide glass 41
Contacting surface 411；Preferably, emery wheel 43 continues to be ground to slide glass 41 after being ground to contact surface 411, until slide glass 41 is ground away centainly
Size d2；It is further preferable that the size d that slide glass 41 is ground2It it is 20 μm to 30 μm or so, to ensure the arc of device wafer
Shape edge is entirely removed.
It should be pointed out that should be not limited only to using the method that emery wheel 43 is cut or is ground to the device wafer 42
Step c）The method of the primary cutting or grinding can also include the method for following several multiple cuttings or grinding：（1）Adjustment
43 position of emery wheel first sets a polishing width, device of the emery wheel 43 along the polishing width set from top to bottom para-linkage chip
42 edge of part chip is ground, until being ground to required depth；43 position of emery wheel is adjusted, a polishing width is reset, is ground
Wheel 43 is ground along 42 edge of device wafer of the polishing width that sets from top to bottom para-linkage chip, until being ground to phase
Same depth；Above-mentioned action is repeated, until being milled to the contact surface 411 of device wafer 42 and slide glass 41.（2）43 position of emery wheel is adjusted,
A polishing width is first set, emery wheel 43 is along 42 edge of device wafer of the polishing width set from top to bottom para-linkage chip
It is ground, is ground to certain depth；43 position of emery wheel is adjusted, resets a polishing width, emery wheel 43 is along the mill set
42 edge of device wafer for cutting width from top to bottom para-linkage chip is ground, until being ground to same depth；It repeats above-mentioned
Action, until being milled to the contact surface 411 of device wafer 42 and slide glass 41；43 position of emery wheel is adjusted, setting emery wheel 43 is ground device
Grinding depth needed for 42 edge of chip, device wafer of the emery wheel 43 along the grinding depth set para-linkage chip from outside to inside
42 edges are ground, until being milled to the contact surface 411 of device wafer 42 and slide glass 41.（3）43 position of emery wheel is adjusted, is first set
One grinding depth, emery wheel 43 are ground along 42 edge of device wafer of the grinding depth set para-linkage chip from outside to inside
It cuts, until being milled to the contact surface 411 of device wafer 42 and slide glass 41；43 position of emery wheel is adjusted, then first sets a grinding depth,
Emery wheel 43 is ground along 42 edge of device wafer of the grinding depth set para-linkage chip from outside to inside, until being milled to device
The contact surface 411 of part chip 42 and slide glass 41 repeats above-mentioned action, until being milled to required grinding depth.Grinding or cutting are completed
42 edge of device wafer afterwards is rule perpendicular to contact surface.
In step 3）In, the S3 steps and Fig. 5 d of Fig. 4 are please referred to, the device wafer 42 of the removal curved edge is thinned
To required size.
Specifically, device wafer 42 is thinned using grinding and polishing method, the tradition grinding and polishing method should include with
Lower step：Bonding wafer is being roughly ground, is then being refined；The bonding wafer after fine grinding is subjected to chemical machinery throwing
Light.
Specifically, bonding wafer is roughly ground on polyurethane polishing pad, then refined, roughly grind and refine used in
Abrasive material include aluminium oxide either the mixture of aluminium oxide and boron carbide either make aluminium oxide and silicon carbide mixture or
It is the mixture of aluminium oxide, boron carbide and silicon carbide, when the abrasive material is mixture, the aluminium oxide accounts for the mixture
Weight fraction is more than 80%.
Specifically, 5~30wt% of abrasive material that corase grinding and fine grinding use, 0.1~0.5wt% of grinding fluid, surplus is deionized water,
Grinding flow quantity is 1~50ml/min, 50~150g/cm of grinding pressure2, 40~80r/min of rotating speed roughly grinds the lapping liquid of use
Granularity be W7, refine the granularity of the lapping liquid used as W1.5.
Specifically, the bonding wafer after fine grinding is chemically-mechanicapolish polished on synthetic leather polishing pad, chemical machine
Polishing fluid includes used in tool polishing：1~15wt% of nanometer abrasive, oxidant are 1~3wt%, surfactant 0.01wt%, PH tune
Whole dose, surplus is deionized water.The size of the granularity of polishing fluid be 20~60nm, pH value 9.5, polish pressure be 60~
120g/cm2,60~100r/min of rotating speed.
It should be pointed out that the abrasive material proportioning used in corase grinding, fine grinding and polishing, the ginsengs such as flow, pressure and rotating speed
Number can be according to actual needs adjusted correspondingly by those skilled in the art, specially be illustrated herein, should not excessively be limited
Protection scope of the present invention.
Specifically, thinned size of the device wafer 42 after chemically mechanical polishing is less than or equal to 50 μm, it is further preferable that device
The thinned size range of part chip 42 is between 5 to 50 μm.
In conclusion being handled using emery wheel para-linkage chip before thinning process in the present invention, device has been ground off
The edge of part chip arc, this just effectively prevents occurring wedge angle in bonding wafer thinning process, and then has prevented device wafer
The generation of edge break problem, can under the premise of ensureing that device wafer edge does not rupture, be thinned to 50 μm hereinafter, with
Meet the needs of follow-up preparation process, ensures the performance with latter made semiconductor devices.Compared with existing reduction process, this hair
It is bright to cause any pollution to board and subsequent technique is thinned, and used equipment is simple, easily operated, process is succinct,
Production efficiency is substantially increased, production cost and equipment cost are reduced.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should by the present invention claim be covered.
Claims (10)
1. a kind of thining method of bonding wafer, which is characterized in that at least include the following steps：
1) slide glass and a device wafer are provided；The slide glass and device wafer are bonded, bonding wafer is formed；
2) device wafer in the bonding wafer is cut or is ground using emery wheel, to remove its curved edge；It uses
Emery wheel is cut or is ground to device wafer, is at least included the following steps：
A) bonding wafer is rotated by vacuum suction in chuck surface with certain speed, and device wafer is located above slide glass；
B) emery wheel is vertically fixed in drive shaft, is rotated with certain speed；
C) polishing width of adjustment emery wheel position, the cutting of setting emery wheel or grinding device Waffer edge, emery wheel is along the mill set
Cutting width, from top to bottom the device wafer edge of para-linkage chip continue after being cut to the contact surface of device wafer and slide glass
It is ground to slide glass, until slide glass is ground away pre-set dimension；Wherein, the mill of the emery wheel cutting of setting or grinding device Waffer edge
Cut the distance to the outer of device wafer at the slit minimum that width is bonding wafer；
3) device wafer of the removal curved edge is thinned to required size.
2. the thining method of bonding wafer according to claim 1, it is characterised in that：In step 1), the slide glass and device
Part bonding chip mode is metal bonding, stick together bonding, the bonding of anode linkage, low temperature eutectic, in glass paste bonding pattern
It is a kind of.
3. the thining method of bonding wafer according to claim 1, it is characterised in that：In step 1), the slide glass is crystalline substance
Piece or glass.
4. the thining method of bonding wafer according to claim 1, it is characterised in that：In the step c), the mill of setting
The required polishing width at wheel grinding device wafer edge is less than or equal to 5mm.
5. the thining method of bonding wafer according to claim 4, it is characterised in that：In step c), the emery wheel of setting is ground
The required polishing width range at device wafer edge is cut between 1mm between 5mm.
6. the thining method of bonding wafer according to claim 1, it is characterised in that：In step 2), the emery wheel is by device
Part chip cuts or is ground to slide glass, until the contact surface edge of the device wafer and slide glass.
7. the thining method of bonding wafer according to claim 1, it is characterised in that：In the step c), emery wheel is used
The cutting or grinding that the device wafer of para-linkage chip carries out are by once cutting or method for grinding or repeatedly cutting or mill
Cutting method is realized.
8. the thining method of bonding wafer according to claim 1, it is characterised in that：In step 3), using grinding and polishing
The device wafer of the removal curved edge is thinned in method.
9. the thining method of bonding wafer according to claim 1, it is characterised in that：In step 3), to the removal arc
The device wafer at shape edge carries out thinned size and is less than or equal to 50 μm.
10. the thining method of bonding wafer according to claim 9, it is characterised in that：In step 3), to the removal arc
The device wafer at shape edge carries out thinned size range between 5 μm to 50 μm.
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| CN105271108B (en) * | 2015-09-10 | 2017-08-04 | 武汉新芯集成电路制造有限公司 | A kind of bonding method of wafer |
| CN106800272B (en) * | 2017-02-17 | 2018-11-23 | 烟台睿创微纳技术股份有限公司 | A kind of cutting of MEMS wafer and wafer scale release and test method |
| CN109972204B (en) * | 2017-12-28 | 2021-09-17 | 济南晶正电子科技有限公司 | Ultra-thin ultra-flat wafer and method for manufacturing the same |
| CN109065508B (en) * | 2018-08-14 | 2021-01-08 | 济南晶正电子科技有限公司 | Ultrathin wafer with reverse mesa composite structure and preparation method thereof |
| JP7187115B2 (en) * | 2018-12-04 | 2022-12-12 | 株式会社ディスコ | Wafer processing method |
| CN110459555A (en) * | 2019-08-29 | 2019-11-15 | 长春长光圆辰微电子技术有限公司 | Manufacturing process method of the back side illumination image sensor crystal round fringes without silicon fiml defect |
| CN112201566A (en) * | 2020-09-22 | 2021-01-08 | 武汉电信器件有限公司 | Wafer thinning method and device and wafer unloading clamp |
| CN113471069A (en) * | 2021-05-10 | 2021-10-01 | 中国电子科技集团公司第十一研究所 | Infrared detector, hybrid chip and back thinning scratch processing method thereof |
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| CN101185156A (en) * | 2005-05-31 | 2008-05-21 | 信越半导体股份有限公司 | Bonded wafer manufacturing method and apparatus for grinding outer circumference of bonded wafer |
| CN102194667A (en) * | 2010-03-02 | 2011-09-21 | S.O.I.Tec绝缘体上硅技术公司 | Method for manufacturing a multilayer structure with trimming by thermomechanical effects |
| CN103084950A (en) * | 2011-11-08 | 2013-05-08 | 株式会社迪思科 | Processing method for wafer |
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