CN108735590A - Method for planarization of wafer surface - Google Patents
Method for planarization of wafer surface Download PDFInfo
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- CN108735590A CN108735590A CN201710261391.6A CN201710261391A CN108735590A CN 108735590 A CN108735590 A CN 108735590A CN 201710261391 A CN201710261391 A CN 201710261391A CN 108735590 A CN108735590 A CN 108735590A
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- wafer
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- planarization
- mesh
- flatness layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Abstract
The present invention provides a kind of method for planarization of wafer surface, includes the following steps：1）There is provided a wafer, the wafer includes opposite first surface and second surface；2）The first solidification flatness layer is formed in the first surface of the wafer；3）The second surface of the wafer is ground；4）Remove the first solidification flatness layer；5）The second solidification flatness layer is formed in the grinding wafer treated second surface；6）The first surface of the wafer is ground；7）Remove the second solidification flatness layer.The wafer planarization method of the present invention can thoroughly eliminate the surface nanotopology of crystal column surface, have many advantages, such as that processing step is simple, easily operated, efficiency is higher.
Description
Technical field
The present invention relates to semiconductor process technique fields, more particularly to a kind of method for planarization of wafer surface.
Background technology
With the development of semiconductor process technique, after reaching 0.25 μm of technology node, surface nanotopology
(nanotopography) an important focus is had become；Surface nanotopology refers to the 0.2mm formed in crystal column surface
The wave structure formed in the crystal column surface of formation during the deviation of~20mm, specially wire cutting.Surface nanotopology
There is significant impact for the CMP process of fleet plough groove isolation structure.
In recent years it has been proposed that some wafers formed to slice before polishing wafer are handled to eliminate surface
The method of nanotopography, it is specific as follows：
1. twin grinding (Double Side Lapping)
The specific method of twin grinding is：Wafer level is placed, while using Al2O3Wafer is covered with pressing plate simultaneously
Both sides are ground wafer, which can effectively eliminate the corrugated surface nanotopology of crystal column surface.But
It is that this method is less efficient, takes longer；Further, since this method will use grinding slurry, it is easy to cause damages to environment.
2. double plate is ground (Doupble Disk Grinding, DDSG)
Double plate grinding specific method be：Wafer is disposed vertically on a carrier, by hydrostatic pressure dynamic balance and with load
Body together with low speed rotation, meanwhile, grinding wheel high speed rotation is carried out at the same time grinding with two surfaces to wafer.However, DDSG is eliminated
The ability of the corrugated surface nanotopology of crystal column surface is unstable, and will produce the surface nanotopology such as circular pattern.
In general, especially for the advanced technologies node for having surface nanotopology strict demand, generally also need to make after DDGS
With surface grinding or fine gtinding further to eliminate the surface nanotopology of corrugated surface nanotopology and annular.
3. surface is ground (Surface Grinding)
Surface grinding specific method be：There is wafer opposite first surface and second surface wafer is clamped first
First surface is simultaneously ground the second surface of wafer, then by the way that the second surface of wafer is clamped and to the first table of wafer
Face is ground.However, surface grinding can not thoroughly eliminate corrugated surface nanotopology, in the process of surface grinding
In, the corrugated surface nanotopology of crystal column surface is temporarily removed when wafer is clamped fixed, but when grinding terminates are brilliant
After circle is released, the corrugated surface nanotopology of crystal column surface can occur again.
Invention content
In view of prior art described above, the purpose of the present invention is to provide a kind of method for planarization of wafer surface, are used for
Solve surface nanotopology that is ineffective existing for wafer planarization method in the prior art and cannot thoroughly eliminating wafer
The problem of.
In order to achieve the above objects and other related objects, the present invention provides a kind of above-mentioned method for planarization of wafer surface, institute
Method for planarization of wafer surface is stated to include the following steps：
1) wafer is provided, the wafer includes opposite first surface and second surface；
2) the first solidification flatness layer is formed in the first surface of the wafer；
3) second surface of the wafer is ground；
4) the first solidification flatness layer is removed；
5) the second solidification flatness layer is formed in the grinding wafer treated second surface；
6) first surface of the wafer is ground；
7) the second solidification flatness layer is removed.
Optionally, it in step 2), forms the first solidification flatness layer in the first surface of the wafer and includes the following steps：
The wafer 2-1) is placed in vacuum cup surface, the surface of the second surface of the wafer and the vacuum cup
It is in contact；
Liquid curable resin drop 2-2) is overlying on the first surface of the wafer, and is made described in the vacuum cup drive
Wafer rotates, to form the first resin layer in the first surface of the wafer；
First resin layer 2-3) is subjected to planarization process；
2-4) first resin layer is cured to obtain the first solidification flatness layer.
Optionally, in step 3), the second surface of the wafer is ground using grinding wheel.
Optionally, in step 3), the second surface of the wafer is ground using the grinding wheel of the mesh of 2000 mesh~50000
Processing.
Optionally, step 3) includes the following steps：
The grinding wheel of the mesh of 2000 mesh~10000 3-1) is used to carry out rough lapping to the second surface of the wafer；
The grinding wheel of the mesh of 3000 mesh~50000 3-2) is used to carry out fine lapping to the second surface of the wafer.
Optionally, in step 5), forming the second solidification flatness layer in the grinding wafer treated second surface includes
Following steps：
The wafer that step 4) obtains 5-1) is placed in vacuum cup surface, the first surface of the wafer with it is described true
The surface of suction disk is in contact；
Liquid curable resin drop 5-2) is overlying on the second surface of the wafer, and is made described in the vacuum cup drive
Wafer rotates, to form the second resin layer in the second surface of the wafer；
Second resin layer 5-3) is subjected to planarization process；
5-4) second resin layer is cured to obtain the second solidification flatness layer.
Optionally, in step 6), the first surface of the wafer is ground using grinding wheel.
Optionally, in step 6), the first surface of the wafer is ground using the grinding wheel of the mesh of 2000 mesh~50000
Processing.
Optionally, step 6) includes the following steps：
The grinding wheel of the mesh of 2000 mesh~10000 6-1) is used to carry out rough lapping to the first surface of the wafer；
The grinding wheel of the mesh of 3000 mesh~50000 6-2) is used to carry out fine lapping to the first surface of the wafer.
Optionally, further include that the wafer is placed in double-ended grinding machine to carry out pretreated step between step 1) and step 2)
Suddenly.
Optionally, further include the step that the crystal column surface that step 7) obtains is performed etching and polished successively after step 7)
Suddenly.
As described above, the method for planarization of wafer surface of the present invention, has the advantages that：The wafer planarization of the present invention
Change method can thoroughly eliminate the surface nanotopology of crystal column surface, have processing step is simple, easily operated, efficiency is higher etc.
Advantage.
Description of the drawings
Fig. 1 is shown as the flow diagram of the method for planarization of wafer surface of the present invention.
Fig. 2~Figure 14 is shown as the schematic diagram of each step in the method for planarization of wafer surface of the present invention.
Component label instructions
11 resin dispensers
121 first resin layers
122 second resin layers
13 wafers
14 vacuum cups
15 rotation motors
16 hyperplane structures
17 rotary shafts
18 wheel carriers
19 grinding wheels
20 rooms UV
21 first solidification flatness layers
22 second solidification flatness layers
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this specification below by way of specific specific example
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
It please refers to Fig.1 to Figure 14.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, though package count when only display is with related component in the present invention rather than according to actual implementation in diagram
Mesh, shape and size are drawn, when actual implementation form, quantity and the ratio of each component can be a kind of random change, and its
Assembly layout kenel may also be increasingly complex.
Referring to Fig. 1, the present invention provides a kind of method for planarization of wafer surface, the method for planarization of wafer surface includes
Following steps：
1) wafer is provided, the wafer includes opposite first surface and second surface；
2) the first solidification flatness layer is formed in the first surface of the wafer；
3) second surface of the wafer is ground；
4) the first solidification flatness layer is removed；
5) the second solidification flatness layer is formed in the grinding wafer treated second surface；
6) first surface of the wafer is ground；
7) the second solidification flatness layer is removed.
In step 1), the S1 steps in please referring to Fig.1 provide a wafer 13, and the wafer 13 includes opposite first
Surface and second surface.
As an example, the wafer 13 is the wafer 13 that wire cutting obtains, the first surface of the wafer 13 and the second table
Face is formed with wavy surface nanotopology.
As an example, further including that the wafer 13 is placed in double-ended grinding machine to pre-process between step 1) and step 2)
The step of；It is to be not repeated herein known to those skilled in the art to carry out pretreatment to the wafer 13 using double-ended grinding machine.
In step 2), the S2 steps in please referring to Fig.1 and Fig. 2 to Fig. 5 form the in the first surface of the wafer 13
One solidification flatness layer 21.
As an example, first surface formation the first solidification flatness layer 21 in the wafer 13 includes the following steps：
The wafer 13 2-1) is placed in 14 surface of vacuum cup, the second surface of the wafer 13 and the vacuum cup
14 surface is in contact；The vacuum cup 14 adsorbs the wafer 13；
Liquid curable resin drop 2-2) is overlying on to the first surface of the wafer 13, as shown in Fig. 2, and making the vacuum
Sucker 14 drives the wafer 13 to rotate under the driving of drive motor 15, to form first in the first surface of the wafer 13
Resin layer 121, as shown in Figure 3；
First resin layer 121 2-3) is subjected to planarization process；As shown in figure 4, surface is first formed with described
The wafer 13 of one resin layer 121 is discharged from the vacuum cup 14, is then placed in described using hyperplane structure 16
One resin layer, 121 upper surface, and first resin layer 121 firmly is compressed, so that the surface of first resin layer 121 is most
Amount is smooth；Certainly, in other examples, can also first by surface be formed with the wafer 13 of first resin layer 121 from
It is discharged on the vacuum cup 14, then, the wafer 13 after release is transferred in support base, hyperplane knot is reused
Structure 16 is placed in 121 upper surface of the first resin layer, and firmly compresses first resin layer 121, so that first tree
The surface of lipid layer 121 is smooth as possible；
2-4) first resin layer 121 is cured to obtain the first solidification flatness layer 21；Specifically, such as Fig. 5 institutes
Show, by step 2-2) obtained structure is placed in the rooms UV 20, irradiated using UV (ultraviolet light) to consolidate first resin layer 121
Change obtains the first solidification flatness layer 21.
As an example, step 2-2) in, the rotating speed that the vacuum cup 14 drives the wafer 13 to rotate is 500rpm
(rev/min)~10000rpm；Preferably, in the present embodiment, the vacuum cup 14 drives the rotating speed that the wafer 13 rotates
For 5000rpm.
If when the first surface of the wafer 13 be not arranged it is described first solidification flatness layer 21 and subsequently directly to described
The second surface of wafer 13 is ground, and the nanometer that 13 second surface of the wafer can only be temporarily removed during grinding is received
Rice pattern, and after grinding terminates to discharge wafer 13, the nano pattern of 13 second surface of the wafer will appear again.
In the present invention, the first solidification flatness layer 21, the first solidification flatness layer 21 are formed in the first surface of the wafer 13
With more even curface, when being ground to the second surface of the wafer 13 in follow-up step 3), more
Smooth the first solidification flatness layer 21 can be both ground in the second surface to the wafer 13 as a reference plane
More even curface can be obtained when processing, but may insure 13 second surface of the wafer nano pattern it is thorough
Removal.
In step 3), the S3 steps in please referring to Fig.1 and Fig. 6 and Fig. 7 grind the second surface of the wafer 13
Mill processing.
As an example, first, the structure that step 2) obtains being placed on vacuum cup 14 as shown in Figure 6 and (certainly, is existed
In other examples, the structure that step 2) obtains can be placed in any one support plate, for example, abrasive disk etc.), described first
Solidification flatness layer 21 is in contact with the vacuum cup 14；At this point, the second surface of the wafer 13 is placed in the vacuum upward
On sucker 14；Then, the second surface of the wafer 13 is ground using grinding wheel 19, specifically, the grinding wheel 19
It is fixed in rotary shaft 17 via wheel carrier 18, the grinding wheel 19 quickly rotates under the drive of the rotary shaft 17, and to described
The second surface of wafer 13 is ground, and the second surface of the wafer 13 is planarized, to remove the wafer
The surface nanotopology on 13 surfaces, as shown in Figure 7.
In one example, the grinding wheel 19 of the mesh of 2000 mesh~50000 can be used to carry out the second surface of the wafer 13
Milled processed.In this example, the rotating speed of the grinding wheel 19 can be 50rpm~300rpm, and milling time can be according to reality
It is set, is not limited herein.
In another example, step 3) may include steps of：
The grinding wheel 19 of the mesh of 2000 mesh~10000 3-1) is used to carry out rough lapping to the second surface of the wafer 13；At this point,
The rotating speed of the grinding wheel 19 can be 50rpm~300rpm, and milling time can be set, not done herein according to actual needs
It limits；
The grinding wheel 19 of the mesh of 3000 mesh~50000 3-2) is used to carry out fine lapping to the second surface of the wafer 13；At this point,
The rotating speed of the grinding wheel 19 can be 500rpm~10000rpm, and milling time can be 1 minute~10 minutes.
In step 4), the S4 steps in please referring to Fig.1 and Fig. 8, removal the first solidification flatness layer 21.
As an example, organic solvent dissolving removal the first solidification flatness layer 21 can be used, grinding can also be passed through
Etc. techniques removal it is described first solidification flatness layer 21；Preferably, in the present embodiment, organic solvent dissolving removal described first is used
Cure flatness layer 21.In this example, the organic solvent that can remove resin can be flat for removing first solidification
Layer 21.The structure of the wafer 13 after the first solidification flatness layer 21 is removed as shown in figure 8, at this point, the wafer 13
The surface nanotopology of second surface has completely removed, and the second surface of the wafer 13 has been planar.
In step 5), the S5 steps in please referring to Fig.1 and Fig. 9 to Figure 12, after 13 milled processed of the wafer
Two surfaces form the second solidification flatness layer 22.
As an example, it includes as follows that the second surface after 13 milled processed of the wafer, which forms the second solidification flatness layer 22,
Step：
The wafer 13 that step 4) obtains 5-1) is placed in 14 surface of vacuum cup, the first surface of the wafer 13 with
The surface of the vacuum cup 14 is in contact；The vacuum cup 14 adsorbs the wafer 13；
Liquid curable resin drop 5-2) is overlying on to the second surface of the wafer 13, as shown in figure 9, and making the vacuum
Sucker 14 drives the wafer 13 to rotate under the driving of drive motor 15, to form second in the second surface of the wafer 13
Resin layer 122, as shown in Figure 10；
Second resin layer 122 5-3) is subjected to planarization process；As shown in figure 11, surface is first formed with described
The wafer 13 of two resin layers 122 is discharged from the vacuum cup 14, is then placed in described using hyperplane structure 16
Two resin layers, 122 upper surface, and second resin layer 122 firmly is compressed, so that the surface of second resin layer 122 is most
Amount is smooth；Certainly, in other examples, can also first by surface be formed with the wafer 13 of second resin layer 122 from
It is discharged on the vacuum cup 14, then, the wafer 13 after release is transferred in support base, hyperplane knot is reused
Structure 16 is placed in 122 upper surface of the second resin layer, and firmly compresses second resin layer 122, so that second tree
The surface of lipid layer 122 is smooth as possible；
5-4) second resin layer 122 is cured to obtain the second solidification flatness layer 22；Specifically, such as Figure 12 institutes
Show, by step 5-2) obtained structure is placed in the rooms UV 20, irradiated using UV (ultraviolet light) to consolidate second resin layer 122
Change obtains the second solidification flatness layer 22.
As an example, step 5-2) in, the rotating speed that the vacuum cup 14 drives the wafer 13 to rotate is 500rpm
(rev/min)~10000rpm；Preferably, in the present embodiment, the vacuum cup 14 drives the rotating speed that the wafer 13 rotates
For 5000rpm.
If when the second surface of the wafer 13 be not arranged it is described second solidification flatness layer 22 and subsequently directly to described
The first surface of wafer 13 is ground, and the nanometer that 13 first surface of the wafer can only be temporarily removed during grinding is received
Rice pattern, and after grinding terminates to discharge wafer 13, the nano pattern of 13 first surface of the wafer will appear again.
In the present invention, the second solidification flatness layer 22, the second solidification flatness layer 22 are formed in the second surface of the wafer 13
With more even curface, when being ground to the first surface of the wafer 13 in follow-up step 6), more
Smooth the second solidification flatness layer 22 can be both ground in the first surface to the wafer 13 as a reference plane
More even curface can be obtained when processing, but may insure 13 first surface of the wafer nano pattern it is thorough
Removal.
In step 6), the S6 steps in please referring to Fig.1 and Figure 13 and Figure 14 carry out the first surface of the wafer 13
Milled processed.
As an example, first, the structure that step 5) obtains is placed on vacuum cup 14 as shown in Figure 13 (certainly,
In other examples, the structure that step 5) obtains can be placed in any one support plate, for example, abrasive disk etc.), described
Two solidification flatness layers 22 are in contact with the vacuum cup 14；At this point, the first surface of the wafer 13 be placed in upward it is described true
On suction disk 14；Then, the first surface of the wafer 13 is ground using grinding wheel 19, specifically, the grinding wheel
19 are fixed on via wheel carrier 18 in rotary shaft 17, and the grinding wheel 19 quickly rotates under the drive of the rotary shaft 17, and to institute
The first surface for stating wafer 13 is ground, and the first surface of the wafer 13 is planarized, to remove the crystalline substance
The surface nanotopology of 13 first surfaces of circle, as shown in figure 14.
In one example, the grinding wheel 19 of the mesh of 2000 mesh~50000 can be used to carry out the first surface of the wafer 13
Milled processed.In this example, the rotating speed of the grinding wheel 19 can be 50rpm~300rpm, and milling time can be according to reality
It is set, is not limited herein.
In another example, step 3) may include steps of：
The grinding wheel 19 of the mesh of 2000 mesh~10000 3-1) is used to carry out rough lapping to the first surface of the wafer 13；At this point,
The rotating speed of the grinding wheel 19 can be 50rpm~300rpm, and milling time can be set, not done herein according to actual needs
It limits；
The grinding wheel 19 of the mesh of 3000 mesh~50000 3-2) is used to carry out fine lapping to the first surface of the wafer 13；At this point,
The rotating speed of the grinding wheel 19 can be 50rpm~300rpm, and milling time can be set, not done herein according to actual needs
It limits.
In step 7), the S7 steps in please referring to Fig.1, removal the second solidification flatness layer 22.
As an example, organic solvent dissolving removal the second solidification flatness layer 22 can be used, grinding can also be passed through
Etc. techniques removal it is described second solidification flatness layer 22；Preferably, in the present embodiment, organic solvent dissolving removal described second is used
Cure flatness layer 22.In this example, the organic solvent that can remove resin can be flat for removing second solidification
Layer 22.
Further include being carved successively to 13 surface of the wafer that step 7) obtains it should be noted that after step 7)
The step of erosion and polishing, further to planarize the wafer 13, to obtain the more smooth wafer 13 in surface.This
Place, it is possible, firstly, to be performed etching to the wafer 13 that step 7) obtains using any one of dry etching or wet etching
The stress on the wafer 13 will be removed；Then, after may be used but being not limited only to CMP process to etching
The wafer 13 carries out twin polishing and positive mirror polish.Etching and polishing process are known to those skilled in the art, herein no longer
It is tired to state.
In conclusion the present invention provides a kind of method for planarization of wafer surface, the method for planarization of wafer surface includes
Following steps：1) wafer is provided, the wafer includes opposite first surface and second surface；2) the first of the wafer
Surface forms the first solidification flatness layer；3) second surface of the wafer is ground；4) first solidification is removed
Flatness layer；5) the second solidification flatness layer is formed in the grinding wafer treated second surface；6) to the first of the wafer
Surface is ground；7) the second solidification flatness layer is removed.The wafer planarization method of the present invention can be eliminated thoroughly
The surface nanotopology of crystal column surface has many advantages, such as that processing step is simple, easily operated, efficiency is higher.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should by the present invention claim be covered.
Claims (11)
1. a kind of method for planarization of wafer surface, which is characterized in that include the following steps：
1) wafer is provided, the wafer includes opposite first surface and second surface；
2) the first solidification flatness layer is formed in the first surface of the wafer；
3) second surface of the wafer is ground；
4) the first solidification flatness layer is removed；
5) the second solidification flatness layer is formed in the grinding wafer treated second surface；
6) first surface of the wafer is ground；
7) the second solidification flatness layer is removed.
2. method for planarization of wafer surface according to claim 1, it is characterised in that：In step 2), in the wafer
First surface forms the first solidification flatness layer and includes the following steps：
The wafer 2-1) is placed in vacuum cup surface, the second surface of the wafer connects with the surface of the vacuum cup
It touches；
Liquid curable resin drop 2-2) is overlying on the first surface of the wafer, and the vacuum cup is made to drive the wafer
Rotation, to form the first resin layer in the first surface of the wafer；
First resin layer 2-3) is subjected to planarization process；
2-4) first resin layer is cured to obtain the first solidification flatness layer.
3. method for planarization of wafer surface according to claim 1, it is characterised in that：In step 3), using grinding wheel to institute
The second surface for stating wafer is ground.
4. method for planarization of wafer surface according to claim 3, it is characterised in that：In step 3), using 2000 mesh~
The grinding wheel of 50000 mesh is ground the second surface of the wafer.
5. method for planarization of wafer surface according to claim 3, it is characterised in that：Step 3) includes the following steps：
The grinding wheel of the mesh of 2000 mesh~10000 3-1) is used to carry out rough lapping to the second surface of the wafer；
The grinding wheel of the mesh of 3000 mesh~50000 3-2) is used to carry out fine lapping to the second surface of the wafer.
6. method for planarization of wafer surface according to claim 1, it is characterised in that：In step 5), ground in the wafer
Mill treated second surface forms the second solidification flatness layer and includes the following steps：
The wafer that step 4) obtains 5-1) is placed in vacuum cup surface, the first surface of the wafer is inhaled with the vacuum
The surface of disk is in contact；
Liquid curable resin drop 5-2) is overlying on the second surface of the wafer, and the vacuum cup is made to drive the wafer
Rotation, to form the second resin layer in the second surface of the wafer；
Second resin layer 5-3) is subjected to planarization process；
5-4) second resin layer is cured to obtain the second solidification flatness layer.
7. method for planarization of wafer surface according to claim 1, it is characterised in that：In step 6), using grinding wheel to institute
The first surface for stating wafer is ground.
8. method for planarization of wafer surface according to claim 7, it is characterised in that：In step 6), using 2000 mesh~
The grinding wheel of 50000 mesh is ground the first surface of the wafer.
9. method for planarization of wafer surface according to claim 7, it is characterised in that：Step 6) includes the following steps：
The grinding wheel of the mesh of 2000 mesh~10000 6-1) is used to carry out rough lapping to the first surface of the wafer；
The grinding wheel of the mesh of 3000 mesh~50000 6-2) is used to carry out fine lapping to the first surface of the wafer.
10. method for planarization of wafer surface according to any one of claim 1 to 9, it is characterised in that：Step 1) and step
It is rapid 2) between further include that the wafer is placed in double-ended grinding machine to carry out pretreated step.
11. method for planarization of wafer surface according to any one of claim 1 to 9, it is characterised in that：Step 7) it
Afterwards, further include the steps that the crystal column surface that step 7) obtains is performed etching and polished successively.
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| CN201710261391.6A CN108735590A (en) | 2017-04-20 | 2017-04-20 | Method for planarization of wafer surface |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111482849A (en) * | 2019-01-25 | 2020-08-04 | 东莞新科技术研究开发有限公司 | Method for reducing thickness of wafer |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011103379A (en) * | 2009-11-11 | 2011-05-26 | Sumco Corp | Flat processing method of wafer |
| CN104769704A (en) * | 2013-02-19 | 2015-07-08 | 胜高股份有限公司 | Method for processing semiconductor wafer |
-
2017
- 2017-04-20 CN CN201710261391.6A patent/CN108735590A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011103379A (en) * | 2009-11-11 | 2011-05-26 | Sumco Corp | Flat processing method of wafer |
| CN104769704A (en) * | 2013-02-19 | 2015-07-08 | 胜高股份有限公司 | Method for processing semiconductor wafer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111482849A (en) * | 2019-01-25 | 2020-08-04 | 东莞新科技术研究开发有限公司 | Method for reducing thickness of wafer |
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