CN104701161A - Technological method for manufacturing groove type Schottky diodes - Google Patents
Technological method for manufacturing groove type Schottky diodes Download PDFInfo
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- CN104701161A CN104701161A CN201310655056.6A CN201310655056A CN104701161A CN 104701161 A CN104701161 A CN 104701161A CN 201310655056 A CN201310655056 A CN 201310655056A CN 104701161 A CN104701161 A CN 104701161A
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- schottky diode
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title abstract description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 53
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 48
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 48
- 239000010703 silicon Substances 0.000 claims abstract description 48
- 238000005530 etching Methods 0.000 claims abstract description 26
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 21
- 239000000377 silicon dioxide Substances 0.000 claims description 25
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 229920005591 polysilicon Polymers 0.000 claims description 8
- 238000005516 engineering process Methods 0.000 claims description 7
- 238000002360 preparation method Methods 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 3
- 239000000428 dust Substances 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 3
- 238000001035 drying Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- 241001354791 Baliga Species 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a technological method for manufacturing groove type Schottky diodes. Contact holes are particularly formed by means of etching by the aid of two-step dry processes. The technological method includes etching silicon surfaces at first when the contact holes are about to be formed; then etching silicon and silicon oxide in grooves together. Selection ratios of the silicon to the silicon oxide in last-step contact hole etching menus are 1:1, the silicon surfaces are etched by depths higher than 1000 angstroms approximately, the silicon oxide in the side walls of the grooves is protruded out of the silicon surfaces, and Schottky contact effects are ultimately realized by the aid of metal. The technological method has the advantages that the technological method aims to solve the problem of high electric leakage of existing groove Schottky diode products, the internal uniformity of the surfaces of products can be improved, the production cost can be reduced, the yield of the products can be increased, and the technological method is suitable for mass production on a large scale.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing process, particularly relate to a kind of process of preparing of groove-shaped Schottky diode.
Background technology
Schottky diode known by industry, and by multiple different layout design and manufacture technics.The 5th of Baliga, 612, in No. 567 United States Patent (USP)s, the groove-shaped domain shown in typical case is also known to people, groove-shaped Schottky diode is owing to pursuing the maximization of forward conduction current capacity, its footprint is fully utilized in the barrier contact of Schottky, and this just requires that contact hole is fully opened cellular region when etching.Preparation method conventional at present adopts dry etching contact hole, and then Direct precipitation metal forms Schottky contacts, but process window can be caused in actual process process young, and reverse leakage current is large, the problems such as product yield is low.
Summary of the invention
The technical problem that the present invention solves is to provide a kind of process of preparing of groove-shaped Schottky diode, which improves the method for manufacturing technology of conventional groove type Schottky diode, reduces reverse leakage current, improves product yield, makes its applicable scale volume production.
For solving the problems of the technologies described above, the invention provides a kind of process of preparing of groove-shaped Schottky diode, mainly comprising the steps:
Step 1: reference standard groove-shaped Schottky diode preparation technology, silicon chip forms groove and fills with polysilicon, then utilizes dry etching to be carried out back by the polysilicon outside groove carving;
Step 2: deielectric-coating between depositing from level to level, starts to form contact hole;
Step 3: utilize dry etch process, is first etched to silicon face by contact hole, is then together etched by the silica in silicon and groove;
Step 4: etch silicon makes the silica in groove give prominence to silicon plane;
Step 5: then deposit layer of metal, thus form Schottky contacts;
Step 6: last plated metal aluminium also passes through photoetching, and etching technics forms metal and connects.
As preferred technical scheme, in step 2, described inter-level dielectric film is silica.
As preferred technical scheme, in step 3, contact hole etching is divided into two steps, and inter-level dielectric film etches by the etching menu that the first step utilizes silica high to silicon etching Selection radio, is parked in silicon face; Second step switches another etching menu, and utilize the menu of silicon and oxide etch Selection radio 1:1 to etch, together etched by the silica in silicon and groove, etching depth is greater than 1000 dusts.
As preferred technical scheme, in step 4, utilize silicon to the etching menu only etch silicon of silica high selectivity, make the silica in groove give prominence to silicon plane, projecting height is more than 500 dusts.
As preferred technical scheme, in step 5, described plated metal is titanium, titanium nitride or both composition metals, and the thickness of described metal is 100-2000 dust.
Compared to the prior art, the present invention has following beneficial effect: compared with adopting the groove-shaped Schottky diode (see figure 8) of the inventive method manufacture and adopting the groove-shaped Schottky diode (see figure 7) of traditional handicraft manufacture, obviously there is lower reverse leakage, and better inner evenness.Visible, the inventive method can solve groove-shaped Schottky diode product and to leak electricity large problem, reduces reverse leakage, improves product inner evenness, reduces production cost, improves product yield, makes its applicable scale volume production.
Accompanying drawing explanation
Fig. 1 is the device sectional drawing after the inventive method step 1 completes;
Fig. 2 is the device sectional drawing after the inventive method step 2 completes;
Fig. 3 is the device sectional drawing after the inventive method step 3 completes;
Fig. 4 is the device sectional drawing after the inventive method step 4 completes;
Fig. 5 is the device sectional drawing after the inventive method step 5 completes;
Fig. 6 is the device sectional drawing after the inventive method step 6 completes.
In figure, description of reference numerals is as follows:
1 is silicon substrate, and 2 is epitaxial loayer, and 3 is groove, and 4 is the silica in groove, and 5 is the polysilicon in groove, and 6 is metal, and 7 is metallic aluminium, and 8 is inter-level dielectric film.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further detailed explanation.
As shown in figs 1 to 6, the process of preparing of groove-shaped Schottky diode of the present invention, comprises the steps:
1. as shown in Figure 1: reference standard groove-shaped Schottky diode preparation technology, identical doping type is had) at this epitaxial loayer 2 of silicon substrate 1 grown epitaxial layer 2(and silicon substrate 1, on epitaxial loayer 2, etching forms groove 3, deposit one deck silica 4 in groove 3, then with polysilicon, groove 3 is filled, then utilize dry etching to be carried out back by the polysilicon outside groove 3 carving, retain the polysilicon 5 in groove.
2. as shown in Figure 2: utilize CVD(chemical vapour deposition (CVD)) technique deposits one deck oxide as inter-level dielectric film 8 at silicon face, and inter-level dielectric film 8 is generally the materials such as silica, starts to form contact hole.
3. as shown in Figure 3: utilize dry etch process, first utilize silica to deielectric-coating 8 between silicon etching Selection radio high menu etch layer, (menu utilizing silica high to silicon etching Selection radio means that the etch rate of silica is faster than silicon contact hole to be first etched to silicon face, be complete in order to ensure the oxide etch on silicon, and reduce the loss of silicon); Then change etching menu, utilize the menu of silicon and oxide etch Selection radio 1:1 to etch, together etched by the silica 4 in silicon and groove, etching depth is greater than 1000 dusts.
4. as shown in Figure 4: adopt dry etch process, utilize silicon to the etching menu of the high selectivity of silica only etch silicon (adopt the high selectivity of silicon to silica to mean that the etch rate of silicon is faster than silica, do not lose when etch silicon to make oxide layer that trenched side-wall is formed, the structure that this oxide layer is protruded can be formed), make the silica 4 in groove give prominence to silicon plane, projecting height is greatly more than 500 dusts.
5. as shown in Figure 5: in silicon face deposition layer of metal 6, as titanium, titanium nitride or both composition metals, the thickness of metal 6 is 100-2000 dust, thus forms Schottky contacts.
6. as shown in Figure 6: finally on metal 6, deposit layer of metal aluminium 7 and by photoetching, the techniques such as etching form metal connection.
Adopt compared with the groove-shaped Schottky diode of the inventive method manufacture and the groove-shaped Schottky diode of employing traditional handicraft manufacture, obviously there is lower reverse leakage, and better inner evenness.The inventive method improves device and to have chance with the pattern of area edge, contributes to edge and forms better schottky junction, thus improve reverse leakage.Visible, the inventive method can solve groove-shaped Schottky diode product and to leak electricity large problem, and can improve product inner evenness, reduces production cost, makes its applicable scale volume production.
Claims (5)
1. a process of preparing for groove-shaped Schottky diode, is characterized in that, mainly comprises the steps:
Step 1: reference standard groove-shaped Schottky diode preparation technology, silicon chip forms groove and fills with polysilicon, then utilizes dry etching to be carried out back by the polysilicon outside groove carving;
Step 2: deielectric-coating between depositing from level to level, starts to form contact hole;
Step 3: utilize dry etch process, is first etched to silicon face by contact hole, is then together etched by the silica in silicon and groove;
Step 4: etch silicon makes the silica in groove give prominence to silicon plane;
Step 5: then deposit layer of metal, thus form Schottky contacts;
Step 6: last plated metal aluminium also passes through photoetching, and etching technics forms metal and connects.
2. groove-shaped Schottky diode preparation technology according to claim 1, it is characterized in that: in step 2, described inter-level dielectric film is silica.
3. the process of preparing of groove-shaped Schottky diode according to claim 1, it is characterized in that: in step 3, contact hole etching is divided into two steps, and inter-level dielectric film etches by the etching menu that the first step utilizes silica high to silicon etching Selection radio, is parked in silicon face; Second step switches another etching menu, and utilize the menu of silicon and oxide etch Selection radio 1:1 to etch, together etched by the silica in silicon and groove, etching depth is greater than 1000 dusts.
4. the process of preparing of groove-shaped Schottky diode according to claim 1, it is characterized in that: in step 4, utilize silicon to the etching menu only etch silicon of silica high selectivity, make the silica in groove give prominence to silicon plane, projecting height is more than 500 dusts.
5. the process of preparing of groove-shaped Schottky diode according to claim 1, it is characterized in that: in step 5, described plated metal is titanium, titanium nitride or both composition metals, and the thickness of described metal is 100-2000 dust.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310655056.6A CN104701161B (en) | 2013-12-06 | 2013-12-06 | A kind of process of preparing of groove-shaped Schottky diode |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310655056.6A CN104701161B (en) | 2013-12-06 | 2013-12-06 | A kind of process of preparing of groove-shaped Schottky diode |
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| CN104701161A true CN104701161A (en) | 2015-06-10 |
| CN104701161B CN104701161B (en) | 2017-10-24 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105742338A (en) * | 2016-03-16 | 2016-07-06 | 杭州立昂微电子股份有限公司 | Semiconductor rectifier and fabrication method thereof |
| CN105789334A (en) * | 2016-03-16 | 2016-07-20 | 杭州立昂微电子股份有限公司 | Schottky barrier semiconductor rectifier and manufacturing method therefor |
| CN105810755A (en) * | 2016-03-16 | 2016-07-27 | 杭州立昂微电子股份有限公司 | Trench-gate-structured semiconductor rectifier and manufacturing method therefor |
| CN108133887A (en) * | 2017-12-04 | 2018-06-08 | 扬州国宇电子有限公司 | Flattening method based on deep etching |
| CN115053353A (en) * | 2020-03-31 | 2022-09-13 | 京瓷株式会社 | Semiconductor device and method for manufacturing semiconductor device |
| WO2024078125A1 (en) * | 2022-10-11 | 2024-04-18 | 华润微电子（重庆）有限公司 | Composite trench-type schottky diode device and fabrication method therefor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07288325A (en) * | 1994-02-22 | 1995-10-31 | Toshiba Corp | Manufacture of power semiconductor device |
| TWI293484B (en) * | 2005-12-09 | 2008-02-11 | Mosel Vitelic Inc | Method for fabricating trench metal oxide semiconductor field effect transistor |
| US20090026531A1 (en) * | 2007-07-23 | 2009-01-29 | Infineon Technologies Austria Ag | Method for insulating a semiconducting material in a trench from a substrate |
| EP1415334B1 (en) * | 2001-07-24 | 2009-12-02 | Nxp B.V. | Manufacture of semiconductor devices with schottky barriers |
-
2013
- 2013-12-06 CN CN201310655056.6A patent/CN104701161B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07288325A (en) * | 1994-02-22 | 1995-10-31 | Toshiba Corp | Manufacture of power semiconductor device |
| EP1415334B1 (en) * | 2001-07-24 | 2009-12-02 | Nxp B.V. | Manufacture of semiconductor devices with schottky barriers |
| TWI293484B (en) * | 2005-12-09 | 2008-02-11 | Mosel Vitelic Inc | Method for fabricating trench metal oxide semiconductor field effect transistor |
| US20090026531A1 (en) * | 2007-07-23 | 2009-01-29 | Infineon Technologies Austria Ag | Method for insulating a semiconducting material in a trench from a substrate |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105742338A (en) * | 2016-03-16 | 2016-07-06 | 杭州立昂微电子股份有限公司 | Semiconductor rectifier and fabrication method thereof |
| CN105789334A (en) * | 2016-03-16 | 2016-07-20 | 杭州立昂微电子股份有限公司 | Schottky barrier semiconductor rectifier and manufacturing method therefor |
| CN105810755A (en) * | 2016-03-16 | 2016-07-27 | 杭州立昂微电子股份有限公司 | Trench-gate-structured semiconductor rectifier and manufacturing method therefor |
| CN105742338B (en) * | 2016-03-16 | 2018-09-28 | 杭州立昂微电子股份有限公司 | A kind of semiconductor rectifier and its manufacturing method |
| CN105810755B (en) * | 2016-03-16 | 2018-09-28 | 杭州立昂微电子股份有限公司 | A kind of trench gate structure semiconductor rectifier and its manufacturing method |
| CN105789334B (en) * | 2016-03-16 | 2018-11-23 | 杭州立昂微电子股份有限公司 | A kind of Schottky barrier semiconductor rectifier and its manufacturing method |
| CN108133887A (en) * | 2017-12-04 | 2018-06-08 | 扬州国宇电子有限公司 | Flattening method based on deep etching |
| CN108133887B (en) * | 2017-12-04 | 2019-07-02 | 扬州国宇电子有限公司 | Flattening method based on deep etching |
| CN115053353A (en) * | 2020-03-31 | 2022-09-13 | 京瓷株式会社 | Semiconductor device and method for manufacturing semiconductor device |
| WO2024078125A1 (en) * | 2022-10-11 | 2024-04-18 | 华润微电子（重庆）有限公司 | Composite trench-type schottky diode device and fabrication method therefor |
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| CN104701161B (en) | 2017-10-24 |
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