CN104701145B - The forming method of semiconductor structure - Google Patents
The forming method of semiconductor structure Download PDFInfo
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- CN104701145B CN104701145B CN201310673666.9A CN201310673666A CN104701145B CN 104701145 B CN104701145 B CN 104701145B CN 201310673666 A CN201310673666 A CN 201310673666A CN 104701145 B CN104701145 B CN 104701145B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Abstract
A kind of forming method of semiconductor structure, which is characterized in that including：There is provided it is layer to be etched, the surface layer to be etched have expendable film；Isolation film is formed in the sacrifice film surface；Bottom layer anti-reflection layer and photoresist layer positioned at bottom layer anti-reflection layer surface are formed in the isolation film surface, the photoresist layer exposes part bottom layer anti-reflection layer surface；Using the photoresist layer as mask, the bottom layer anti-reflection layer, isolation film and expendable film are etched, until exposing surface layer to be etched, forms separation layer and sacrificial layer；The separation layer is removed, the bottom layer anti-reflection layer is made to be removed from the top surface of sacrificial layer.The pattern for being formed by semiconductor structure is good.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors more particularly to a kind of forming methods of semiconductor structure.
Background technology
With being constantly progressive for semiconductor technology, the process node of semiconductor devices just constantly reduces.However, due to by
The limitation of existing photoetching process precision is difficult to meet features in semiconductor devices with the mask pattern that existing photoetching process is formed
The demand that size persistently reduces has contained the development of semiconductor technology.
In order to which on the basis of existing photoetching process, the size of semiconductor devices, the prior art can be further reduced
Propose a kind of Dual graphing technique.Wherein, especially with self-alignment duplex pattern（Self-Aligned Double
Patterning, SADP）Technique is widely used because its is simple for process.Fig. 1 to Fig. 4 is the double using autoregistration of the prior art
Weight patterning process forms the cross-sectional view of the process of mask.
Referring to FIG. 1, providing layer to be etched 100,100 surface layer to be etched has sacrificial layer 101, the sacrificial layer
101 are formed using existing photoetching process.
Referring to FIG. 2, forming mask layer 103 in described layer to be etched 100 and 101 surface of sacrificial layer.
Referring to FIG. 3, being etched back to the mask layer 103 until exposing 101 top of 100 surface layer to be etched and sacrificial layer
Surface forms mask side wall 103a on 100 surface layer to be etched of 101 both sides of the sacrificial layer.
Referring to FIG. 4, after forming mask side wall 103a, the sacrificial layer 101 is removed（As shown in Figure 3）.
After removing the sacrificial layer 101, the mask side wall 103a is covered as etching described layer to be etched 100
Film.
However, the pattern that the prior art is formed by mask side wall is bad, cause to etch with the mask side wall to be etched
The pattern that layer is formed by semiconductor structure is bad.
Invention content
Problems solved by the invention is to provide a kind of forming method of semiconductor structure, and improvement is formed by semiconductor structure
Pattern.
To solve the above problems, the present invention provides a kind of forming method of semiconductor structure, including：There is provided it is layer to be etched,
The surface layer to be etched has expendable film；Isolation film is formed in the sacrifice film surface；Bottom is formed in the isolation film surface
Layer anti-reflecting layer and the photoresist layer positioned at bottom layer anti-reflection layer surface, the photoresist layer expose part bottom anti-reflective
Penetrate layer surface；Using the photoresist layer as mask, the bottom layer anti-reflection layer, isolation film and expendable film are etched, until exposing
Until surface layer to be etched, separation layer and sacrificial layer are formed；The separation layer is removed, makes the bottom layer anti-reflection layer from sacrificial layer
Top surface stripping.
Optionally, the material of the separation layer is germanium oxide.
Optionally, remove the separation layer technique be wet-etching technology, etching liquid be deionized water or containing go from
The chemical solution of sub- water.
Optionally, the temperature of the wet-etching technology is 0 degree Celsius~100 degrees Celsius.
Optionally, the formation process of the isolation film is atom layer deposition process, hot stove oxidation technology or chemical vapor deposition
The formation temperature of product technique, the isolation film is 10 degrees Celsius~400 degrees Celsius, and the thickness of the isolation film is 10 angstroms~1000
Angstrom.
Optionally, the material of the bottom layer anti-reflection layer is the organic material of carbon containing oxygen element, the material of the sacrificial layer
For amorphous carbon.
Optionally, the technological temperature for forming the sacrificial layer or bottom layer anti-reflection layer is 0 degree Celsius~200 degrees Celsius.
Optionally, further include：After removing the separation layer, the sacrificial layer both sides surface layer to be etched, with
And the sidewall surfaces of sacrificial layer form mask side wall；After forming mask side wall, the sacrificial layer is removed；With the mask side
Wall is mask, and etching is described layer to be etched, in the interior formation opening layer to be etched.
Optionally, the formation process of the mask side wall is：Mask film is formed in sacrificial layer and substrate surface；It is etched back to
The mask film forms mask side wall until exposing the top surface of surface layer to be etched and sacrificial layer.
Optionally, the material of the mask film is silica, and the formation process temperature of the mask film is 25 Celsius
~300 degrees Celsius of degree.
Compared with prior art, technical scheme of the present invention has the following advantages：
In the forming method of the semiconductor structure of the present embodiment, isolation is formed between bottom layer anti-reflection layer and expendable film
Film.With photoresist layer etching bottom layer anti-reflection layer, isolation film and expendable film, and after forming separation layer and sacrificial layer, Neng Goutong
Crossing removal separation layer makes the anti-reflecting layer positioned at insulation surface be removed from sacrificial layer surface, and the pattern of sacrificial layer is in removal institute
It is not damaged during stating separation layer, therefore, the pattern of the sacrificial layer is good, accurate size.Moreover, because follow-up
Mask film can be made to be formed directly into the side wall and top surface of sacrificial layer, then be etched back to mask film and be formed by mask side
The height of wall can be with the consistency of thickness of sacrificial layer, and being formed by the height of mask side wall will not be reduced by transition, makes described cover
Film side wall is enough the mask layer to be etched as etching.Layer to be etched it is formed by semiconductor structure to ensure that etching is described
Accurate size, pattern are good.
Further, the material of the separation layer is germanium oxide, and the technique for removing the separation layer is wet-etching technology, and
Etching liquid is deionized water.Since germanium oxide can be removed by deionized water, and water is equal for layer to be etched or sacrificial layer
Without etching power, therefore after removal is described using germanium oxide as the separation layer of material, the sacrificial layer and layer to be etched
Surface be not damaged, to ensure that be sacrificial layer pattern it is accurate, be conducive to be subsequently formed accurate in size mask
Side wall.
Further, the temperature of the wet-etching technology is 0 degree Celsius~100 degrees Celsius, and the temperature is relatively low, therefore not
Chemically or physically property layer to be etched can be caused to change, so as to ensure the semiconductor junction formed with etching layer to be etched
The performance of structure.
Further, the formation temperature of the isolation film is 10 degrees Celsius~400 degrees Celsius, and the formation temperature is relatively low, no
Chemically or physically property layer to be etched can be changed, ensure that performance layer to be etched or result are stablized.
Description of the drawings
Fig. 1 to Fig. 4 is the cross-section structure of the process that mask is formed using self-alignment duplex pattern chemical industry skill of the prior art
Schematic diagram；
Fig. 5 is when not removing bottom layer anti-reflection layer, to be formed by the cross-sectional view of mask side wall；
Fig. 6 is the cross-sectional view of sacrificial layer after removal bottom layer anti-reflection layer；
Fig. 7 to Figure 13 is the cross-sectional view of the forming process of the semiconductor structure of the embodiment of the present invention.
Specific implementation mode
As stated in the background art, the prior art be formed by mask side wall pattern it is bad, cause with the mask side wall
It is bad to etch the pattern layer to be etched for being formed by semiconductor structure.
By research, please refer to Fig.1 to Fig. 4, the sacrificial layer 101 is formed by photoetching process, specifically, the sacrificial layer
101 formation process includes：Expendable film is formed on 100 surface layer to be etched；Bottom antireflection is formed in the sacrifice film surface
Layer；Photoresist layer is formed on the bottom layer anti-reflection layer surface, the photoresist layer defines pair for needing to form sacrificial layer 101
Answer position；Using the photoresist layer as mask, bottom layer anti-reflection layer and expendable film are etched, is up to exposing layer to be etched 100
Only, sacrificial layer 101 is formed.
The bottom layer anti-reflection layer can avoid the sacrificial layer 101 during being subsequently etched back to mask layer 103
Pattern changes, moreover, the bottom layer anti-reflection layer during being etched back to while can be removed.However, please referring to
Fig. 5, if the bottom layer anti-reflection layer is removed during being etched back to, so that being etched back to the etch thicknesses of technique more
Greatly, the height for being formed by mask side wall 103a can be caused relatively low, make the mask side wall 103a be insufficient as etching it is to be etched
The mask of layer 100 is lost, the mask side wall 103a is easy to be removed during etching layer to be etched 100, or causes to etch
The opening pattern of formation is bad.
If however, removing the bottom layer anti-reflection layer before forming mask layer 103, then the bottom anti-reflective is removed
Penetrating the technique of layer can cause to damage to the pattern of the sacrificial layer 101.Specifically, referring to FIG. 6, being removed with dry etch process
The top dimension of the anti-reflecting layer, the sacrificial layer 101 reduces, and the side wall of the sacrificial layer 101 is relative to layer to be etched 100
Surface tilt.Then cause it is subsequently bad in the formed mask side wall pattern of the sidewall surfaces of the sacrificial layer 101, after influencing
Continuous etching layer to be etched 100 is formed by semiconductor structure pattern.
After further research, the present invention proposes a kind of forming method of semiconductor structure.Wherein, in bottom layer anti-reflection layer
Isolation film is formed between expendable film.Bottom layer anti-reflection layer, isolation film and expendable film are being etched with photoresist layer, and is forming isolation
After layer and sacrificial layer, the anti-reflecting layer positioned at insulation surface can be made to be removed from sacrificial layer surface by removing separation layer, and
The pattern of sacrificial layer is not damaged during removing the separation layer, and therefore, the pattern of the sacrificial layer is good, ruler
It is very little accurate.Moreover, because mask film can subsequently be made to be formed directly into the side wall and top surface of sacrificial layer, then it is etched back to cover
The height that film film is formed by mask side wall can be with the consistency of thickness of sacrificial layer, and the height for being formed by mask side wall will not
Reduced by transition, the mask side wall is made to be enough the mask layer to be etched as etching.To ensure that etching is described to be etched
It is good that layer is formed by semiconductor structure accurate size, pattern.
To make the above purposes, features and advantages of the invention more obvious and understandable, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Fig. 7 to Figure 13 is the cross-sectional view of the forming process of the semiconductor structure of the embodiment of the present invention.
Referring to FIG. 7, providing layer to be etched 200,200 surface layer to be etched has expendable film 201.
In the present embodiment, 200 surface layer to be etched forms dual autoregistration figure in the subsequent process, and with institute's shape
At dual autoregistration figure be mask, etching described layer to be etched 200, with formed needed for semiconductor structure.It is described to be etched
It includes one or more in polysilicon, metal material, dielectric material to lose the material of layer 200.Wherein, the metal material includes
Copper, tungsten or aluminium, the dielectric material include silica, silicon nitride, silicon oxynitride or amorphous carbon.
In one embodiment, described layer to be etched 200 it is formed in semiconductor substrate surface, the semiconductor substrate serves as a contrast for silicon
Bottom, silicon-Germanium substrate, silicon carbide substrates, silicon-on-insulator（SOI）Substrate, germanium on insulator（GOI）Substrate, glass substrate or III-
V compounds of group substrates（Such as gallium nitride or GaAs etc.）.Moreover, can also between the semiconductor substrate and layer to be etched 200
Enough form device layer（It is not shown）, the device layer includes semiconductor devices and the dielectric layer for being electrically isolated the semiconductor devices.
Wherein, the semiconductor devices includes transistor, resistor, capacitor, memory etc., and the semiconductor devices is constituting core
Piece or integrated circuit；The dielectric layer surrounds the semiconductor devices, to be electrically isolated semiconductor devices, the material of the dielectric layer
Material is one or more in silica, silicon nitride, silicon oxynitride, low-K dielectric material.Subsequently it is formed by certainly with the present embodiment
Alignment multiple graphics are mask etching layer to be etched 200, and layer to be etched 200 after etching are for as composition chip or integrated electricity
The part on road.
In another embodiment, the i.e. semiconductor substrate layer to be etched, the semiconductor substrate are silicon substrate, SiGe lining
Bottom, silicon carbide substrates, silicon-on-insulator（SOI）Substrate, germanium on insulator（GOI）Substrate, glass substrate or III-V compound
Substrate（Such as gallium nitride or GaAs etc.）.Autoregistration multiple graphics are subsequently formed by as etching semiconductor using the present embodiment
The mask of substrate.
The material of the expendable film 201 is amorphous carbon, bottom layer anti-reflection layer material or silicon nitride, and the expendable film
201 material is different from the material for the mask side wall being subsequently formed, thus in subsequently removal sacrificial layer, to the damage of mask side wall
Wound is smaller.Moreover, the material of the expendable film 201 is to be easily removed and be not likely to produce remaining material, ensure removing with this
After sacrificial layer, layer to be etched 200 and mask side wall clean surface.
In the present embodiment, the material of the expendable film 201 is amorphous carbon, and the technique for forming the expendable film 201 is
Chemical vapor deposition method or physical gas-phase deposition, and the technological temperature for forming the expendable film 201 be 0 degree Celsius~
200 degrees Celsius.Since the temperature for forming expendable film 201 is relatively low, during forming expendable film 201, to be etched
The damage for losing layer 200 is less, to ensure that the performance of the semiconductor structure formed with layer to be etched 200 is stablized.
In one embodiment, also there is buffer layer, the expendable film to be formed in the buffer layer on the surface layer to be etched
Surface.The buffer layer can avoid layer to be etched be etched from subtracting when being subsequently formed mask side wall and removal sacrificial layer
It is thin.When subsequently layer to be etched with mask side wall etching, so that the opening depth that etching is formed is easy to control, avoid that quarter occurred
Erosion, etching is incomplete or is formed in the problems such as opening depth of mask side wall both sides is inconsistent.The material of the buffer layer is with after
Continuous mask side wall or expendable film are different, such as polysilicon, and buffer layer is made relative to expendable film or mask side wall to there is etching to select
The formation process of selecting property, the buffer layer is physical vaporous deposition technique after chemical vapor deposition method.
Referring to FIG. 8, forming isolation film 202 on 201 surface of the expendable film.
The bottom layer anti-reflection layer and photoresist layer that the isolation film 202 is used to expendable film 201 be isolated be subsequently formed, after
It is continuous bottom layer anti-reflection layer to be made to be removed from sacrificial layer top surface, while will not be to sacrificial layer by removing isolation film 202
Pattern at damage, is being conducive to that subsequent etching layer to be etched 200 is made to be formed by semiconductor structure performance and stable appearance.
The material of the isolation film 202 is germanium oxide, and the germanium oxide can be removed with water, and water is for most of materials
Do not have etching power.In the present embodiment, the processing amorphous carbon of the expendable film 201, water do not have amorphous carbon
There is etching power, therefore subsequently the surface of sacrificial layer will not be caused to damage, make sacrificial layer after removing isolation film 202
Accurate size, stable structure.
In the present embodiment, the formation process of the isolation film 202 is atom layer deposition process, hot stove oxidation technology or chemistry
The thickness of gas-phase deposition, the separation layer 202 is 10 angstroms~1000 angstroms.Moreover, the temperature for forming the isolation film 202 is
10 degrees Celsius~400 degrees Celsius, since the temperature for forming the isolation film 202 is relatively low, forming the isolation film 202
In the process, it is not easy that the layer to be etched 200 chemically or physically properties made is made to change, and is not easy to described layer to be etched 200
It causes to damage.Semiconductor structure performance therefore, it is possible to subsequently be formed with 200 etching layer to be etched is stablized.
Referring to FIG. 9, forming bottom layer anti-reflection layer 203 on 202 surface of the isolation film and being located at bottom layer anti-reflection layer
The photoresist layer 204 on 203 surfaces, the photoresist layer 204 expose 203 surface of part bottom layer anti-reflection layer.
The photoresist layer 204 defines the corresponding position and structure for the sacrificial layer being subsequently formed.However, due to existing
The limitation of photoetching process accuracy can not make photoresist layer in the case where ensureing to be formed by 204 accurate size of photoresist layer
204 size further reduces, therefore causes to limit to the size reduction of semiconductor structure, be unfavorable for semiconductor devices into one
Step is integrated.In the present embodiment, the technique for forming subsequent mask side wall is self-aligned double patterning shape technique, can be precisely formed
In the regional extent of single photoresist layer, two accurate in size mask side walls are formed, are etched with the mask side wall layer to be etched
200, the size reduction and accurate size that are formed by semiconductor structure can be made.
Formed the photoresist layer 204 technique be photoetching process, in order to avoid in exposure process on 202 surface of isolation film
It reflects, bottom layer anti-reflection layer 203 is formed between the isolation film 202 and photoresist layer 204.The photoresist layer 204
Forming method with bottom layer anti-reflection layer includes：Bottom layer anti-reflection layer 203 is deposited on 202 surface of isolation film；In bottom antireflection
203 surface spin coating photoresist film of layer；Keep the photoresist film graphical using exposure technology, to form photoresist layer 204.
In the present embodiment, the material of the bottom layer anti-reflection layer 203 is the organic material of carbon containing oxygen element, forms the bottom
The technique of layer anti-reflecting layer is physical gas-phase deposition or chemical vapor deposition method, and forms the bottom layer anti-reflection layer
203 technological temperature is 0 degree Celsius~200 degrees Celsius.Wherein, the temperature for forming the bottom layer anti-reflection layer 203 is relatively low, therefore
It can avoid damaging to layer to be etched 200.
Referring to FIG. 10, being mask with the photoresist layer 204, the bottom layer anti-reflection layer 203 is etched（Such as Fig. 9 institutes
Show）, isolation film 202（As shown in Figure 9）With expendable film 201（As shown in Figure 9）, until exposing 200 surface layer to be etched,
Form bottom layer anti-reflection layer 203a, separation layer 202a and sacrificial layer 201a.
The etching technics is anisotropic dry etch process, and etching gas is with perpendicular to 200 surface layer to be etched
Direction perform etching, the surface for being formed by sacrificial layer 201a side walls relative to layer to be etched 200 is vertical.The sacrificial layer
The figure of 201a is consistent with the figure of photoresist layer 204, therefore the size of the sacrificial layer 201a is by photoetching process accuracy
Limitation.
In the present embodiment, the material of the expendable film 201 is amorphous carbon, the anisotropic dry etch process ginseng
Number includes：Etching gas includes ammonia, hydrogen and argon gas, and power is 800 watts~1000 watts, and air pressure is the millitorr of 80 millitorrs~120,
Wherein, the flow of ammonia be 200 standard milliliters/minute~300 standard milliliters/minute, hydrogen be 300 standard milliliters/minute~
500 standard milliliters/minute, argon gas are 0 standard milliliters/minute~300 standard milliliters/minute.
1 is please referred to Fig.1, the separation layer 202a is removed（As shown in Figure 10）, make the bottom layer anti-reflection layer 203a（Such as figure
Shown in 10）It is removed from the top surface of sacrificial layer 201a.
In the present embodiment, after forming sacrificial layer 201a, directly remove separation layer 202a, make photoresist layer 204 with
Bottom layer anti-reflection layer 203a is removed from the top surface of sacrificial layer 201a together, and technique is made to simplify.In one embodiment, it is removing
Before separation layer 202a, photoresist layer 204 is removed using cineration technics or wet clean process（As shown in Figure 10）.
In the present embodiment, the material of the separation layer 202a is germanium oxide, and the technique for removing the separation layer 202a is wet
Method etching technics, etching liquid are deionized water or the chemical solution containing deionized water.Wherein, germanium oxide can pass through deionization
Water removes, and deionized water will not etching sacrificial layer 201a or layer to be etched 200, therefore will not be to sacrificial layer 201a or to be etched
Layer 200 causes to damage.Even deionized water does not have etching for most of semi-conducting materials, dielectric material or metal material
Ability.
Due to removing separation layer 202a by deionized water, the pattern of the sacrificial layer 201a will not be damaged,
The size and structure for enabling the sacrificial layer 201a keep accurate, can ensure to be subsequently formed in sacrificial layer 201a sidewall surfaces
Mask side wall pattern is good.
In the present embodiment, the temperature of the wet-etching technology is 0 degree Celsius~100 degrees Celsius, the wet etching
The temperature of technique is relatively low, will not to layer to be etched 200 physically or chemically or pattern damages, while will not make
The pattern of sacrificial layer 201a changes.
2 are please referred to Fig.1, after removing the separation layer 202a, layer to be etched 200 in the both sides the sacrificial layer 201a
The sidewall surfaces of surface and sacrificial layer 201a form mask side wall 205.
Mask of the mask side wall 205 as subsequent etching layer to be etched 200.The formation work of the mask side wall 205
Skill is：Mask film is formed in sacrificial layer 201a and 200 surface of substrate；The mask film is etched back to until exposing to be etched
Until the top surface of 200 surface of layer and sacrificial layer 201a, mask side wall 205 is formed.
Wherein, formed mask film technique be chemical vapor deposition method or physical deposition process, it is described to be etched back to work
Skill is anisotropic dry etch process.The width for the being parallel to 200 surface direction layer to be etched i.e. institute of the mask side wall 205
The thickness of mask film is stated, therefore the width for being parallel to 200 surface direction layer to be etched of the mask side wall 205 is covered by being formed
The depositing operation of film film determines.Since the size of the mask side wall 205 is not necessarily to be limited by photoetching process accuracy, and
And since the mask film thickness that depositing operation is formed can be smaller, the size for being formed by mask side wall 205 can be made
It reduces, the size for being subsequently formed by semiconductor structure for mask etching layer to be etched 200 with the mask side wall 205 is also corresponding
It reduces.The mask side wall 205 is formed in the sidewall surfaces of sacrificial layer 201a, i.e., the described mask by depositing and being etched back to technique
Side wall 205 is self-aligned double patterning shape structure.
In the present embodiment, the material of the mask side wall 205 is silica, the thickness of the mask film is 10 nanometers~
50 nanometers, formed the mask film technique be chemical vapor deposition method, atom layer deposition process or hot stove oxidation technology,
And the temperature for forming the mask film is 25 degrees Celsius~300 degrees Celsius.Due to the mask film formation temperature compared with
It is low therefore smaller to layer to be etched 200 damage, it can ensure the semiconductor structure performance formed with 200 etching layer to be etched
Stablize.Moreover, because the formation temperature of the mask film is relatively low, keep the synthesis speed of the mask film slower, then institute's shape
At mask film thickness it is more easy to control, keep the size for being formed by mask side wall 205 more accurate.
In addition, the technique for being etched back to mask film is anisotropic dry etch process, etching gas includes CHF3、
CF4、O2、Ar.Since the etching direction of the dry etch process is perpendicular to 200 surface layer to be etched, sacrifice can be removed
The mask film of layer 201a top surfaces and 200 surface layer to be etched, while retaining positioned at the part of 201 sidewall surfaces of sacrificial layer
Mask film, to form mask side wall 205.
Moreover, the technique that is etched back to needs to expose the surface of sacrificial layer 201a, due to the direct shape of mask film
At in the top surface of sacrificial layer 201a, therefore the thickness of the i.e. described mask film of the etch thicknesses for being etched back to technique, because
This is formed by the highly consistent of the height of mask side wall 205 and sacrificial layer 201a, and the mask side wall 205 is enough as etching
Layer to be etched 200 mask, and be not easy during etching layer to be etched 200 while being removed, advantageously ensure that etching waits for
Etch layer 200 is formed by the accurate size of semiconductor structure, stable appearance.
3 are please referred to Fig.1, after forming mask side wall 205, removes the sacrificial layer 201a（As shown in figure 12）；With institute
The pseudo- mask of mask side wall 205 is stated, etching described layer to be etched 200 forms opening 206 in described layer to be etched 200.
The technique for removing the sacrificial layer 201a is dry etch process or wet-etching technology, it is preferred that wet etching
The etch rate of technique, the wet-etching technology is fast, and selectivity is preferably, to layer to be etched 200 or mask side wall 205
The damage on surface is smaller.In the present embodiment, the material of the sacrificial layer 201a is amorphous carbon, and the amorphous carbon can also
It is removed with cineration technics, the gas of cineration technics is oxygen, and the cineration technics is smaller to the damage of mask side wall 205.
It is anisotropic dry etch process to etch layer to be etched 200 technique, and etching direction is perpendicular to be etched
200 surface of layer is lost, the figure for being formed by 206 top of opening is parallel to 200 surface direction layer to be etched by mask side wall 202a
Figure determine.The etching technics is depending on layer to be etched 200 material and the opening depth of required formation.
Although sacrificial layer 201a is formed by lithography and etching technique, limited by photoetching process accuracy, it is described
Mask side wall 205 is formed in the sidewall surfaces of sacrificial layer 201a by deposition and etching technics, therefore list can be precisely formed
In the regional extent of a sacrificial layer 201a, the mask side wall 205 of double amount can be formed, mask side wall 205 is formed by
Size is smaller, and the distance between adjacent mask side wall 205 is smaller.Layer to be etched 200 are etched with the mask side wall 205, is had
Conducive to the integrated level of raising semiconductor devices or integrated circuit.
It should be noted that the forming method of the semiconductor structure of the present embodiment applies also for autoregistration multiple graphics, example
Such as the triple figures of autoregistration or autoregistration quadruple figure.
In the present embodiment, isolation film is formed between bottom layer anti-reflection layer and expendable film.Bottom is being etched with photoresist layer
Anti-reflecting layer, isolation film and expendable film, and after forming separation layer and sacrificial layer, can make to be located at separation layer by removing separation layer
The anti-reflecting layer on surface is removed from sacrificial layer surface, and the pattern of sacrificial layer will not be by during removing the separation layer
Damage, therefore, the pattern of the sacrificial layer is good, accurate size.Moreover, because subsequently mask film can be made to be formed directly into
The side wall and top surface of sacrificial layer, then be etched back to mask film be formed by the height of mask side wall can be with the thickness of sacrificial layer
Degree is consistent, and being formed by the height of mask side wall will not be reduced by transition, so that the mask side wall is enough to be etched as etching
The mask of layer.To ensure that etching, described layer to be etched to be formed by semiconductor structure accurate size, pattern good.
Although present disclosure is as above, present invention is not limited to this.Any those skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (6)
1. a kind of forming method of semiconductor structure, which is characterized in that including：
There is provided layer to be etched, it is amorphous carbon that the surface layer to be etched, which has expendable film, the material of the expendable film,；
Isolation film is formed in the sacrifice film surface, the material of the isolation film is germanium oxide, the formation temperature of the isolation film
It is 10 degrees Celsius~400 degrees Celsius；
Bottom layer anti-reflection layer and photoresist layer positioned at bottom layer anti-reflection layer surface are formed in the isolation film surface, it is described
Photoresist layer exposes part bottom layer anti-reflection layer surface, and the material of the bottom layer anti-reflection layer is organic material of carbon containing oxygen element
Material；
Using the photoresist layer as mask, the bottom layer anti-reflection layer, isolation film and expendable film are etched, until exposing to be etched
Until layer surface, separation layer and sacrificial layer are formed；
The separation layer is removed, so that the bottom layer anti-reflection layer is removed from the top surface of sacrificial layer, removes the separation layer
Technique is wet-etching technology, and etching liquid is deionized water or the chemical solution containing deionized water, the wet-etching technology
Temperature be 0 degree Celsius~100 degrees Celsius.
2. the forming method of semiconductor structure as described in claim 1, which is characterized in that the formation process of the isolation film is
The thickness of atom layer deposition process, hot stove oxidation technology or chemical vapor deposition method, the isolation film is 10 angstroms~1000 angstroms.
3. the forming method of semiconductor structure as described in claim 1, which is characterized in that form the sacrificial layer or bottom is anti-
The technological temperature in reflecting layer is 0 degree Celsius~200 degrees Celsius.
4. the forming method of semiconductor structure as described in claim 1, which is characterized in that further include：Removing the isolation
After layer, mask side wall is formed on the surface layer to be etched of the sacrificial layer both sides and the sidewall surfaces of sacrificial layer；It is being formed
After mask side wall, the sacrificial layer is removed；With the mask side wall puppet mask, etching is described layer to be etched, described to be etched
It loses and forms opening in layer.
5. the forming method of semiconductor structure as claimed in claim 4, which is characterized in that the formation process of the mask side wall
For：Mask film is formed in sacrificial layer and substrate surface；Be etched back to the mask film until expose surface layer to be etched and
Until the top surface of sacrificial layer, mask side wall is formed.
6. the forming method of semiconductor structure as claimed in claim 5, which is characterized in that the material of the mask film is oxygen
The formation process temperature of SiClx, the mask film is 25 degrees Celsius~300 degrees Celsius.
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| Publication number | Priority date | Publication date | Assignee | Title |
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