CN104700900A - Detecting system and method for storage single-event upset effect - Google Patents

Detecting system and method for storage single-event upset effect Download PDF

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Publication number
CN104700900A
CN104700900A CN201510142211.3A CN201510142211A CN104700900A CN 104700900 A CN104700900 A CN 104700900A CN 201510142211 A CN201510142211 A CN 201510142211A CN 104700900 A CN104700900 A CN 104700900A
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data
test
retaking
year
grade
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CN104700900B (en
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郭晓强
张凤祁
陈伟
郭红霞
罗尹虹
赵雯
丁李利
肖尧
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Northwest Institute of Nuclear Technology
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Abstract

The invention relates to a detecting system and method for the storage single-event upset effect. The detecting method includes the steps that in the process of reading back the logic state of a storage node, a read back verification method is used two or more times, through comparison of read back data of previous time and read back data of the next time, whether the storage node is in a disturbed state or not is judged, if yes, read back is carried out again, once-again read back is abandoned until the storage state is stable or under an allowed total measuring error, and the previous read back data are accepted. The problem that in existing single-event effect detection, single-event upset and transient disturbance cannot be distinguished is effectively solved, the detecting system has the capacity of carrying out single-event effect tests in a strong-disturbance environment, and the credibility of preestimating the capacity for resisting single-event upset of a device is improved.

Description

A kind of detection system of storer Single event upset effecf and method
Technical field
The invention belongs to irradiation effects field, relate to the detection method of storer Single event upset effecf, be related specifically to the discriminating method of storer Single event upset effecf and extraneous ringing effect.
Background technology
The impact of space electronics system raying environment, may the logic state in digital circuit change.The change of these logic states can cause system works abnormal, is the content of the necessary stress test of space microelectronic system and protection.Wherein the production process of Single event upset effecf (SEU) is: the sensitive nodes of various high energy particles (high energy proton, α particle, heavy ion etc.) the incident storer in space, radiation induced charge is produced at Nodes, after these induced charges are collected by the electrode of node, just produce interference current, the ablation process of this interference current and storer is similar.When interference current is enough strong, the logic state that node will be made originally to store overturns, and the state as stored is become " 1 " from " 0 ", or is become " 0 " from " 1 "; When interference current is more weak, the logic state that node stores originally is being restored after the fluctuation of short time, i.e. single-particle ringing process.
Except single-particle ringing factor, the State Transferring of digital circuit, the State Transferring, static discharge phenomenon etc. of peripheral high power device all can have influence on the duty of measuring system, thus produce considerable influence to test findings.
Space electronics system, when selecting storer, must understand the anti-single particle effect capability of device, and the Single event upset effecf test under radiation environment is the technical way evaluated the anti-single particle effect capability of device.In process of the test, need to detect the store status in memory cell incessantly, and compare with correct store status, to judge whether store status overturns.Can not accomplish synchronous owing to detecting the state of storer with the particle incidence in radiation environment, therefore, the result that memory state detects just is subject to the impact of ringing, thus has influence on the evaluation of device anti-single particle effect capability.
In Single event upset effecf test in the past, take the logic state directly reading memory node, do not consider the instantaneous disturbance factor of ion incidence.Because instantaneous disturbance factor is random generation, ignores this factor and will cause underestimating the anti-single particle effect capability of device.
As when reading the data of certain unit of storer, by extraneous strongly disturbing effect, there is error code in sense data, thus the roll data having influence on statistics is (relevant to the figure place that data encoding occurrence logic overturns, actual conditions are single-particle inversions that storage unit does not occur because high energy particle incidence causes, and only there occurs the reading procedural error under strong jamming).When again reading the data of this unit, this sense data and a front number of bit errors are according to inconsistent, and the reading procedural error that strong jamming is caused is recorded again, and namely an interference effect can produce twice error statistics.
Summary of the invention
For the deficiency that above-mentioned single particle effect test method exists, the object of the present invention is to provide one to be applicable to storer Single event upset effecf detection method, effectively can be separated the temporary disturbance that produces due to other interference source to the impact of test result.
A detection method for storer Single event upset effecf, its special character is, comprises the following steps:
Step 1] initializes memory:
To node write given datas all in storer;
Step 2] setup test:
Initialization is carried out to the global measuring parameter in test process;
Step 3] prepare retaking of a year or grade checking:
Retaking of a year or grade is controlled register set to 0;
Step 4] back read data:
Data real-time status is taken out from the node of storer assigned address, and stored in real time data impact damper;
Step 5] cumulative retaking of a year or grade control register:
Retaking of a year or grade controls register and adds 1 counting;
Step 6] first time retaking of a year or grade judgement:
Judge that retaking of a year or grade controls whether register is 1; If be 1, be then first time retaking of a year or grade, enter step 11; If be not 1, then enter step 7;
Step 7] maximum retaking of a year or grade judgement:
Judge that cumulative retaking of a year or grade controls whether register is maximum retaking of a year or grade number; If so, be then last retaking of a year or grade, enter step 9; If NO, then step 8 is entered;
Step 8] node state judgement:
By compare real time data impact damper and the data of previous data buffer whether consistent come decision node state whether stablize; If data are identical in two impact dampers, are then stable, the data in real time data impact damper delivered in back read data impact damper, jumps to step 9; If data are different, are then disturbance state, by the data in real time data impact damper stored in previous data buffer, jump to step 4;
Step 9] statistics:
Relatively back read data impact damper and the data initially write, analytic statistics always makes mistakes figure place;
Step 10] task completes judgement:
Judge whether test assignment completes according to current address; If do not completed, then prepare next test address, jump to step 4; Otherwise stop this testing;
Step 11] prepare retaking of a year or grade again:
By the data in current data buffer stored in previous data buffer, jump to step 4.
Above-mentioned global measuring parameter comprises:
, for recording in each test assignment, there is the total bit of single-particle inversion in upset register ErrorCounter;
Operation start address BeginAddr, current address CurrentAddr, halt address EndAddr, for controlling beginning and the end of test assignment;
The start time TimeBegin of retaking of a year or grade test, the end time TimeStop of retaking of a year or grade test, for recording the duration of test process;
Retaking of a year or grade controls register RereadCounter, for recording the number of times of retaking of a year or grade under each test vector;
Maximum retaking of a year or grade times N max is constant, Nmax >=3;
Data BusData, real time data impact damper CurrentData, previous data buffer LastData and back read data impact damper RereadBuffer on data bus, be respectively used to represent collect in memory data bus data, storer time real data, last time image data and the back read data finally determined.
A detection system for storer Single event upset effecf, its special character is, comprises and is positioned at host computer between measurement and test macro;
Described test macro comprises test controller, retaking of a year or grade controller, writing controller and time schedule controller;
Described host computer, to the specifying information of test controller sending measuring task, comprises test chip object, tests initial location, class of operation, correct matched data;
Described test controller is based on the specifying information measuring task, form one group of test vector list, each test vector points to one of memory under test and measures address, calls retaking of a year or grade controller and writing controller respectively realize management to the task of measurement and control according to class of operation; Described class of operation is divided into read back operation and write operation;
Described retaking of a year or grade controller and writing controller are in units of test vector, in conjunction with specific test operation, realize the control module to the read-write operation of target devices by time schedule controller;
Described time schedule controller for generation of the pumping signal required for storage operation, and gathers the control module of memory cell data in suitable mode, be the interface of measuring system and memory under test.
Above-mentioned read back operation comprises the following steps: test controller obtains the back read data under given measurement address, and compares with correct matched data, mistake of statistics data; After all test vectors are complete, final statistics is back to host computer.
The present invention compared with prior art beneficial effect is:
The present invention adopts the screening techniques of single-particle inversion and glitch, to the existence produced because of other interference source in test process and the temporary disturbance phenomenon introduced detect, it is characterized in that in the process of retaking of a year or grade memory node logic state, adopt the retaking of a year or grade verification method of more than twice or twice, by the comparison of twice back read data in front and back, judge whether memory node state is in the state of being disturbed, if, then retaking of a year or grade again, until store status is stablized or abandon retaking of a year or grade again under the condition of the overall measurement error allowed, accept previous back read data.
Present invention efficiently solves during present single particle effect detects the problem cannot distinguishing single-particle inversion and glitch, make test macro possess the ability of carrying out single particle effect test under strong interference environment, improve the confidence level that device anti-single particle overturn ability is estimated.
Detection method, can screen effectively due to the temporary disturbance that other interference source produces in Single event upset effecf measuring process, reduces the uncertainty measured.
Accompanying drawing explanation
Fig. 1 is storer Single event upset effecf pilot system and test macro pie graph thereof;
Fig. 2 is single particle effect Turnover testing method step figure.
Embodiment
As shown in Figure 2, the present invention is applicable to the Single event upset effecf test under strong jamming condition, and pilot system comprises host computer between measurement and test macro, the memory under test between irradiation and particle beam.Wherein, in the test system hardware between measuring, Single event upset effecf measuring method of the present invention is realized.Relevant system hardware forms primarily of test controller, retaking of a year or grade controller, writing controller and time schedule controller.
Test controller is for realizing measuring the management of task and control, host computer, to the detail of test controller sending measuring task, as test chip object, tests the information such as initial location, class of operation (being divided into retaking of a year or grade and write), correct matched data.Test controller is measured based on task details parameter by these, forms one group of test vector list, and a measurement address of each test vector sensing memory under test, calls retaking of a year or grade controller respectively according to class of operation and writing controller completes specific operation.If read back operation, the back read data that test controller will obtain under given measurement address, and compare with correct matched data, mistake of statistics data.After all test vectors are complete, final statistics is back to host computer.
Retaking of a year or grade controller and writing controller are in units of test vector, in conjunction with specific test operation, are realized the control module of the read-write operation to target devices by time schedule controller, are the topworkies mainly realizing test logic and method of testing.Method of the present invention is exactly by solidifying specific method to improve the examination to Single event upset effecf and single-particle ringing effect in retaking of a year or grade control procedure in this topworks.
Time schedule controller for generation of the pumping signal required for storage operation, and gathers the control module of memory cell data in suitable mode, be the interface of measuring system and measured device.
In the present invention, mainly for the randomness single-particle ringing phenomenon occurred in data readback process, devise a kind of Single event upset effecf method of testing, the method is solidificated in retaking of a year or grade controller.
Wherein crucial several parameters are:
ErrorCounter overturns register, for recording in each test assignment, occurs the total bit of single-particle inversion.
BeginAddr, CurrentAddr, EndAddr operate start address, current address, halt address, for controlling beginning and the end of test assignment.
The start time of TimeBegin, TimeStop retaking of a year or grade test, end time, for recording the duration of test process.
RereadCounter retaking of a year or grade controls register, for recording the number of times of retaking of a year or grade under each test vector.
The maximum retaking of a year or grade number of times of Nmax is constant.Nmax is larger, single-particle inversion and temporary disturbance discrimination capabilities stronger, but in order to avoid the seemingly-dead phenomenon of system (long periodic noise source effect under, system testing task can not normally complete), consider under certain systematic measurement error allows, Nmax >=3.
BusData, CurrentData, LastData, RereadBuffer are respectively: data, real time data impact damper, previous data buffer and back read data impact damper on data bus, be respectively used to represent collect in memory data bus data, storer time real data, last time image data and the back read data finally determined.
Specific implementation step is as follows:
1) initializes memory.
To nodes write given data (as 8 bit memories can write 0x55H, 0xAAH, 0x00H, 0xFFH etc.) all in storer;
2) setup test.
Initialization is carried out to the global measuring parameter in test process, mistake register ErrorCounter=0, arrange retaking of a year or grade start address BeginAddr, current retaking of a year or grade address CurrentAddr=BeginAddr, retaking of a year or grade halt address EndAddr, arrange retaking of a year or grade test start time TimeBegin etc.;
3) retaking of a year or grade checking is prepared.
Retaking of a year or grade controls register RereadCounter=0;
4) back read data.
Pass through time schedule controller, for storer provides necessary read operation pumping signal (being determined by the operation manual of storer), from the node of storer assigned address (for the coding of current retaking of a year or grade address CurrentAddr is determined), take out node store data (coding of sampled data bus B usData), and stored in real time data impact damper CurrentData=BusData;
5) cumulative retaking of a year or grade controls register.
Retaking of a year or grade controls register RereadCounter=RereadCounter+1;
6) first time retaking of a year or grade judges.
Judge that retaking of a year or grade controls whether register RereadCounter is 1.If be 1, be then first time retaking of a year or grade, enter step 11); If be not 1, then enter step 7);
7) maximum retaking of a year or grade judges.
Judge that cumulative retaking of a year or grade controls whether register RereadCounter is Nmax.If so, be then last retaking of a year or grade, enter step 9); If NO, then step 8 is entered);
8) node state judges.
By compare real time data impact damper CurrentData and the data of previous data buffer LastData whether consistent come decision node state whether stablize.If data are identical in two impact dampers, are then stable, the data in real time data impact damper delivered to RereadBuffer=CurrentData in back read data impact damper, jumps to step 9); If data are different, are then disturbance state, by the data in real time data impact damper stored in LastData=CurrentData in previous data buffer, jump to step 11);
9) statistics.
Back read data impact damper RereadBuffer and correct matched data compare, and analyze the upset figure place N obtaining mistake, upgrade the ErrorCounter=ErrorCounter+N that always counts.
10) task completes judgement.
Judge that whether CurrentAddr is equal with halt address EndAddr, to judge whether test assignment completes.If equal, represent that test assignment does not complete, then prepare next test address, address usually can be adopted from the mode increased, i.e. CurrentAddr=CurrentAddr+1, jumps to step 4); Otherwise stop this testing.
11) retaking of a year or grade is again prepared.
By the data in current data buffer stored in LastData=CurrentData in previous data buffer, jump to step 4).

Claims (4)

1. a detection method for storer Single event upset effecf, is characterized in that, comprises the following steps:
Step 1] initializes memory:
To node write given datas all in storer;
Step 2] setup test:
Initialization is carried out to the global measuring parameter in test process;
Step 3] prepare retaking of a year or grade checking:
Retaking of a year or grade is controlled register set to 0;
Step 4] back read data:
Data real-time status is taken out from the node of storer assigned address, and stored in real time data impact damper;
Step 5] cumulative retaking of a year or grade control register:
Retaking of a year or grade controls register and adds 1 counting;
Step 6] first time retaking of a year or grade judgement:
Judge that retaking of a year or grade controls whether register is 1; If be 1, be then first time retaking of a year or grade, enter step 11; If be not 1, then enter step 7;
Step 7] maximum retaking of a year or grade judgement:
Judge that cumulative retaking of a year or grade controls whether register is maximum retaking of a year or grade number; If so, be then last retaking of a year or grade, enter step 9; If NO, then step 8 is entered;
Step 8] node state judgement:
By compare real time data impact damper and the data of previous data buffer whether consistent come decision node state whether stablize; If data are identical in two impact dampers, are then stable, the data in real time data impact damper delivered in back read data impact damper, jumps to step 9; If data are different, are then disturbance state, by the data in real time data impact damper stored in previous data buffer, jump to step 4;
Step 9] statistics:
Relatively back read data impact damper and the data initially write, analytic statistics always makes mistakes figure place;
Step 10] task completes judgement:
Judge whether test assignment completes according to current address; If do not completed, then prepare next test address, jump to step 4; Otherwise stop this testing;
Step 11] prepare retaking of a year or grade again:
By the data in current data buffer stored in previous data buffer, jump to step 4.
2. the detection method of storer Single event upset effecf according to claim 1, is characterized in that:
Described global measuring parameter comprises:
, for recording in each test assignment, there is the total bit of single-particle inversion in upset register ErrorCounter;
Operation start address BeginAddr, current address CurrentAddr, halt address EndAddr, for controlling beginning and the end of test assignment;
The start time TimeBegin of retaking of a year or grade test, the end time TimeStop of retaking of a year or grade test, for recording the duration of test process;
Retaking of a year or grade controls register RereadCounter, for recording the number of times of retaking of a year or grade under each test vector;
Maximum retaking of a year or grade times N max is constant, Nmax >=3;
Data BusData, real time data impact damper CurrentData, previous data buffer LastData and back read data impact damper RereadBuffer on data bus, be respectively used to represent collect in memory data bus data, storer time real data, last time image data and the back read data finally determined.
3. a detection system for storer Single event upset effecf, is characterized in that, comprises and is positioned at host computer between measurement and test macro;
Described test macro comprises test controller, retaking of a year or grade controller, writing controller and time schedule controller;
Described host computer, to the specifying information of test controller sending measuring task, comprises test chip object, tests initial location, class of operation, correct matched data;
Described test controller is based on the specifying information measuring task, form one group of test vector list, each test vector points to one of memory under test and measures address, calls retaking of a year or grade controller and writing controller respectively realize management to the task of measurement and control according to class of operation; Described class of operation is divided into read back operation and write operation;
Described retaking of a year or grade controller and writing controller are in units of test vector, in conjunction with specific test operation, realize the control module to the read-write operation of target devices by time schedule controller;
Described time schedule controller for generation of the pumping signal required for storage operation, and gathers the control module of memory cell data in suitable mode, be the interface of measuring system and memory under test.
4. the detection system of storer Single event upset effecf according to claim 3, is characterized in that:
Described read back operation comprises the following steps: test controller obtains the back read data under given measurement address, and compares with correct matched data, mistake of statistics data; After all test vectors are complete, final statistics is back to host computer.
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CN106847330A (en) * 2016-12-29 2017-06-13 西北核技术研究所 A kind of ferroelectric memory anti-single particle overturns reinforcement means
CN107025921A (en) * 2015-12-29 2017-08-08 英飞凌科技股份有限公司 Storage arrangement and the method for driving storage arrangement
CN107886990A (en) * 2017-11-06 2018-04-06 北京时代民芯科技有限公司 The method of testing and system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit
CN117555721A (en) * 2024-01-12 2024-02-13 深圳疆泰科技有限公司 Bit flipping processing method and device for aircraft FPGA

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CN107025921A (en) * 2015-12-29 2017-08-08 英飞凌科技股份有限公司 Storage arrangement and the method for driving storage arrangement
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CN117555721A (en) * 2024-01-12 2024-02-13 深圳疆泰科技有限公司 Bit flipping processing method and device for aircraft FPGA
CN117555721B (en) * 2024-01-12 2024-05-07 深圳疆泰科技有限公司 Bit flipping processing method and device for aircraft FPGA

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