CN107886990A - The method of testing and system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit - Google Patents
The method of testing and system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit Download PDFInfo
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- CN107886990A CN107886990A CN201711076760.0A CN201711076760A CN107886990A CN 107886990 A CN107886990 A CN 107886990A CN 201711076760 A CN201711076760 A CN 201711076760A CN 107886990 A CN107886990 A CN 107886990A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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Abstract
The method of testing and system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit, test patterns are write to the SRAM wholes address, SRAM described in retaking of a year or grade obtains retaking of a year or grade value, perform retaking of a year or grade value it is non-with test patterns, test patterns it is non-with retaking of a year or grade Value Operations, number with " 1 " in operating result binary code twice is tried to achieve using N=N＆ (N 1) algorithm, and add up respectively, make carbon copies original test patterns to tested address.The SRAM next addresses are tested, until traveling through the SRAM wholes address.SRAM wholes address described in retaking of a year or grade is repeated, until two accumulation result sums reach default inverse values or the total fluence of irradiation reaches default fluence, terminates experiment.Two final accumulation results represent that " 1 " arrives " 0 " upset number, " 0 " arrives " 1 " upset number respectively, and sum of the two represents single-particle inversion sum.The present invention innovatively realizes the test function of the incorgruous single-particle inversion of multidigit, overturns manifolding step by increasing, is effectively improved test accuracy, and simplify experiment process.
Description
Technical field
The present invention relates to single particle effect experimental technique field, more particularly to a kind of microprocessor embedded SRAM multidigit are incorgruous
The method of testing and system of single-particle inversion.
Background technology
With the diminution of process and the raising of integrated level, single particle effect of the integrated circuit in Space Radiation Effects
Become more and more obvious.Microprocessor is the core component in Spacecraft Electronic system, and wherein embedded SRAM accounts for whole core
The 50%~60% of piece area, it is to one of most sensitive part of single event.Wherein, single-particle inversion is most common single-particle
One of effect, it is the important indicator for examining circuit anti-single particle ability.
China Patent Publication No. CN 105590652A, publication date are 2016.05.18, and entitled " SRAM neutron single-particles are imitated
Answer test method " in disclose a kind of single particle effect test method, the invention uses carries out letter by reading back result and write-in value
Digital ratio compared with mode count the upset number of generation, it is disadvantageous in that：When reading back result is not carried out to overturn digit statistics,
Reduce upset statistical accuracy；Second, not carrying out write-back (initial data) to the data overturn, it is existing to there is upset accumulation
As increasing statistical error；Third, this method does not possess the incorgruous Turnover testing ability of single-particle, fourth, being needed during experiment more
Secondary unlatching particle accelerator, operating process are complicated.
The content of the invention
The technology of the present invention solves problem：In place of overcome the deficiencies in the prior art, there is provided a kind of microprocessor embeds
The method of testing and system of the incorgruous single-particle inversion of SRAM multidigits, this method are non-with test patterns, test patterns by performing retaking of a year or grade value
Non- and retaking of a year or grade Value Operations, and the increase copy operation of the data address to overturning are accurate so as to overcome Multiple-bit upsets statistics
The shortcomings that low, particle upset accumulates is spent, while adds the statistical function that " 0 " arrives " 1 " upset number and " 1 " arrives " 0 " upset number, and
Whole experiment process simplifies experiment process without repeated priming particle accelerator.
The present invention technical solution be：
A kind of method of testing and system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit, comprise the following steps：
(1) configuration of microprocessor embedded SRAM is initialized, sets the first upset counting SEU1_0, the second upset to count
SEU0_1 and upset tale SEU_total, the irradiation test of microprocessor embedded SRAM is carried out afterwards；
(2) test patterns are write to whole addresses of the SRAM；
(3) data of SRAM first address described in retaking of a year or grade, obtain retaking of a year or grade value；
(4) the retaking of a year or grade value step-by-step is negated, then carries out step-by-step and operation with the test patterns, obtain among first
Value；
(5) the test patterns step-by-step is negated, then carries out step-by-step and operation with the retaking of a year or grade value, obtain among second
Value；
(6) if the first median and the second median are equal to 0, step (7) is performed, otherwise, calculates the first upset
The value that the upsets of SEU1_0 and second count SEU0_1 is counted, and original test patterns are made carbon copies to current address；
(7) next address of SRAM described in retaking of a year or grade, repeat step (4)~(6), until traversal SRAM wholes address, meter
Upset tale SEU_total value is calculated, and the upset of output first counts SEU1_0, the second upset counts SEU0_1 and overturns total
Count SEU_total value；
(8) repeat step (3)~(7), until output switching activity tale reaches default inverse values or the total fluence of irradiation reaches
To default fluence, into step (9)；
(9) the first upset of last time output counts SEU1_0, the second upset counts SEU0_1 and upset tale
SEU_total value, represent that " 1 " arrives " 0 " upset number, " 0 " arrives " 1 " upset number and particle upset sum respectively, it is micro- so as to complete
The test of the incorgruous single-particle inversion of processor embedded SRAM multidigit.
First upset described in step (1) counts SEU1_0, the second upset counts SEU0_1 and upset tale SEU_
Total is initialized as 0.
Test patterns are any binary number in the step (2).
The test patterns preferably use 55 yards or AA codes.
Calculate the first upset and count the value that the upsets of SEU1_0 and second count SEU0_1, be specially：
(5.1) number Count0, Count1 of " 1 " is tried to achieve in the first median and the second median respectively；
(5.2) value that Count0 is obtained that adds up is the value that the first upset counts SEU1_0；
(5.3) value that Count1 is obtained that adds up is the value that the second upset counts SEU0_1.
Step (5.1) calculates number Count0, Count1 of " 1 " in the first median and the second median, specifically using N
=N＆ (N-1) algorithm, wherein N are any binary number.
The value of the upset tale SEU_total is that the first upset counts the upset countings of SEU1_0 and second SEU0_1
Sum.
During step (3)~(8) are performed, tested SRAM electric current is also monitored simultaneously, when electric current exceedes breech lock threshold
To its current limliting during value, and prompt that single event latch-up occurs.
The test system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit, including：Irradiation test system and data
Processing system；Irradiation test system is used to carry out irradiation test to microprocessor embedded SRAM, and data handling system is according to above-mentioned
Method of testing is tested the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit.
Compared with the prior art, the invention has the advantages that：
(1) Multiple-bit upsets statistical function is added for the address of single-particle inversion occurs, while adds manifolding process,
Multiple-bit upsets and the statistical error that upset accumulation is brought are effectively prevent, drastically increases accuracy in detection.
(2) " 1 " is added during testing arrive " 0 " upset number, " 0 " and arrive " 1 " and overturn number statistical function, it is asymmetric to use
The Single event upset effecf detection that the single-particle of form reinforces memory cell has important directive significance.
(3) entirely experiment process without repeated priming particle accelerator, short form test process, reduces experimentation cost.
Brief description of the drawings
Fig. 1 is the incorgruous single-particle inversion method of testing flow chart of microprocessor embedded SRAM multidigit of the present invention；
Fig. 2 is the incorgruous single-particle inversion test principle figure of microprocessor embedded SRAM multidigit of the present invention.
Embodiment
As shown in figure 1, for the measuring technology difficult point of single-particle inversion in the prior art, the present invention proposes a kind of micro- place
The method of testing of the incorgruous single-particle inversion of device embedded SRAM multidigit is managed, is comprised the following steps：
(1) configuration of microprocessor embedded SRAM is initialized, sets the first upset counting SEU1_0, the second upset to count
SEU0_1 and upset tale SEU_total, the irradiation test of microprocessor embedded SRAM is carried out afterwards；
First upset counts SEU1_0, the second upset counts SEU0_1 and upset tale SEU_total is equivalent to variable,
It is initialized as 0.
(2) test patterns are write to whole addresses of the SRAM；Test patterns are any binary number, it is preferred to use 55 yards or
AA codes.
(3) data of SRAM first address described in retaking of a year or grade, obtain retaking of a year or grade value；
(4) the retaking of a year or grade value step-by-step is negated, then carries out step-by-step and operation with the test patterns, obtain among first
Value；
(5) the test patterns step-by-step is negated, then carries out step-by-step and operation with the retaking of a year or grade value, obtain among second
Value；
(6) if the first median and the second median are equal to 0, step (7) is performed, otherwise, calculates the first upset
The value that the upsets of SEU1_0 and second count SEU0_1 is counted, and original test patterns are made carbon copies to current address；
Calculate the first upset and count the value that the upsets of SEU1_0 and second count SEU0_1, be specially：
(a) number Count0, Count1 of " 1 " is tried to achieve in the first median and the second median respectively；Specifically use N=
N＆ (N-1) algorithm, wherein N are any binary number.
N=N＆ (N-1) algorithm C code is described as follows：
unsigned int func(unsigned int N)
{
Unsigned int n=0；
For (n=0；N；n++)
N=N＆ (N-1)；
return n；
}
Calculating process is described as follows：
Count initialized n is 0, and circulation performs N=N＆ (N-1), until N jumps out circulation equal to 0, function return value n is
The number of " 1 " in required binary number.
(b) value that Count0 is obtained that adds up is the value that the first upset counts SEU1_0；
(c) value that Count1 is obtained that adds up is the value that the second upset counts SEU0_1.
(7) next address of SRAM described in retaking of a year or grade, repeat step (4)~(6), until traversal SRAM wholes address, meter
(the first upset counts the upset counting SEU0_1 sums of SEU1_0 and second, every time circulation to calculation upset tale SEU_total value
Circulation performs step 4~6, can all generate new SEU1_0, SEU0_1 value, and step 7 calculates SEU_total=SEU1_0 here
+ SEU0_1, use newest SEU1_0, SEU0_1 once obtained), and export the first upset and count SEU1_0, second turn over
Turn to count SEU0_1 and overturn tale SEU_total value；
(8) repeat step (3)~(7), until output switching activity sum reaches default inverse values or the total fluence of irradiation reaches
Default fluence, into step (9)；
(9) the first upset of last time output counts SEU1_0, the second upset counts SEU0_1 and upset tale
SEU_total value, represent that " 1 " arrives " 0 " upset number, " 0 " arrives " 1 " upset number and particle upset sum respectively, it is micro- so as to complete
The test of the incorgruous single-particle inversion of processor embedded SRAM multidigit.
During step (3)~(8) are performed, tested SRAM electric current is also monitored simultaneously, when electric current exceedes breech lock threshold
To its current limliting during value, and prompt that single event latch-up occurs.
The invention also provides a kind of test system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit, including：
Irradiation test system and data handling system；Irradiation test system is used to carry out microprocessor embedded SRAM irradiation test, number
The incorgruous single-particle inversion of microprocessor embedded SRAM multidigit is tested according to above-mentioned method of testing according to processing system.It is specific real
Now as shown in Fig. 2 irradiation test test system is made up of host computer, slave computer and irradiation test system.Irradiation test system carries
For the environment of irradiation test, test program is downloaded to slave computer by host computer, and is run in slave computer, and test result passes through string
Port transmission is to host computer output display.
Embodiment：
(1) the SRAM configurations are initialized, 32 bit wides, size 256KB, latent period is respectively 1, is initialized respectively
" 1 " arrives " 0 " upset counting SEU1_0, " 0 " arrives " 1 " upset counting SEU0_1, the total SEU_total of particle upset is 0, and beginning is micro-
Processor embedded SRAM irradiation test.
(2) test patterns 0x55555555 is write to the SRAM wholes address.
(3) data of SRAM first address described in retaking of a year or grade, obtain retaking of a year or grade value.
(4) retaking of a year or grade value step-by-step is negated, then carries out step-by-step and operation with test patterns 0x55555555, obtain among first
Value.
(5) test patterns 0x55555555 step-by-steps are negated, then carries out step-by-step and operation with retaking of a year or grade value, obtain among second
Value.
(6) judge whether the first median and the second median are equal to 0, be, then step (7) is performed, otherwise, using N
=N＆ (N-1) algorithm (N is 32 bits), the number of " 1 " is tried to achieve in the first median and the second median respectively
Count0, Count1, add up Count0, Count1 respectively, obtains that " 1 " arrive " 0 " upset number SEU1_0, " 0 " arrives " 1 " and overturns number
SEU0_1, and make carbon copies original test patterns 0x55555555 to current address.
(7) judge whether to travel through the SRAM wholes address space, be, SEU1_0, SEU0_1 are summed, particle is obtained and turns over
Turn total SEU_total, output switching activity counts SEU1_0, SEU0_1, SEU_total；Otherwise SRAM's described in retaking of a year or grade is next
Address date, repeat step (4), (5), (6).
(8) judge whether output switching activity sum reaches default inverse values or whether the total fluence of irradiation reaches default fluence,
It is then to stop irradiation, terminates experiment；Otherwise repeat step (3), (4), (5), (6), (7).
(9) upset of last time output counts SEU1_0, SEU0_1, SEU_total and then represents that " 1 " is turned over to " 0 " respectively
Revolution, " 0 " arrive " 1 " upset number and particle upset sum.
Technical solution of the present invention adds Multiple-bit upsets statistical function for the address of single-particle inversion occurs, and increases simultaneously
Manifolding processes, Multiple-bit upsets and the statistical error that upset accumulation is brought are effectively prevent, drastically increases accuracy in detection,
Meanwhile when being applicable the inventive method or system and being tested, without repeated priming particle accelerator, short form test process, drop
Low experimentation cost.
Claims (9)
1. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit, it is characterised in that comprise the following steps：
(1) configuration of microprocessor embedded SRAM is initialized, sets the first upset counting SEU1_0, the second upset to count SEU0_1
With upset tale SEU_total, afterwards progress microprocessor embedded SRAM irradiation test；
(2) test patterns are write to whole addresses of the SRAM；
(3) data of SRAM first address described in retaking of a year or grade, obtain retaking of a year or grade value；
(4) the retaking of a year or grade value step-by-step is negated, then carries out step-by-step and operation with the test patterns, obtain the first median；
(5) the test patterns step-by-step is negated, then carries out step-by-step and operation with the retaking of a year or grade value, obtain the second median；
(6) if the first median and the second median are equal to 0, step (7) is performed, otherwise, the first upset is calculated and counts
The upsets of SEU1_0 and second count SEU0_1 value, and make carbon copies original test patterns to current address；
(7) next address of SRAM described in retaking of a year or grade, repeat step (4)~(6), until traversal SRAM wholes address, calculating are turned over
Turn tale SEU_total value, and export the first upset and count SEU1_0, the second upset counting SEU0_1 and upset tale
SEU_total value；
(8) repeat step (3)~(7), until output switching activity tale reaches default inverse values or the total fluence of irradiation reaches pre-
If fluence, into step (9)；
(9) the first upset of last time output counts SEU1_0, the second upset counts SEU0_1 and upset tale SEU_
Total value, represent that " 1 " arrives " 0 " upset number, " 0 " arrives " 1 " upset number and particle upset sum respectively, so as to complete microprocessor
The test of the incorgruous single-particle inversion of device embedded SRAM multidigit.
2. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 1, its feature
It is：First upset described in step (1) counts SEU1_0, the second upset counts SEU0_1 and upset tale SEU_total
It is initialized as 0.
3. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 1, its feature
It is：Test patterns are any binary number in the step (2).
4. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 3, its feature
It is：The test patterns preferably use 55 yards or AA codes.
5. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 1, its feature
It is：Calculate the first upset and count the value that the upsets of SEU1_0 and second count SEU0_1, be specially：
(5.1) number Count0, Count1 of " 1 " is tried to achieve in the first median and the second median respectively；
(5.2) value that Count0 is obtained that adds up is the value that the first upset counts SEU1_0；
(5.3) value that Count1 is obtained that adds up is the value that the second upset counts SEU0_1.
6. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 5, its feature
It is：Step (5.1) calculates number Count0, Count1 of " 1 " in the first median and the second median, specifically using N=
N＆ (N-1) algorithm, wherein N are any binary number.
7. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 1, its feature
It is：The value of the upset tale SEU_total be the first upset count SEU1_0 and the second upset counting SEU0_1 it
With.
8. the method for testing of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit according to claim 1, its feature
It is：During step (3)~(8) are performed, tested SRAM electric current is also monitored simultaneously, when electric current exceedes breech lock threshold value
To its current limliting, and prompt that single event latch-up occurs.
9. the test system of the incorgruous single-particle inversion of microprocessor embedded SRAM multidigit, it is characterised in that including：Irradiation test system
System and data handling system；Irradiation test system is used to carry out irradiation test, data handling system to microprocessor embedded SRAM
The incorgruous single-particle inversion of microprocessor embedded SRAM multidigit is carried out according to method of testing any one of claim 1~8
Test.
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| CN110045205A (en) * | 2019-04-26 | 2019-07-23 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Single event latch-up limits current test method, device and system |
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| CN111078590A (en) * | 2019-12-30 | 2020-04-28 | 中国人民解放军国防科技大学 | Efficient access address bit overturning statistical device |
| CN112767990A (en) * | 2021-02-05 | 2021-05-07 | 浙江威固信息技术有限责任公司 | Method for testing single-particle upset section of solid state disk |
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| CN112767990A (en) * | 2021-02-05 | 2021-05-07 | 浙江威固信息技术有限责任公司 | Method for testing single-particle upset section of solid state disk |
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