CN104698736B - A kind of processing method solving light mask image cell ESD phenomenon - Google Patents
A kind of processing method solving light mask image cell ESD phenomenon Download PDFInfo
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- CN104698736B CN104698736B CN201510144260.0A CN201510144260A CN104698736B CN 104698736 B CN104698736 B CN 104698736B CN 201510144260 A CN201510144260 A CN 201510144260A CN 104698736 B CN104698736 B CN 104698736B
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
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Abstract
The present invention relates to semiconductor process technique fields, provide a kind of processing method for solving light mask image cell ESD phenomenon, provide a reticle figure first；Then two adjacent graphic elements are filtered out according to the preset range of graphical information, wherein graphical information includes the spacing between the angle and two adjacent graphic elements of the area of each graphic element, each angle of each graphic element；Then the angle vertex of any of the above-described graphic element is chosen；Finally using vertex as the center of circle, make the circle that radius is preset value, extend a conducting wire to the edge of adjacent pattern unit from vertex, makes the connection of adjacent pattern unit and discharge electrostatic charges, thus avoid generating the phenomenon that being formed high electric field by charge buildup and led to unfilled corner or bridge joint between graphic element.
Description
Technical field
The present invention relates to semiconductor manufacturing equipment technical field more particularly to a kind of solution light mask image cell ESD phenomenons
Processing method.
Background technique
Semiconductor technology continues on Moore's Law development, and critical dimension is smaller and smaller, and the integrated level of chip is also increasingly
Height, this proposes more stringent requirement to semiconductor fabrication process, it is therefore necessary to reduce as much as possible in technical process
The error of each step, component failure caused by reducing because of error.
In semiconductor fabrication, photoetching process as each technology generation core technology and develop.Photoetching be by
On light shield (mask) circuit structure of graphic form by alignment, exposure, development and etc. be transferred to the silicon wafer for being coated with photoresist
The technical process on surface, photoetching process can silicon chip surface formed a layer photoresist masking graphics, subsequent technique be etching or
Ion implanting, in the CMOS technology of standard, it usually needs use tens of lithography steps.
In a lithographic process, production grinding tool of the light shield as semiconductor devices, it is any with greater need for there is stringent quality guarantee
Defect reflection to reduction or even the component failure that can all lead to product yield on product, in a lithographic process, the ESD of light shield
Influence of the phenomenon to product is especially fatal.
The manufacturing process of light shield is usually all first to be coated with one layer of chromium film to define on a transparent quartz glass substrate
Light tight region, then it is coated with one layer of photoresist on it to define light mask image, light shield manufacturing machine is controlled with light cover office software
Platform carries out the exposure methods such as optics direct write, electron-beam writing or scanning electron microscope (SEM) direct write, by required graphic definition in photoresist
On.During existing light shield manufacture, the opposite sharp corner of two neighboring graphic element easily causes ESD event, i.e., and adjacent two
The opposite sharp corner of a graphic element easily causes the phenomenon that being formed high electric field by charge buildup and led to unfilled corner or bridge joint.
To solve light mask image cell ESD phenomenon, light shield manufacturer generally eliminates the machinery equipment of electrostatic using purchase
Or increases the modes such as electrostatic protection ring to light shield and solve ESD event.The existing method for preventing electrostatic breakdown light shield such as China is specially
Described in the patent of sharp Publication No. CN 1212542C: a circular pattern is formed in the chromium metal approach edge of light shield first,
In the circular pattern have internal sealed ring, be separated by it is equidistant and with internal sealed ring at seal ring outside plurality of separate arranged in parallel.And
There are a plurality of fine small needles, one end of each fine small needle connects with wherein one end of inside and outside seal ring respectively between inside and outside seal ring
It connects, the other end then retains a gap with corresponding inside and outside seal ring.Wherein the outer seal ring of above-mentioned each separation only connect one it is fine
Small needle.
The method that electrostatic breakdown light shield is prevented in above-mentioned patent is to increase the protection ring of antistatic in light shield periphery.Although can
To play certain anti-static electrification, but such as scheme for the special graph for being particularly easy to cause charge buildup inside light shield domain
The position 2-A and 2-B shown in the position 1-A and 1-B, Fig. 4 shown in 2,3-A, 3-B, 3-C shown in Fig. 5 and
The protective effect of the position 3-D, above-mentioned position electrostatic damage is little.
It can be seen that those skilled in the art it is urgent to provide it is a kind of solve light mask image cell ESD phenomenon processing method,
It solves the opposite sharp corner of two neighboring graphic element and easily causes to form high electric field by charge buildup and lead to unfilled corner or bridge joint
The phenomenon that.
Summary of the invention
It is an object of the present invention to provide a kind of processing methods for solving light mask image cell ESD phenomenon, solve two neighboring figure
The opposite sharp corner of shape unit easily causes the phenomenon that being formed high electric field by charge buildup and led to unfilled corner or bridge joint.
To achieve the goals above, the present invention provides a kind of processing method for solving light mask image cell ESD phenomenon, packets
Reticle figure is included, the reticle figure is distributed at least two graphic elements, the treating method comprises:
Step S01, a reticle figure is provided, the reticle figure has already passed through initial optical and closes on amendment；
Step S02, two adjacent graphic elements are filtered out according to the preset range of graphical information；Wherein, the figure
Information include between the angle and two adjacent graphic elements of the area of each graphic element, each angle of each graphic element between
Away from；
Step S03, the angle vertex of any of the above-described graphic element is chosen；
Step S04, using the vertex as the center of circle, the circle that radius is preset value is made, extends one from the vertex and leads
Line makes the connection of adjacent pattern unit and discharge electrostatic charges to the edge of adjacent pattern unit；Wherein, the extended line of the conducting wire
Intersect with the circle, and the Edge Distance apart from adjacent pattern unit is most short.
Preferably, if further include spacing between step S05, two adjacent graphic elements within a preset range, and
There are multiple angles within the scope of this, then repeat step S03 to step S04, until each angle vertex of any graphic element connects
Conducting wire is connect, and extends to the edge of adjacent pattern unit.
Preferably, the spacing between each conducting wire should be greater than preset value, if being less than preset value, give up any conducting wire.
Preferably, the spacing preset value between each conducting wire is 0.2um.
Preferably, in the step S04, the radius of the circle is greater than the most short distance on vertex to adjacent pattern cell edges
From.
Preferably, the radius value of the circle is 0.1um.
Preferably, in the step S02, the preset range of the included angle of the graphic element is greater than 0 ° less than 180 °.
Preferably, in the step S02, the area of the graphic element is greater than 1um × 1um.
Preferably, the width range of the conducting wire is 10nm~190nm.
Preferably, in the step S04, the extending direction of the conducting wire is horizontal or vertical direction.
The present invention provides a kind of processing methods for solving light mask image cell ESD phenomenon, by the pre- of graphical information
If filtering out two adjacent graphic elements in range, and extended to from the angle vertex of any graphic element by conducting wire adjacent
The edge of graphic element makes the connection of adjacent pattern unit and discharge electrostatic charges, thus avoids generating between graphic element by electricity
Lotus gathers the phenomenon that forming high electric field and leading to unfilled corner or bridge joint.
Detailed description of the invention
Fig. 1 is the process signal of preferred embodiment in the processing method of solution light mask image cell ESD phenomenon of the invention
Figure；
Fig. 2 is the structural representation of a preferred embodiment in the processing method of different location adjacent pattern unit in the present invention
Figure；
Fig. 3 is the structural schematic diagram of adjacent pattern unit connecting wire in Fig. 2；
Fig. 4 is the structural representation of another preferred embodiment in the processing method of different location adjacent pattern unit in the present invention
Figure；
Fig. 5 is the structural representation of another preferred embodiment in the processing method of different location adjacent pattern unit in the present invention
Figure.
Specific embodiment
To keep the contents of the present invention more clear and easy to understand, below in conjunction with Figure of description, the contents of the present invention are made into one
Walk explanation.Certainly the invention is not limited to the specific embodiment, general replacement known to those skilled in the art
It is included within the scope of protection of the present invention.Secondly, the present invention has carried out detailed statement using schematic diagram, it is real the present invention is described in detail
When example, for ease of description, schematic diagram is not partially enlarged in proportion to the general scale, should not be in this, as limitation of the invention.
It should be noted that in following embodiments, using the structural schematic diagram of Fig. 2 to by solution provided by the invention
The processing method of light mask image cell ESD phenomenon has carried out detailed statement.When describing embodiments of the invention in detail, in order to just
In explanation, schematic diagram do not draw and carried out according to general proportion partial enlargement and omission processing, therefore, should be avoided in this, as
Limitation of the invention.
As shown in FIG. 1, FIG. 1 is preferred embodiments in the processing method of solution light mask image cell ESD phenomenon of the invention
Flow diagram.A kind of processing method solving light mask image cell ESD phenomenon provided by the invention, including lithography layout
At least two graphic elements are distributed in shape, reticle figure, and processing method includes:
Step S01, a reticle figure is provided, reticle figure has already passed through initial optical and closes on amendment.
Step S02, two adjacent graphic elements are filtered out according to the preset range of graphical information；Wherein, graphical information
Spacing between the angle and two adjacent graphic elements of area, each angle of each graphic element including each graphic element；
Specifically, the area of graphic element is preferably greater than 1um × 1um, the preset range of the included angle of graphic element is preferably greater than 0 °
Less than 180 °, the spacing maximum between two graphic elements is preferably 0.1um.
Step S03, the angle vertex of any of the above-described graphic element is chosen.
Step S04, using vertex as the center of circle, the circle that radius is preset value is made, extends a conducting wire to adjacent from vertex
The edge of graphic element makes the connection of adjacent pattern unit and discharge electrostatic charges；Wherein, the extended line of conducting wire intersects with circle, and
Edge Distance apart from adjacent pattern unit is most short.Wherein, round radius should be greater than vertex to adjacent pattern cell edges most
Short distance, round radius value are preferably 0.1um.
In preferred embodiment, if further include spacing between step S05, two adjacent graphic elements within a preset range,
And there are multiple angles in the range, then step S03 to step S04 is repeated, until each angle vertex of any graphic element
It is all connected with conducting wire, and extends to the edge of adjacent pattern unit.
Wherein, the spacing between each conducting wire should be greater than preset value, if being less than preset value, give up any conducting wire；Its
In, the spacing preset value between each conducting wire is preferably 0.2um, and the width range of conducting wire is preferably 10nm~190nm, and conducting wire prolongs
Stretching direction is preferably horizontal or vertical direction.
Specifically, the width of conducting wire is calculated by the resolution formula of corresponding photoetching equipment, calculation formula R=K1
× λ/NA, wherein R represents resolution, and K1 refers to that exposure wavelength, NA refer to numerical aperture for the process factor of optical system, λ.
Since conducting wire should can not be imaged on silicon wafer, so the width of conducting wire should be less than the parsing angle value of corresponding photoetching equipment.
1. it is 193nm for ArF board λ value by taking ArF board (Nikon dry method deep ultraviolet ArF photolithographic exposure board) as an example,
The current minimum value 0.3 of K1, NA maximum value are 0.93, then corresponding R ≈ 60nm.
2. NA maximum value is 1.36 by taking ArF immersion board (A Simaier Immersion ArF Lithography exposure bench) as an example,
Then corresponding R ≈ 40nm.
3. λ 248nm, K1 minimum value 0.3, NA is most by taking KrF board (Nikon deep ultraviolet KrF photolithographic exposure board) as an example
Greatly 0.7, then corresponding R ≈ 106nm.
4. for I-line board (Nikon I Lithography exposure bench), λ 365nm, K1 minimum value 0.3, NA maximum
It is 0.6, then corresponding R ≈ 182nm.
Then Fig. 2-Fig. 3 is please referred to, Fig. 2 is preferred in the processing method of different location adjacent pattern unit in the present invention one
The structural schematic diagram of embodiment；Fig. 3 is the structural schematic diagram of adjacent pattern unit connecting wire in Fig. 2.As shown in Figure 2,3, it wraps
Include two graphic elements, respectively S1-1 and S1-2, at the position of the 1-A of graphic element S1-1 with the 1- of graphic element S1-2
It is easy to produce ESD event at the position of B, to solve this phenomenon, according to the angle of the area of the two graphic elements, each angle
And after the spacing between two graphic elements filters out the two graphic elements, choose the position of the 1-A of graphic element S1-1
The angle vertex at place, the circle of pre-set radius value is drawn with the vertex, and the angle vertex at the position of one end connection 1-A of conducting wire is led
The other end of line vertically connects the marginal position of figure cell S 1-2, makes graphic element S1-1 and S1-2 connection and release electrostatic
Charge.Wherein, the extended line of the conducting wire intersects with circle, and the Edge Distance apart from adjacent pattern unit is most short.
Similarly, the angle vertex at the position 1-B of graphic element S1-2 is chosen, the circle of pre-set radius value is drawn with the vertex,
Angle vertex at the position of one end connection 1-B of conducting wire, the other end of conducting wire vertically connect the margin location of figure cell S 1-1
It sets, makes graphic element S1-2 and S1-1 connection and discharge electrostatic charges.
Referring to Fig. 4, Fig. 4 is another preferred embodiment in the processing method of different location adjacent pattern unit in the present invention
Structural schematic diagram.Including two graphic elements, respectively S2-1 and S2-2, at the position of the 2-A of graphic element S2-1 with
It is easy to produce ESD event at the position of the 2-B of graphic element S2-2, to solve this phenomenon, with the 2-A's of graphic element S2-1
Angle vertex at position draws the circle of pre-set radius value, the angle top at the position of one end connection 2-A of conducting wire with the vertex
Point, the other end of conducting wire connect the angle vertex at the 2-B of figure cell S 2-2, make graphic element S2-1 and S2-2 connection simultaneously
Discharge electrostatic charges.
Referring to Fig. 5, Fig. 5 is another preferred embodiment in the processing method of different location adjacent pattern unit in the present invention
Structural schematic diagram.Including two graphic elements, respectively S3-1 and S3-2, since graphic element is irregular figure, because
This has in the range of graphic element presets spacing and is easy to produce ESD event, i.e. graphic element S3-1 at multiple angular positions
In 3-B and 3-A, with the 3-C and 3-D in graphic element S3-2.Then according to the method described above respectively to 3-B, 3-A, 3-C with
And 3-D carries out picture circle and connecting wire respectively, details are not described herein, after being separately connected conducting wire, since the angle apex of 3-B is same
When there are two conducting wires to be connected to graphic element S3-2 marginal position, due to two conducting wires spacing be less than preset value, give up
A wherein conducting wire retains the connecting wire between the angle vertex at 3-B and the angle vertex at 3-D.Similarly, retain 3-A
The connecting wire between angle vertex at the angle vertex at place and 3-C.
In conclusion the present invention provides a kind of processing methods for solving light mask image cell ESD phenomenon, by figure
Two adjacent graphic elements are filtered out in the preset range of information, and are prolonged by conducting wire from the angle vertex of any graphic element
The edge for extending to adjacent pattern unit makes the connection of adjacent pattern unit and discharge electrostatic charges, thus avoids between graphic element
Generate the phenomenon that being formed high electric field by charge buildup and led to unfilled corner or bridge joint.
Described above is only the description of the preferred embodiment of invention, it is noted that due to the finiteness of literal expression, and
Objectively there is unlimited specific structure, for those skilled in the art, is not departing from original of the invention
Under the premise of reason, several improvements and modifications can also be made, these modifications and embellishments should also be considered as the scope of protection of the present invention.Appoint
What simple modification, equivalent variation and modification, all of which are still within the scope of protection of the technical scheme of the invention.
Claims (8)
1. a kind of processing method for solving light mask image cell ESD phenomenon, including reticle figure, the reticle figure distribution
There are at least two graphic elements, which is characterized in that the treating method comprises:
Step S01, a reticle figure is provided, the reticle figure has already passed through initial optical and closes on amendment；
Step S02, two adjacent graphic elements are filtered out according to the preset range of graphical information；Wherein, the graphical information
Spacing between the angle and two adjacent graphic elements of area, each angle of each graphic element including each graphic element；
Step S03, the angle vertex of any of the above-described graphic element is chosen；
Step S04, using the vertex as the center of circle, make radius be preset value circle, from the vertex extend a conducting wire to
The edge of adjacent pattern unit makes the connection of adjacent pattern unit and discharge electrostatic charges；Wherein, the extended line of the conducting wire and institute
Round intersection is stated, and the Edge Distance apart from adjacent pattern unit is most short；
If step S05, there are multiple angles between two adjacent graphic elements, step S03 to step S04 is repeated, directly
It is all connected with conducting wire to each angle vertex of any graphic element, and extends to the edge of adjacent pattern unit；Wherein, each conducting wire it
Between spacing should be greater than preset value, if be less than preset value, give up any conducting wire.
2. the processing method according to claim 1 for solving light mask image cell ESD phenomenon, which is characterized in that described pre-
If value is 0.2um.
3. the processing method according to claim 1 for solving light mask image cell ESD phenomenon, which is characterized in that the step
In rapid S04, the radius of the circle is greater than the shortest distance on vertex to adjacent pattern cell edges.
4. the processing method according to claim 3 for solving light mask image cell ESD phenomenon, which is characterized in that the circle
Radius value be 0.1um.
5. the processing method according to claim 1 for solving light mask image cell ESD phenomenon, which is characterized in that the step
In rapid S02, the preset range of the included angle of the graphic element is greater than 0 ° less than 180 °.
6. the processing method according to claim 1 for solving light mask image cell ESD phenomenon, which is characterized in that the step
In rapid S02, the area of the graphic element is greater than 1um × 1um.
7. the processing method according to claim 1 for solving light mask image cell ESD phenomenon, which is characterized in that described to lead
The width range of line is 10nm~190nm.
8. the processing method according to claim 1 for solving light mask image cell ESD phenomenon, which is characterized in that the step
In rapid S04, the extending direction of the conducting wire is horizontal or vertical direction.
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| CN106154737B (en) * | 2016-06-30 | 2019-10-25 | 上海华力微电子有限公司 | A kind of domain processing method reducing ESD risk |
| CN109143775A (en) * | 2018-08-29 | 2019-01-04 | 上海华力集成电路制造有限公司 | The light mask image for reducing the method for light shield static discharge risk and its obtaining |
| CN109085736A (en) * | 2018-09-10 | 2018-12-25 | 德淮半导体有限公司 | The production method of optical adjacent correction method and mask plate |
| CN112711174A (en) * | 2020-12-28 | 2021-04-27 | Tcl华星光电技术有限公司 | Photomask, preparation method of array substrate and display panel |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376131B1 (en) * | 2000-04-04 | 2002-04-23 | Xilinx, Inc. | Methods and structures for protecting reticles from ESD failure |
| CN103941540A (en) * | 2014-04-11 | 2014-07-23 | 京东方科技集团股份有限公司 | Mask plate |
| CN203759422U (en) * | 2014-04-11 | 2014-08-06 | 京东方科技集团股份有限公司 | Mask plate |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010206177A (en) * | 2009-02-06 | 2010-09-16 | Toshiba Corp | Exposure mask, method for manufacturing same, and method for manufacturing semiconductor device |
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- 2015-03-30 CN CN201510144260.0A patent/CN104698736B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376131B1 (en) * | 2000-04-04 | 2002-04-23 | Xilinx, Inc. | Methods and structures for protecting reticles from ESD failure |
| CN103941540A (en) * | 2014-04-11 | 2014-07-23 | 京东方科技集团股份有限公司 | Mask plate |
| CN203759422U (en) * | 2014-04-11 | 2014-08-06 | 京东方科技集团股份有限公司 | Mask plate |
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