CN104681421A - Method for improving wet-process etching efficiency - Google Patents
Method for improving wet-process etching efficiency Download PDFInfo
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- CN104681421A CN104681421A CN201310613330.3A CN201310613330A CN104681421A CN 104681421 A CN104681421 A CN 104681421A CN 201310613330 A CN201310613330 A CN 201310613330A CN 104681421 A CN104681421 A CN 104681421A
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Abstract
The invention provides a method for improving wet-process etching efficiency. The method comprises the following steps: sufficiently dissolving nitrogen gas into alkaline liquid used for wet-process etching for removing a silicon layer; and leading the alkaline liquid which is sufficiently dissolved with the nitrogen gas into an etching operation room to etch to remove the silicon layer. According to the method, the etching speed to the silicon layer by the alkaline liquid can be greatly improved under the condition that the wet-process etching alkaline liquid for removing the silicon layer does not need to be heated, and furthermore, the heat budget is reduced and the safety risks are effectively controlled.
Description
Technical field
The present invention relates to semiconductor fabrication process, in particular to a kind of raising for removing the method for the wet etching efficiency of silicon layer.
Background technology
In the manufacturing process of integrated circuit of future generation, for the making of the grid of complementary metal oxide semiconductors (CMOS) (CMOS), usually adopt high k-metal gate process.For the CMOS that process node is below 32nm, described high k-metal gate process is generally post tensioned unbonded prestressed concrete technique, and its implementation process is first metal gates two kinds after metal gates and rear high k dielectric layer after high k dielectric layer.The former implementation process comprises: form dummy gate structure on a semiconductor substrate, and described dummy gate structure is made up of boundary layer stacked from bottom to top, high k dielectric layer, cover layer (capping layer) and sacrificial gate material layer; Side wall construction is formed in the both sides of dummy gate structure, remove the sacrificial gate material layer in dummy gate structure afterwards, in the groove stayed between side wall construction, deposit workfunction layers (workfunction metal layer), barrier layer (barrier layer) and soakage layer (wetting layer) successively; Carry out the filling of metal gate material (being generally aluminium).The implementation process of the latter comprises: form dummy gate structure on a semiconductor substrate, and described dummy gate structure is made up of sacrificial dielectric stacked from bottom to top and sacrificial gate material layer; Side wall construction is formed in the both sides of dummy gate structure, remove the sacrificial dielectric in dummy gate structure and sacrificial gate material layer afterwards, deposited interfacial layer, high k dielectric layer, cover layer, workfunction layers, barrier layer and soakage layer successively in the groove stayed between side wall construction; Carry out the filling of metal gate material.Along with the continuous reduction of feature sizes of semiconductor devices, after the rear high k dielectric layer of enforcement during metal gate process, carry out the filling of metal gate material after removal sacrificial dielectric and sacrificial gate material layer before, need deposited interfacial layer successively, high k dielectric layer, cover layer, workfunction layers, barrier layer and soakage layer, the process window of described deposition is subject to the very big restriction of dummy gate structure characteristic size, the normal filling of subsequent metal grid material will be affected after implementing described deposition, and after the first high k dielectric layer of enforcement during metal gate process, carry out the filling of metal gate material after removal sacrificial gate material layer before, only need deposit workfunction layers successively, barrier layer and soakage layer, the normal filling of subsequent metal grid material can not be affected.Therefore, first after high k dielectric layer metal gate process usually used as the technique of high k-metal gates making CMOS.
When removing sacrificial gate material layer (being usually made up of silicon layer) in dummy gate structure, wet etching is usually adopted to implement described removal.The corrosive liquid of described wet etching is generally alkaline matter (such as Tetramethylammonium hydroxide, potassium hydroxide, ammoniacal liquor etc.), to alleviate the tectal damage below to sacrificial gate material layer.Owing to usually containing impurity and unformed silicon in the constituent material of sacrificial gate material layer, therefore, select above-mentioned alkaline matter lower as the etch-rate of wet etching to sacrificial gate material layer of corrosive liquid.In order to address this problem, heating above-mentioned alkaline matter is usual settling mode, but this kind of mode can bring following risk: one is safety problem; Two is concentration stabilize sex chromosome mosaicism of above-mentioned alkaline matter.
Therefore, need to propose a kind of method, to solve the problem.
Summary of the invention
For the deficiencies in the prior art, the invention provides a kind of method improving wet etching efficiency, comprising: akaline liquid nitrogen being fully dissolved in the wet etching for removing silicon layer; The akaline liquid being fully dissolved with nitrogen is imported etching operation room, removes described silicon layer for etching.
Further, described course of dissolution completes in the special container holding described akaline liquid.
Further, described course of dissolution completes in mixing valve.
Further, in described course of dissolution, the temperature of described akaline liquid is 20-100 DEG C.
Further, the concentration of the described nitrogen be fully dissolved with in the akaline liquid of nitrogen is 0.1-100ppm.
Further, the pH value of described akaline liquid is greater than 7.0.
Further, described akaline liquid comprises Tetramethylammonium hydroxide, potassium hydroxide or ammoniacal liquor.
Further, the surface orientation of described silicon layer is <100> or <110>.
Further, described silicon layer forms the sacrificial gate material layer in dummy gate structure.
According to the present invention, when not needing to heat the akaline liquid of wet etching for removing silicon layer, significantly can promote the etch-rate of described akaline liquid to silicon layer, and then reduce heat budget, effectively control security risk.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining principle of the present invention.
In accompanying drawing:
Figure 1A is that the method raising of according to an exemplary embodiment of the present is for removing the schematic diagram of the wet etching efficiency of silicon layer;
Figure 1B is that the method raising of according to an exemplary embodiment of the present two is for removing the schematic diagram of the wet etching efficiency of silicon layer;
Fig. 2 is the flow chart of step implemented successively of method according to an exemplary embodiment of the present invention.
Embodiment
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
In order to thoroughly understand the present invention, by following description, detailed step is proposed, so as to explain the present invention propose raising for removing the method for the wet etching efficiency of silicon layer.Obviously, the specific details that the technical staff that execution of the present invention is not limited to semiconductor applications has the knack of.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other execution modes.
Should be understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not get rid of existence or additional other features one or more, entirety, step, operation, element, assembly and/or their combination.
In order to improve the efficiency of the wet etching for removing silicon layer, the present invention proposes the corrosive liquid be injected into by nitrogen as described wet etching in alkaline solution.
Below, with reference to Figure 1A-Figure 1B, the detailed step that method according to an exemplary embodiment of the present invention improves the wet etching efficiency for removing silicon layer is described.
[exemplary embodiment one]
With reference to Figure 1A, illustrated therein is the method raising of according to an exemplary embodiment of the present for removing the schematic diagram of the wet etching efficiency of silicon layer.
Nitrogen is imported by air inlet pipe 102 and is exclusively used in and deposits in the container 101 of chemical substance, make nitrogen fully be dissolved in akaline liquid 100 in container 101.In the process passing into nitrogen, akaline liquid 100 flows out through delivery line 103, first flow into the first ingress pipe 107 by switching valve 104, be heated by heater 105 again, the temperature of akaline liquid 100 is made to be 20-100 DEG C, then, filtered out the impurity in the akaline liquid 100 heated through heater 105 by filter 106, finally import container 101.The akaline liquid 100 being fully dissolved with nitrogen flows out through delivery line 103 again, flows into the second ingress pipe 108 by switching valve 104, imports etching operation room, removes the sacrificial gate material layer be formed in the dummy gate structure of wafer for etching.The concentration being fully dissolved with the nitrogen in the akaline liquid 100 of nitrogen is 0.1-100ppm, and the pH value of akaline liquid 100 is greater than 7.0, preferred Tetramethylammonium hydroxide, potassium hydroxide, ammoniacal liquor.
[exemplary embodiment two]
With reference to Figure 1B, illustrated therein is the method raising of according to an exemplary embodiment of the present two for removing the schematic diagram of the wet etching efficiency of silicon layer.
Import mixing valve 111 by wireway 109 and the first catheter 110 respectively by nitrogen with through the akaline liquid that heater 105 heats, make nitrogen fully be dissolved in the akaline liquid heated through heater 105.The temperature of described akaline liquid is 20-100 DEG C.The akaline liquid being fully dissolved with nitrogen imports etching operation room through the second catheter 112, removes the sacrificial gate material layer be formed in the dummy gate structure of wafer for etching.The concentration being fully dissolved with the nitrogen in the akaline liquid of nitrogen is 0.1-100ppm, and the pH value of akaline liquid is greater than 7.0, preferred Tetramethylammonium hydroxide, potassium hydroxide, ammoniacal liquor.
With reference to Fig. 2, the flow chart of the step that the method according to an exemplary embodiment of the present invention that illustrated therein is is implemented successively, for schematically illustrating the raising of the present invention's proposition for removing the flow process of the method for the wet etching efficiency of silicon layer.
In step 201, nitrogen is fully dissolved in the akaline liquid of the wet etching for removing silicon layer;
In step 202., the akaline liquid being fully dissolved with nitrogen is imported etching operation room, removes described silicon layer for etching.
Table 1 Tetramethylammonium hydroxide is to the etch-rate (A/min) of the sacrificial gate material layer that the silicon by surface orientation being <100> is formed
Referring to table 1, for Tetramethylammonium hydroxide, at the same temperature, the Tetramethylammonium hydroxide being dissolved with nitrogen to the etch-rate of the sacrificial gate material layer that the silicon being <100> by surface orientation be formed in the dummy gate structure of wafer is formed far above not being dissolved with the Tetramethylammonium hydroxide of nitrogen to the etch-rate of described sacrificial gate material layer.Similarly, at the same temperature, other akaline liquid being applicable to etch described sacrificial gate material layer being dissolved with nitrogen to the etch-rate of described sacrificial gate material layer also far above the etch-rate to told sacrificial gate material layer when not being dissolved with nitrogen.Only list the situation that silicon that sacrificial gate material layer is <100> by surface orientation is formed in table 1, the method that the present invention proposes is equally applicable to promote the etch-rate of described akaline liquid to the sacrificial gate material layer that the silicon layer by surface orientation being <110> or other crystal orientation is formed.Those skilled in the art can know, and the method that the present invention proposes is not limited only to be applicable to etch the silicon layer removing the sacrificial gate material layer formed in dummy gate structure.According to the present invention, when not needing to heat the akaline liquid of wet etching for removing silicon layer, significantly can promote the etch-rate of described akaline liquid to silicon layer, and then reduce heat budget, effectively control security risk.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.
Claims (9)
1. improve a method for wet etching efficiency, comprising:
Nitrogen is fully dissolved in the akaline liquid of the wet etching for removing silicon layer;
The akaline liquid being fully dissolved with nitrogen is imported etching operation room, removes described silicon layer for etching.
2. method according to claim 1, is characterized in that, described course of dissolution completes in the special container holding described akaline liquid.
3. method according to claim 1, is characterized in that, described course of dissolution completes in mixing valve.
4. according to the method in claim 2 or 3, it is characterized in that, in described course of dissolution, the temperature of described akaline liquid is 20-100 DEG C.
5. method according to claim 1, is characterized in that, the concentration of the described nitrogen be fully dissolved with in the akaline liquid of nitrogen is 0.1-100ppm.
6. method according to claim 1, is characterized in that, the pH value of described akaline liquid is greater than 7.0.
7. method according to claim 6, is characterized in that, described akaline liquid comprises Tetramethylammonium hydroxide, potassium hydroxide or ammoniacal liquor.
8. method according to claim 1, is characterized in that, the surface orientation of described silicon layer is <100> or <110>.
9. method according to claim 1, is characterized in that, described silicon layer forms the sacrificial gate material layer in dummy gate structure.
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| CN201310613330.3A CN104681421B (en) | 2013-11-27 | 2013-11-27 | A kind of method for improving wet etching efficiency |
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| CN201310613330.3A CN104681421B (en) | 2013-11-27 | 2013-11-27 | A kind of method for improving wet etching efficiency |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200717667A (en) * | 2005-10-27 | 2007-05-01 | Powerchip Semiconductor Corp | Wet etching apparatus and controlling method of etching rate of polycrystalline silicon |
| CN101299405A (en) * | 2008-06-16 | 2008-11-05 | 吉林大学 | Method for constructing anti-reflection structure on substrate surface |
| US20090145457A1 (en) * | 2007-12-05 | 2009-06-11 | Siltronic Ag | Method For The Wet-Chemical Treatment Of A Semiconductor Wafer |
| CN101578556A (en) * | 2007-01-03 | 2009-11-11 | Az电子材料美国公司 | Stripper for coating layer |
| CN103117215A (en) * | 2011-11-17 | 2013-05-22 | 中芯国际集成电路制造(上海)有限公司 | Forming method of metallic gate electrode layer |
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- 2013-11-27 CN CN201310613330.3A patent/CN104681421B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200717667A (en) * | 2005-10-27 | 2007-05-01 | Powerchip Semiconductor Corp | Wet etching apparatus and controlling method of etching rate of polycrystalline silicon |
| CN101578556A (en) * | 2007-01-03 | 2009-11-11 | Az电子材料美国公司 | Stripper for coating layer |
| US20090145457A1 (en) * | 2007-12-05 | 2009-06-11 | Siltronic Ag | Method For The Wet-Chemical Treatment Of A Semiconductor Wafer |
| CN101299405A (en) * | 2008-06-16 | 2008-11-05 | 吉林大学 | Method for constructing anti-reflection structure on substrate surface |
| CN103117215A (en) * | 2011-11-17 | 2013-05-22 | 中芯国际集成电路制造(上海)有限公司 | Forming method of metallic gate electrode layer |
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| CN104681421B (en) | 2017-11-10 |
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