CN102891108B - A kind of manufacture method of array base palte - Google Patents
A kind of manufacture method of array base palte Download PDFInfo
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- CN102891108B CN102891108B CN201210410175.0A CN201210410175A CN102891108B CN 102891108 B CN102891108 B CN 102891108B CN 201210410175 A CN201210410175 A CN 201210410175A CN 102891108 B CN102891108 B CN 102891108B
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- substrate
- array base
- base palte
- acid gas
- manufacture method
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- 238000000034 method Methods 0.000 title claims abstract description 65
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 45
- 239000002253 acid Substances 0.000 claims abstract description 50
- 239000004065 semiconductor Substances 0.000 claims abstract description 38
- 230000007797 corrosion Effects 0.000 claims abstract description 19
- 238000005260 corrosion Methods 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims description 69
- 238000005530 etching Methods 0.000 claims description 48
- 239000007788 liquid Substances 0.000 claims description 28
- 238000003384 imaging method Methods 0.000 claims description 19
- 229920002120 photoresistant polymer Polymers 0.000 claims description 18
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 13
- 230000008595 infiltration Effects 0.000 claims description 11
- 238000001764 infiltration Methods 0.000 claims description 11
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 8
- 239000007921 spray Substances 0.000 claims description 6
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 229910017604 nitric acid Inorganic materials 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000003487 electrochemical reaction Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
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- Drying Of Semiconductors (AREA)
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Abstract
The present invention relates to a kind of manufacture method of array base palte.The method comprises the step forming semiconductor active layer pattern, and described semiconductor active layer pattern is formed by the lithographic method of acid gas corrosion.In the manufacture method of array base palte of the present invention, volatilize acid vapor by the acid solution in container, IGZO oxide semiconductor layer is etched, the homogeneity of etched pattern can be guaranteed.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of manufacture method of array base palte.
Background technology
At TFT(ThinFilmTransistor, Thin Film Transistor (TFT)) wet etching is absolutely necessary processing step in array fabrication process, and usual grid (Gate) patterned layer and source-drain electrode (S/D) patterned layer and transparent conductor patterned layer (being generally transparent indium tin oxide) are all completed by wet-etching technology.The pattern of existing wet etching has two kinds, and one is immersion type, and one is fountain.IGZO (indiumgalliumzincoxide, indium gallium zinc oxide) semiconductor is a kind of new rete, for the channel layer materials in thin-film transistor technologies of new generation, it is a step core process in oxide TFT manufacturing process, instead of the semiconductor active layer (active layer) in traditional TFT technique, and to compare with traditional a-Si layer that to have mobility high, the advantages such as film formation time is short.If use traditional wet etch process etching IGZO layer, because the structure of matter is different, etch-rate quickly, causes serious crossing to carve, well can not obtain the pattern needed.
Summary of the invention
The object of this invention is to provide a kind of manufacture method of array base palte, have employed the electrochemical reaction of acid gas etching in the method, both can play the effect of etching, well can ensure again the homogeneity etched.
The manufacture method of array base palte provided by the present invention, comprise the step forming semiconductor active layer pattern, wherein, described semiconductor active layer pattern is formed by the lithographic method of acid gas corrosion.
In the manufacture method of array base palte of the present invention, the material forming described semiconductor active layer pattern is IGZO oxide.
In the manufacture method of array base palte of the present invention, the described lithographic method by acid gas corrosion forms IGZO oxide semiconductor active layer pattern and comprises the steps:
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, carries out acid gas corrosion etching by the substrate after infiltrating.
In the manufacture method of array base palte of the present invention, in described step S201, the method for substrate water infiltration is realized by pure water spray conveyer.
In the manufacture method of array base palte of the present invention, the method of in described step S202, substrate being carried out acid gas corrosion etching is realized by the etching device of sealing, be provided with acid gas etching liquid rest area and substrate rest area in described etching device, described acid gas etching liquid rest area is arranged at the below of substrate rest area.
In the manufacture method of array base palte of the present invention, the main component of described acid gas etching liquid is nitric acid and sulfuric acid.
In the manufacture method of array base palte of the present invention, the temperature of described acid gas etching liquid is 30 DEG C-70 DEG C.
In the manufacture method of array base palte of the present invention, the temperature of described acid gas etching liquid is 45 DEG C.
In the manufacture method of array base palte of the present invention, also comprise the steps: before described step S201
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step.
In the manufacture method of array base palte of the present invention, also comprise the steps: after described step S202
Step S301, stripping photoresist.
In the manufacture method of array base palte of the present invention, volatilize acid vapor by the acid solution in container, IGZO oxide semiconductor layer is etched, the homogeneity of etched pattern can be guaranteed.
Accompanying drawing explanation
Fig. 1 represents the flow chart of the manufacture method of array base palte of the present invention;
Fig. 2 represents the schematic diagram of the pure water spray conveyer used in the manufacture method of array base palte of the present invention;
Fig. 3 represents the schematic diagram of the etching device adopted in the manufacture method of array base palte of the present invention;
Fig. 4 represents the array base palte that the manufacture method of the array base palte of embodiment 1 obtains;
Fig. 5 represents the array base palte that the manufacture method of the array base palte of embodiment 2 obtains;
Fig. 6 represents the array base palte that the manufacture method of the array base palte of embodiment 3 obtains;
Fig. 7 represents the array base palte that the manufacture method of the array base palte of embodiment 4 obtains;
Fig. 8 represents the array base palte that the manufacture method of the array base palte of embodiment 5 obtains;
Fig. 9 represents the array base palte that the manufacture method of the array base palte of comparative example 1 obtains.
Embodiment
The manufacture method of array base palte provided by the present invention, comprise the step forming semiconductor active layer pattern, wherein, semiconductor active layer pattern is formed by the lithographic method of acid gas corrosion.
Particularly, the manufacture method of array base palte of the present invention as shown in Figure 1.
Wherein, the material forming semiconductor active layer pattern is IGZO oxide.
Particularly, form IGZO oxide semiconductor active layer pattern by the lithographic method of acid gas corrosion to comprise the steps:
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, carries out acid gas corrosion etching by the substrate after infiltrating.More specifically, in step S201, the method for substrate water infiltration is realized by pure water spray conveyer.Figure 2 shows that pure water spray conveyer.Through this device, substrate is infiltrated fully the substrate of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging, absorption acid gas full and uniform in next step process can be ensured like this.
More specifically, the method for in step S202, substrate being carried out acid gas corrosion etching is realized by the etching device of sealing.Figure 3 shows that the etching device of sealing, be provided with acid gas etching liquid rest area 2-2 and substrate rest area 2-1 in described etching device, described acid gas etching liquid rest area 2-2 is arranged at the below of substrate rest area 2-1.Sealed by device after substrate enters this device, liquid volatilizees in a device automatically, due to substrate having water, can absorb the acid gas in space, chemical reaction occurs, etches, reaction equation to IGZO layer:
ZnO:ZnO(s)+H
+(aq)→(ZnOH)
+(aq)
(ZnOH)
+(aq)+H
+(aq)→Zn
2+(aq)+H
2O(l)
In
2O
3:In
2O
3(s)+6H
+(aq)→2In
3+(aq)+3H
2O(l)
Ga
2O
3:Ga
2O
3(s)+6H
+(aq)→2Ga
3+(aq)+3H
2O(I)。
Wherein, as long as the selection of acid gas etching liquid can be stablized in a device form acid gas, selectively, the main component of acid gas etching liquid is nitric acid and sulfuric acid.Such as ITO etching liquid (DIEA09 of Dong Jin company).The ratio of nitric acid and sulfuric acid, depending on the thickness of rete, is not particularly limited at this.Preferably, the temperature of acid gas etching liquid is 30 DEG C-70 DEG C, and more preferably between 40 DEG C-50 DEG C, most preferably, the temperature of acid gas etching liquid is 45 DEG C.
The thickness of etch period and rete has relation, depending on the thickness of rete, is not particularly limited at this.
The temperature of acid gas etching liquid is too low, liquid poor activity, and etch-rate is low, and acid gas etching liquid temperature is too high, and it is fast that medicine liquid ingredient volatilizees, and to seal and the heat-resisting quantity requirement increase of equipment, improves cost, also can bring the problem of secure context simultaneously.
In the manufacture method of array base palte of the present invention, also comprise the steps: before described step S201
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step.
In the manufacture method of array base palte of the present invention, also comprise the steps: after described step S202
Step S301, takes out substrate, stripping photoresist.
Embodiment 1
The manufacture method of array base palte of the present invention comprises the steps:
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step;
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, the substrate after infiltrating is carried out acid gas corrosion etching, and the temperature of acid gas etching liquid (DIEA09) is 40 DEG C, etch period 20s.
Step S301, takes out substrate, stripping photoresist, obtains array base palte as shown in Figure 4.
Embodiment 2
The manufacture method of array base palte of the present invention comprises the steps:
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step;
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, the substrate after infiltrating is carried out acid gas corrosion etching, and the temperature of acid gas etching liquid (DIEA09) is 50 DEG C, etch period 20s.
Step S301, takes out substrate, stripping photoresist, obtains array base palte as shown in Figure 5.
Embodiment 3
The manufacture method of array base palte of the present invention comprises the steps:
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step;
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, the substrate after infiltrating is carried out acid gas corrosion etching, and the temperature of acid gas etching liquid (DIEA09) is 45 DEG C, etch period 20s.
Step S301, takes out substrate, stripping photoresist, obtains array base palte as shown in Figure 6.
Embodiment 4
The manufacture method of array base palte of the present invention comprises the steps:
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step;
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, the substrate after infiltrating is carried out acid gas corrosion etching, and the temperature of acid gas etching liquid (DIEA09) is 30 DEG C, etch period 20s.
Step S301, takes out substrate, stripping photoresist, obtains array base palte as shown in Figure 7.
Embodiment 5
The manufacture method of array base palte of the present invention comprises the steps:
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step;
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging;
Step S202, the substrate after infiltrating is carried out acid gas corrosion etching, and the temperature of acid gas etching liquid (DIEA09) is 70 DEG C, etch period 20s.
Step S301, takes out substrate, stripping photoresist, obtains array base palte as shown in Figure 8.
Comparative example 1
A kind of manufacture method of array base palte comprises the steps:
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step;
Step S201, adopts the substrate of mode to the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging of spray etching liquid (DIEA09) to etch;
Step S301, takes out substrate, stripping photoresist, obtains array base palte as shown in Figure 9.
The array base palte of Fig. 4-Fig. 9 is acquisition of taking pictures in CD sub-prime 2000-EP2, as can be seen from photo:
The pattern edge of the array base palte of embodiment 1-5 is level and smooth.Therefore, have several substrates of identical pattern to be formed, after etching, the pattern of formation is almost identical.
There is a large amount of burr in the pattern edge of the array base palte of comparative example 1.Generation due to burr is uncertain, and the pattern on each substrate is with the burr of varying number, even if pattern to be formed is identical, the pattern finally formed is also more difficult identical.
The above results illustrates, in the manufacture method of array base palte of the present invention, semiconductor active layer pattern is formed by the lithographic method of acid gas corrosion, well can ensure the homogeneity etched.
It should be noted that, in the embodiment of the present invention, the formation of other retes is same as the prior art, is not repeating at this.
Claims (6)
1. a manufacture method for array base palte, comprises the step forming semiconductor active layer pattern, it is characterized in that,
The material of described formation semiconductor active layer pattern is IGZO oxide, and described semiconductor active layer pattern is formed by the lithographic method of acid gas corrosion;
The described lithographic method by acid gas corrosion forms IGZO oxide semiconductor active layer pattern and comprises the steps:
Step S201, by the substrate water infiltration of the IGZO oxide semiconductor active layer pattern to be formed after exposure imaging,
Step S202, carries out acid gas corrosion etching by the substrate after infiltrating;
The main component of described acid gas etching liquid is nitric acid and sulfuric acid, and the temperature of described acid gas etching liquid is 30 DEG C-70 DEG C.
2. the manufacture method of array base palte according to claim 1, is characterized in that, the method for substrate water infiltration is realized by pure water spray conveyer in described step S201.
3. the manufacture method of array base palte according to claim 1, it is characterized in that, the method of in described step S202, substrate being carried out acid gas corrosion etching is realized by the etching device of sealing, be provided with acid gas etching liquid rest area and substrate rest area in described etching device, described acid gas etching liquid rest area is arranged at the below of substrate rest area.
4. the manufacture method of array base palte according to claim 1, is characterized in that, the temperature of described acid gas etching liquid is 45 DEG C.
5. the manufacture method of array base palte according to claim 1, is characterized in that, also comprises the steps: before described step S201
Step S101, is formed on the substrate of IGZO oxide semiconductor active layer pattern to be formed by IGZO oxide material;
Step S102, is formed on the substrate after previous step by photoresist;
Step S103, carries out exposure imaging by the substrate of previous step.
6. the manufacture method of array base palte according to claim 1, is characterized in that, also comprises the steps: after described step S202
Step S301, stripping photoresist.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210410175.0A CN102891108B (en) | 2012-10-24 | 2012-10-24 | A kind of manufacture method of array base palte |
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| CN201210410175.0A CN102891108B (en) | 2012-10-24 | 2012-10-24 | A kind of manufacture method of array base palte |
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| CN102891108A CN102891108A (en) | 2013-01-23 |
| CN102891108B true CN102891108B (en) | 2015-12-02 |
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| CN109439329A (en) * | 2018-10-29 | 2019-03-08 | 苏州博洋化学股份有限公司 | FPD array process novel I GZO etching solution |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101392374A (en) * | 2008-11-07 | 2009-03-25 | 清华大学 | Double temperature control hydrofluoric acid vapor etching device |
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| KR100379824B1 (en) * | 2000-12-20 | 2003-04-11 | 엘지.필립스 엘시디 주식회사 | Etchant and array substrate for electric device with Cu lines patterend on the array substrate using the etchant |
| EP2256814B1 (en) * | 2009-05-29 | 2019-01-16 | Semiconductor Energy Laboratory Co, Ltd. | Oxide semiconductor device and method for manufacturing the same |
| KR20140002616A (en) * | 2010-08-20 | 2014-01-08 | 어플라이드 머티어리얼스, 인코포레이티드 | Methods for forming a hydrogen free silicon containing dielectric film |
| CN102646683B (en) * | 2012-02-02 | 2014-09-24 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof |
| CN102629591B (en) * | 2012-02-28 | 2015-10-21 | 京东方科技集团股份有限公司 | A kind of manufacture method of array base palte and array base palte, display |
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