CN104660189A - Driving circuit of small-power D-type audio amplifier - Google Patents
Driving circuit of small-power D-type audio amplifier Download PDFInfo
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- CN104660189A CN104660189A CN201310585458.3A CN201310585458A CN104660189A CN 104660189 A CN104660189 A CN 104660189A CN 201310585458 A CN201310585458 A CN 201310585458A CN 104660189 A CN104660189 A CN 104660189A
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Abstract
The invention discloses a driving circuit of a small-power D-type audio amplifier. The driving circuit is characterized by comprising a first phase inverter to a seventh phase inverter, a first NAND gate, a second NAND gate, a first capacitor to a third capacitor, a first P-channel insulated gate bipolar transistor to a fourth P-channel insulated gate bipolar transistor, a first N-channel insulated gate bipolar transistor to a fourth N-channel insulated gate bipolar transistor, an inductor and a direct-current power supply, wherein the first P-channel insulated gate bipolar transistor, the second P-channel insulated gate bipolar transistor, the fourth P-channel insulated gate bipolar transistor, the first N-channel insulated gate bipolar transistor, the second N-channel insulated gate bipolar transistor and the fourth N-channel insulated gate bipolar transistor construct a delay circuit. According to the driving circuit of the small-power D-type audio amplifier disclosed by the invention, the switch-off time of a power switch tube is short, and the caused distortion is small. The driving circuit has high driving capability and high sensitivity, and the power switch tube can be switched off rapidly to protect the amplifier.
Description
Technical field
The present invention relates to a kind of drive circuit of small-power D audio frequency amplifier, particularly relate to the drive circuit that a kind of distortion of small-power D audio frequency amplifier is little.
Background technology
The switching mode that D-type audio power amplifier adopts power switch pipe to make switch exports, and has very high efficiency, but has the situation of power switch pipe conducting simultaneously, power supply is made directly to pass through power switch pipe without load, produce very large electric current, cause electric energy loss, burn power switch pipe.Drive circuit energy driving power switching tube, can make power switch pipe turn off a period of time, avoids power switch pipe conducting simultaneously, guard amplifier.The drive circuit of current small-power D-type audio power amplifier, the time of switch-off power switching tube is longer, causes distortion larger.
Summary of the invention
Object of the present invention is just the drive circuit providing a kind of distortion of small-power D audio frequency amplifier little in order to solve the problem.
The present invention is achieved through the following technical solutions above-mentioned purpose:
The drive circuit of a kind of small-power D audio frequency amplifier of the present invention, comprise the first inverter, second inverter, 3rd inverter, 4th inverter, 5th inverter, hex inverter, 7th inverter, first NAND gate, second NAND gate, first electric capacity, second electric capacity, 3rd electric capacity, one P trench igbt, 2nd P trench igbt, 3rd P trench igbt, 4th P trench igbt, one N trench igbt, 2nd N trench igbt, 3rd N trench igbt, 4th N trench igbt, inductance and DC power supply, the input of described first inverter is connected with the first input end of described second NAND gate and as the pulse signal input terminal of described drive circuit, the output of described first inverter is connected with the first input end of described first NAND gate, the input of described second inverter is as the control signal input of described drive circuit, the output of described second inverter simultaneously with the second input of described first NAND gate, second input of described second NAND gate connects, the output of described second NAND gate is connected with the input of described 5th inverter, the output of described first NAND gate is connected with the input of described 3rd inverter, the output of described 3rd inverter is connected with the input of described 4th inverter, the output of described 4th inverter simultaneously with the first end of described first electric capacity, the grid of a described P trench igbt, the grid of a described N trench igbt connects, the collector electrode of a described P trench igbt is connected with the emitter of described 2nd P trench igbt, the collector electrode of described 2nd P trench igbt simultaneously with the grid of described 3rd P trench igbt, the input of described 7th inverter, the collector electrode of a described N trench igbt connects, the grid of described 2nd P trench igbt is connected with the output of described hex inverter, the output of described 5th inverter simultaneously with the grid of described 4th P trench igbt, the grid of described 4th N trench igbt connects, the collector electrode of described 4th P trench igbt simultaneously with the collector electrode of described 2nd N trench igbt, the grid of described 3rd N trench igbt, the input of described hex inverter connects, the emitter of described 2nd N trench igbt is connected with the collector electrode of described 4th N trench igbt, the output of described 7th inverter is connected with the grid of described 2nd N trench igbt, the collector electrode of described 3rd P trench igbt simultaneously with the collector electrode of described 3rd N trench igbt, the first end of described inductance connects, the positive pole of described DC power supply simultaneously with the emitter of a described P trench igbt, the emitter of described 3rd P trench igbt, the emitter of described 4th P trench igbt connects, the negative pole of described DC power supply simultaneously with the emitter of a described N trench igbt, the emitter of described 3rd N trench igbt, the emitter of described 4th N trench igbt, second end of described first electric capacity, second end of described second electric capacity, the first end of described 3rd electric capacity connects, second end of described inductance is connected with the second end of described 3rd electric capacity and as the pulse signal output end of described drive circuit.
Beneficial effect of the present invention is:
The drive circuit of a kind of small-power D audio frequency amplifier of the present invention, the time of switch-off power switching tube is shorter, causes distortion little.The driving force of this drive circuit is comparatively strong, highly sensitive, can rapid switch-off power switching tube guard amplifier.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the drive circuit of a kind of small-power D audio frequency amplifier of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described:
As shown in Figure 1, the drive circuit of a kind of small-power D audio frequency amplifier of the present invention, comprise the first inverter I1, second inverter I2, 3rd inverter I3, 4th inverter I4, 5th inverter I5, hex inverter I6, 7th inverter I7, first NAND gate N1, second NAND gate N2, first electric capacity C1, second electric capacity C2, 3rd electric capacity C3, one P trench igbt MP1, 2nd P trench igbt MP2, 3rd P trench igbt MP3, 4th P trench igbt MP4, one N trench igbt MN1, 2nd N trench igbt MN2, 3rd N trench igbt MN3, 4th N trench igbt MN4, inductance L and DC power supply Vcc, the input of the first inverter L1 is connected with the first input end of the second NAND gate N2 and as the pulse signal input terminal IN of drive circuit, the output of the first inverter I1 is connected with the first input end of the first NAND gate N1, the input of the second inverter I2 is as the control signal input CT of drive circuit, the output of the second inverter I2 simultaneously with second input of the first NAND gate N1, second input of the second NAND gate N2 connects, the output of the second NAND gate N2 is connected with the input of the 5th inverter I5, the output of the first NAND gate N1 is connected with the input of the 3rd inverter I3, the output of the 3rd inverter I3 is connected with the input of the 4th inverter I4, the output of the 4th inverter I4 simultaneously with the first end of the first electric capacity C1, the grid of the one P trench igbt MP1, the grid of the one N trench igbt MN1 connects, the collector electrode of the one P trench igbt MP1 is connected with the emitter of the 2nd P trench igbt MP2, the collector electrode of the 2nd P trench igbt MP2 simultaneously with the grid of the 3rd P trench igbt MP3, the input of the 7th inverter I7, the collector electrode of the one N trench igbt MN1 connects, the grid of the 2nd P trench igbt MP2 is connected with the output of hex inverter I6, the output of the 5th inverter I5 simultaneously with the grid of the 4th P trench igbt MP4, the grid of the 4th N trench igbt MN4 connects, the collector electrode of the 4th P trench igbt MP4 simultaneously with the collector electrode of the 2nd N trench igbt MN2, the grid of the 3rd N trench igbt MN3, the input of hex inverter I6 connects, the emitter of the 2nd N trench igbt MN2 is connected with the collector electrode of the 4th N trench igbt MN4, the output of the 7th inverter I7 is connected with the grid of the 2nd N trench igbt MN2, the collector electrode of the 3rd P trench igbt MP3 simultaneously with the collector electrode of the 3rd N trench igbt MN3, the first end of inductance L connects, the positive pole of DC power supply Vcc simultaneously with the emitter of a P trench igbt MP1, the emitter of the 3rd P trench igbt MP3, the emitter of the 4th P trench igbt MP4 connects, the negative pole of DC power supply Vcc simultaneously with the emitter of a N trench igbt MN1, the emitter of the 3rd N trench igbt MN3, the emitter of the 4th N trench igbt MN4, second end of the first electric capacity C1, second end of the second electric capacity C2, the first end of the 3rd electric capacity C3 connects, second end of inductance L is connected with second end of the 3rd electric capacity C3 and as the pulse signal output end OUT of drive circuit.
The drive circuit of a kind of small-power D audio frequency amplifier of the present invention, first inverter I1, second inverter I2, 3rd inverter I3, 4th inverter I4, 5th inverter I5, first NAND gate N1 and the second NAND gate N2 forms signal conditioning circuit, one P trench igbt MP1, 2nd P trench igbt MP2, 4th P trench igbt MP4, one N trench igbt MN1, 2nd N trench igbt MN2, 4th N trench igbt MN4, hex inverter I6 and the 7th inverter I7 forms delay control circuit, 3rd P trench igbt MP3, 3rd N trench igbt MN3 forms switching circuit.When amplifier generation excess-current excess-temperature, control signal input CT input high level signal, switching circuit disconnects, and amplifier quits work.When pulse signal becomes high level by low level, first turn off the 3rd N trench igbt MN3, then open the 3rd P trench igbt MP3; When pulse signal becomes low level by high level, first turn off the 3rd P trench igbt MP3, then open the 3rd N trench igbt MN3.The time of this drive circuit switch-off power switching tube is short, and distortion is little.
Claims (1)
1. the drive circuit of a small-power D audio frequency amplifier, it is characterized in that: comprise the first inverter, second inverter, 3rd inverter, 4th inverter, 5th inverter, hex inverter, 7th inverter, first NAND gate, second NAND gate, first electric capacity, second electric capacity, 3rd electric capacity, one P trench igbt, 2nd P trench igbt, 3rd P trench igbt, 4th P trench igbt, one N trench igbt, 2nd N trench igbt, 3rd N trench igbt, 4th N trench igbt, inductance and DC power supply, the input of described first inverter is connected with the first input end of described second NAND gate and as the pulse signal input terminal of described drive circuit, the output of described first inverter is connected with the first input end of described first NAND gate, the input of described second inverter is as the control signal input of described drive circuit, the output of described second inverter simultaneously with the second input of described first NAND gate, second input of described second NAND gate connects, the output of described second NAND gate is connected with the input of described 5th inverter, the output of described first NAND gate is connected with the input of described 3rd inverter, the output of described 3rd inverter is connected with the input of described 4th inverter, the output of described 4th inverter simultaneously with the first end of described first electric capacity, the grid of a described P trench igbt, the grid of a described N trench igbt connects, the collector electrode of a described P trench igbt is connected with the emitter of described 2nd P trench igbt, the collector electrode of described 2nd P trench igbt simultaneously with the grid of described 3rd P trench igbt, the input of described 7th inverter, the collector electrode of a described N trench igbt connects, the grid of described 2nd P trench igbt is connected with the output of described hex inverter, the output of described 5th inverter simultaneously with the grid of described 4th P trench igbt, the grid of described 4th N trench igbt connects, the collector electrode of described 4th P trench igbt simultaneously with the collector electrode of described 2nd N trench igbt, the grid of described 3rd N trench igbt, the input of described hex inverter connects, the emitter of described 2nd N trench igbt is connected with the collector electrode of described 4th N trench igbt, the output of described 7th inverter is connected with the grid of described 2nd N trench igbt, the collector electrode of described 3rd P trench igbt simultaneously with the collector electrode of described 3rd N trench igbt, the first end of described inductance connects, the positive pole of described DC power supply simultaneously with the emitter of a described P trench igbt, the emitter of described 3rd P trench igbt, the emitter of described 4th P trench igbt connects, the negative pole of described DC power supply simultaneously with the emitter of a described N trench igbt, the emitter of described 3rd N trench igbt, the emitter of described 4th N trench igbt, second end of described first electric capacity, second end of described second electric capacity, the first end of described 3rd electric capacity connects, second end of described inductance is connected with the second end of described 3rd electric capacity and as the pulse signal output end of described drive circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310585458.3A CN104660189A (en) | 2013-11-19 | 2013-11-19 | Driving circuit of small-power D-type audio amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310585458.3A CN104660189A (en) | 2013-11-19 | 2013-11-19 | Driving circuit of small-power D-type audio amplifier |
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| Publication Number | Publication Date |
|---|---|
| CN104660189A true CN104660189A (en) | 2015-05-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310585458.3A Pending CN104660189A (en) | 2013-11-19 | 2013-11-19 | Driving circuit of small-power D-type audio amplifier |
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| CN (1) | CN104660189A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111669137A (en) * | 2020-04-27 | 2020-09-15 | 上海交通大学 | Self-adaptive variable gain delay amplifier |
-
2013
- 2013-11-19 CN CN201310585458.3A patent/CN104660189A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111669137A (en) * | 2020-04-27 | 2020-09-15 | 上海交通大学 | Self-adaptive variable gain delay amplifier |
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Application publication date: 20150527 |