CN104659010A - Quad flat no-lead package lead frame structure and package structure - Google Patents

Quad flat no-lead package lead frame structure and package structure Download PDF

Info

Publication number
CN104659010A
CN104659010A CN201510071416.7A CN201510071416A CN104659010A CN 104659010 A CN104659010 A CN 104659010A CN 201510071416 A CN201510071416 A CN 201510071416A CN 104659010 A CN104659010 A CN 104659010A
Authority
CN
China
Prior art keywords
pin
salient point
lead frame
frame structure
chip carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201510071416.7A
Other languages
Chinese (zh)
Other versions
CN104659010B (en
Inventor
刘恺
王亚琴
王孙艳
梁志忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JCET Group Co Ltd
Original Assignee
Jiangsu Changjiang Electronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Changjiang Electronics Technology Co Ltd filed Critical Jiangsu Changjiang Electronics Technology Co Ltd
Priority to CN201510071416.7A priority Critical patent/CN104659010B/en
Publication of CN104659010A publication Critical patent/CN104659010A/en
Application granted granted Critical
Publication of CN104659010B publication Critical patent/CN104659010B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

The invention relates to a quad flat no-lead package lead frame structure. The quad flat no-lead package lead frame structure comprises a plurality of bearing units in matrix arrangement and middle glutens (3) arranged between and used for fixing the bearing units, wherein each bearing unit comprises a chip carrier (1) and a pin array (2) arranged at the periphery of the chip carrier; each middle gluten (3) is connected between the pin arrays (2) of two adjacent bearing units of the bearing units; a half-etched groove (4) is formed in the back, close to the corresponding middle gluten (3) , of each of the pin arrays (2). According to the quad flat no-lead package lead frame structure, as the half-etched grooves are formed in the root parts of pins, during applying of solder paste to a PCB, the solder paste can more successfully climb to the side edges of the pins through the siphonic effect, and accordingly, combination of the pins and the PCB is enhanced; as the half-etched grooves are formed in the root parts of the pins, the thickness of metal at the root parts of the pins is reduced, accordingly, tool abrasion is reduced and the quad flat no-lead cutting efficiency is greatly improved.

Description

A kind of lead frame structure of square flat pinless encapsulation and package body structure
Technical field
The present invention relates to lead frame structure and the package body structure of the encapsulation of a kind of square flat pinless, belong to technical field of semiconductor encapsulation.
Background technology
Square flat pinless is encapsulated as one of surface mount packages, and square flat pinless encapsulation is in square or rectangle, and package bottom middle position has one or more exposed pads to be used for heat conduction, encapsulates four sides and is configured with electrode contacts.
When the exposed pads of chip bottom and electrode contacts weld with the hot weld dish on PCB, have gas and escape and cause soldering paste associativity bad.
QFN pin traditional is in addition when excision forming, and as shown in Figure 1, because pin is all solid metal material, be easy to the consume cutting stage property life-span, therefore, the wearing and tearing how reducing cutting tool are also problems.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, the lead frame structure providing a kind of square flat pinless to encapsulate and package body structure, it forms bump structure at lead frame pin root by half-etching, on pcb board when tin cream, utilize siphonic effect that tin cream can be made to climb to pin side more smoothly, utilize tin cream to the grasping force of its coated salient point simultaneously, strengthen the combination of pin and PCB, avoid the problem that upper plate comes off; And because pin root has done half-etching, the metal thickness of pin root is thinning, when packaging body cuts, reduces the wearing and tearing of cutter, improve cutting efficiency.
The object of the present invention is achieved like this: a kind of lead frame structure of square flat pinless encapsulation, it comprise several be matrix arrangement load bearing unit and between load bearing unit for muscle in fixing load bearing unit, described load bearing unit comprises chip carrier and is arranged at the pin array around chip carrier, described middle muscle is connected between the pin array of adjacent two load bearing units, the described pin array back side is provided with salient point near middle muscle place, described salient point is rectangular, is provided with half-etching groove around described rectangle salient point.
Described salient point is rectangle, and described rectangle salient point two ends exceed the width connecting muscle, and described rectangle salient point width is 1/4 ~ 1/2 of pin widths, and rectangle salient point exceeds the length connecting muscle part and extends upwardly to 1/6 ~ 1/4 in pin length side.
Described salient point can be cylindrical or polygon, when salient point is cylindrical, its diameter is 1/4 ~ 1/2 of pin widths, when salient point is polygon, the widest part of this polygon salient point is divided into 1/4 ~ 1/2 of pin widths, and length extends upwardly to 1/6 ~ 1/4 in pin length side.
The half-etching of described middle muscle part is thinning, and the thickness thinning of described middle muscle is 1/8 ~ 2/3 frame thickness.
The width that described half-etching groove widest part is divided is 1/2 ~ 2/3 of pin widths, and length extends upwardly to 1/3 ~ 1/2 in pin length side.
A kind of package body structure of square flat pinless encapsulation, it comprises chip carrier, pin array, chip and protecting colloid, described pin array is arranged at around chip carrier, described chip is arranged on chip carrier, and be electrically connected by plain conductor and described pin array, described protecting colloid covers described chip and plain conductor and part covers described chip carrier and pin array, the described pin array back side is provided with rectangle salient point, the width of described rectangle salient point is 1/4 ~ 1/2 of pin widths, 1/6 ~ 1/4 is extended upwardly in pin length side, half-etching groove is provided with around described salient point, the degree of depth of described half-etching groove is 1/8 ~ 2/3 frame thickness, width is 1/2 ~ 2/3 of pin widths, length extends upwardly to 1/3 ~ 1/2 in pin length side.
Compared with prior art, the present invention has following beneficial effect:
The lead frame structure of a kind of square flat pinless encapsulation of the present invention and package body structure, it forms bump structure at lead frame pin root by half-etching, on pcb board when tin cream, utilize siphonic effect that tin cream can be made to climb to pin side more smoothly, utilize tin cream to the grasping force of its coated salient point simultaneously, strengthen the combination of pin and PCB, avoid the problem that upper plate comes off; And because pin root has done half-etching groove, the metal thickness of pin root is thinning, when packaging body cuts, reduce the wearing and tearing of cutter, increase substantially the cutting efficiency of QFN.
Accompanying drawing explanation
Fig. 1 is the dorsal view of the lead frame structure of traditional square flat pinless encapsulation.
Fig. 2 is the dorsal view of a lead frame structure embodiment of a kind of square flat pinless encapsulation of the present invention.
Fig. 3 is the partial plan layout schematic diagram of a lead frame structure embodiment pin array of a kind of square flat pinless encapsulation of the present invention.
Fig. 4 is the sectional perspective schematic diagram of a lead frame structure embodiment pin array of a kind of square flat pinless encapsulation of the present invention.
Fig. 5 is the partial plan layout schematic diagram of another embodiment pin array of lead frame structure of a kind of square flat pinless encapsulation of the present invention.
Fig. 6 is the sectional perspective schematic diagram of another embodiment pin array of lead frame structure of a kind of square flat pinless encapsulation of the present invention.
Fig. 7 is the partial plan layout schematic diagram of another embodiment pin array of lead frame structure of a kind of square flat pinless encapsulation of the present invention.
Fig. 8 is the schematic diagram of a kind of square flat pinless encapsulation structure of the present invention.
Wherein:
Chip carrier 1
Pin array 2
Middle muscle 3
Salient point 4
Half-etching groove 5.
Embodiment
See Fig. 2, the lead frame structure of a kind of square flat pinless encapsulation of the present invention, it comprise several be matrix arrangement load bearing unit and between load bearing unit for muscle 3 in fixing load bearing unit, described load bearing unit comprises chip carrier 1 and is arranged at the pin array 2 around chip carrier 1, described middle muscle 3 is connected between the pin array 2 of adjacent two load bearing units, described pin array 2 back side is provided with salient point 4 near middle muscle 3 place, described salient point 4 is rectangular, half-etching groove 5 is provided with around described rectangle salient point 4, this salient point 4 and half-etching groove 5 are formed by the pin array back side pin and middle muscle around middle muscle place half-etching salient point, this salient point 4 still can partly retain after removal connects muscle, the width of this salient point 4 reserve part is 1/4 ~ 1/2 of pin widths, length extends upwardly to 1/6 ~ 1/4 in pin length side, the degree of depth of described half-etching groove 5 is 1/8 ~ 2/3 frame thickness, the width that described half-etching groove 5 widest part is divided is 1/2 ~ 2/3 of pin widths, length extends upwardly to 1/3 ~ 1/2 in pin length side, the half-etching of described middle muscle 3 part is thinning, the thickness thinning of described middle muscle is 1/8 ~ 2/3 frame thickness.
Fig. 3 shows the partial plan layout of the structure between two adjacent core bars in Fig. 2 lead frame.Pin array alignment between two adjacent core bars, and link together by connecting muscle.
Fig. 4 is the schematic perspective view of Fig. 3.
Fig. 5 shows the lead frame structure of the another kind of square flat pinless encapsulation of the present invention, and the salient point 4 of its pin array back side near middle muscle place is cylindrical salient point, and the diameter of described cylindrical salient point 4 is 1/4 ~ 1/2 of pin widths.
Fig. 6 is the schematic perspective view of Fig. 5.
Fig. 7 shows the lead frame structure of another square flat pinless of the present invention encapsulation, the salient point 4 of its pin array back side near middle muscle place is polygon salient point, the widest part of this polygon salient point is divided into 1/4 ~ 1/2 of pin widths, and length extends upwardly to 1/6 ~ 1/4 in pin length side.
Fig. 8 shows the package body structure of a kind of square flat pinless encapsulation, it comprises chip carrier, pin array, chip and protecting colloid, described pin array is arranged at around chip carrier, described chip is arranged on chip carrier, and be electrically connected by plain conductor and described pin array, described protecting colloid covers described chip and plain conductor and part covers described chip carrier and pin array, the described pin array back side is provided with rectangle salient point, the width of described rectangle salient point is 1/4 ~ 1/2 of pin widths, 1/6 ~ 1/4 is extended upwardly in pin length side, half-etching groove is provided with around described salient point, the degree of depth of described half-etching groove is 1/8 ~ 2/3 frame thickness, width is 1/2 ~ 2/3 of pin widths, length extends upwardly to 1/3 ~ 1/2 in pin length side.On pcb board when tin cream, utilize siphonic effect that tin cream can be made to climb to pin side more smoothly, utilize tin cream to the grasping force of its coated salient point simultaneously, strengthen the combination of pin and PCB, avoid the problem that upper plate comes off.

Claims (6)

1. the lead frame structure of a square flat pinless encapsulation, it is characterized in that: it comprise several be matrix arrangement load bearing unit and between load bearing unit for muscle (3) in fixing load bearing unit, described load bearing unit comprises chip carrier (1) and is arranged at chip carrier (1) pin array (2) around, described middle muscle (3) is connected between the pin array (2) of adjacent two load bearing units, described pin array (2) back side is provided with salient point (4) near middle muscle (3) place, described salient point (4) is rectangular, described rectangle salient point (4) is provided with half-etching groove (5) around.
2. the lead frame structure of a kind of square flat pinless encapsulation according to claim 1, it is characterized in that: described salient point (4) is rectangle, described rectangle salient point (4) two ends exceed the width connecting muscle (3), described rectangle salient point (4) width is 1/4 ~ 1/2 of pin widths, and rectangle salient point (4) exceeds the length connecting muscle (3) part and extends upwardly to 1/6 ~ 1/4 in pin length side.
3. the lead frame structure of a kind of square flat pinless encapsulation according to claim 1, it is characterized in that: described salient point (4) is cylindrical or polygon, when salient point (4) is for time cylindrical, its diameter is pin widths 1/4 ~ 1/2, when salient point (4) is for polygon, the widest part of this polygon salient point is divided into 1/4 ~ 1/2 of pin widths, and length extends upwardly to 1/6 ~ 1/4 in pin length side.
4. the lead frame structure of a kind of square flat pinless encapsulation according to claim 1, it is characterized in that: the part half-etching of described middle muscle (3) is thinning, the thickness thinning of described middle muscle is 1/8 ~ 2/3 frame thickness.
5. according to a kind of described in claim 1 ~ 4 lead frame structure of square flat pinless encapsulation, it is characterized in that: the width that described half-etching groove (5) widest part is divided is 1/2 ~ 2/3 of pin widths, and length extends upwardly to 1/3 ~ 1/2 in pin length side.
6. the package body structure of a square flat pinless encapsulation, it is characterized in that: it comprises chip carrier, pin array, chip and protecting colloid, described pin array is arranged at around chip carrier, described chip is arranged on chip carrier, and be electrically connected by plain conductor and described pin array, described protecting colloid covers described chip and plain conductor and part covers described chip carrier and pin array, the described pin array back side is provided with rectangle salient point, the width of described rectangle salient point is 1/4 ~ 1/2 of pin widths, 1/6 ~ 1/4 is extended upwardly in pin length side, half-etching groove is provided with around described salient point, the degree of depth of described half-etching groove is 1/8 ~ 2/3 frame thickness, width is 1/2 ~ 2/3 of pin widths, length extends upwardly to 1/3 ~ 1/2 in pin length side.
CN201510071416.7A 2015-02-11 2015-02-11 A kind of lead frame structure and package body structure of square flat pinless encapsulation Active CN104659010B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510071416.7A CN104659010B (en) 2015-02-11 2015-02-11 A kind of lead frame structure and package body structure of square flat pinless encapsulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510071416.7A CN104659010B (en) 2015-02-11 2015-02-11 A kind of lead frame structure and package body structure of square flat pinless encapsulation

Publications (2)

Publication Number Publication Date
CN104659010A true CN104659010A (en) 2015-05-27
CN104659010B CN104659010B (en) 2018-03-16

Family

ID=53249961

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510071416.7A Active CN104659010B (en) 2015-02-11 2015-02-11 A kind of lead frame structure and package body structure of square flat pinless encapsulation

Country Status (1)

Country Link
CN (1) CN104659010B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108417553A (en) * 2017-02-08 2018-08-17 大口电材株式会社 Lead frame and its manufacturing method
CN109119395A (en) * 2017-06-22 2019-01-01 大口电材株式会社 Lead frame and its manufacturing method
CN109346454A (en) * 2018-11-08 2019-02-15 嘉盛半导体(苏州)有限公司 Leadframe strip, method for packaging semiconductor, semiconductor package and its unit
CN110164843A (en) * 2018-02-13 2019-08-23 株式会社三井高科技 The manufacturing method of lead frame, the lead frame with resin, the manufacturing method of the lead frame with resin and semiconductor device
CN111403367A (en) * 2020-05-09 2020-07-10 天水华洋电子科技股份有限公司 Lead frame with increased cross reinforcing ribs

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101436575A (en) * 2007-11-12 2009-05-20 三星Sdi株式会社 Semiconductor package and mounting method thereof
US20100001383A1 (en) * 2006-12-21 2010-01-07 National Semiconductor Corporation Integrated circuit package with molded insulation
CN103531493A (en) * 2012-06-29 2014-01-22 飞思卡尔半导体公司 Semiconductor device package and manufacture method thereof
CN204516751U (en) * 2015-02-11 2015-07-29 江苏长电科技股份有限公司 A kind of lead frame structure of square flat pinless encapsulation and package body structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100001383A1 (en) * 2006-12-21 2010-01-07 National Semiconductor Corporation Integrated circuit package with molded insulation
CN101436575A (en) * 2007-11-12 2009-05-20 三星Sdi株式会社 Semiconductor package and mounting method thereof
CN103531493A (en) * 2012-06-29 2014-01-22 飞思卡尔半导体公司 Semiconductor device package and manufacture method thereof
CN204516751U (en) * 2015-02-11 2015-07-29 江苏长电科技股份有限公司 A kind of lead frame structure of square flat pinless encapsulation and package body structure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108417553A (en) * 2017-02-08 2018-08-17 大口电材株式会社 Lead frame and its manufacturing method
CN108417553B (en) * 2017-02-08 2022-04-26 大口电材株式会社 Lead frame and method for manufacturing the same
CN109119395A (en) * 2017-06-22 2019-01-01 大口电材株式会社 Lead frame and its manufacturing method
CN110164843A (en) * 2018-02-13 2019-08-23 株式会社三井高科技 The manufacturing method of lead frame, the lead frame with resin, the manufacturing method of the lead frame with resin and semiconductor device
CN109346454A (en) * 2018-11-08 2019-02-15 嘉盛半导体(苏州)有限公司 Leadframe strip, method for packaging semiconductor, semiconductor package and its unit
CN109346454B (en) * 2018-11-08 2023-12-15 嘉盛半导体(苏州)有限公司 Lead frame strip, semiconductor packaging method, semiconductor packaging structure and unit thereof
CN111403367A (en) * 2020-05-09 2020-07-10 天水华洋电子科技股份有限公司 Lead frame with increased cross reinforcing ribs

Also Published As

Publication number Publication date
CN104659010B (en) 2018-03-16

Similar Documents

Publication Publication Date Title
CN104659010A (en) Quad flat no-lead package lead frame structure and package structure
US7879653B2 (en) Leadless semiconductor package with electroplated layer embedded in encapsulant and the method for manufacturing the same
US8884414B2 (en) Integrated circuit module with dual leadframe
JP2002076228A (en) Resin-sealed semiconductor device
CN204834611U (en) Lead frame and unit, semiconductor package structure and unit thereof
JP6695156B2 (en) Resin-sealed semiconductor device
CN109390310B (en) Patterned lead frame
CN204516751U (en) A kind of lead frame structure of square flat pinless encapsulation and package body structure
US7095096B1 (en) Microarray lead frame
CN112133694A (en) Semiconductor package and electronic system
CN201725791U (en) Lead frame of small outline integrated circuit package structure and package device
CN209896054U (en) Lead frame, lead frame array and packaging structure
EP2523211B1 (en) Leadframe and method for packaging semiconductor die
CN201262956Y (en) High-power multi-chip packaging structure of integrated circuit
CN203733785U (en) Semiconductor device with improved package structure
CN204516745U (en) A kind of square flat pinless encapsulation structure
CN210668350U (en) Chip bonding lead connection structure and chip packaging structure
CN203277361U (en) Lead frame and its packaging structure
CN106328620A (en) Integrated circuit packaging body and manufacturing method thereof
CN204516752U (en) A kind of lead frame structure of square flat pinless encapsulation
CN101685809B (en) Semiconductor packaging component and conducting wire rack thereof
TWI429351B (en) Memory card package having a small substrate
CN101459154B (en) Conductive wire rack and encapsulation construction applying the conductive wire rack
CN218632028U (en) Semiconductor packaging structure
CN204720443U (en) A kind of QFN framework preventing the second solder joint point disconnected

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant