CN104615510A - Programmable device-based dual-mode redundant fault-tolerant method - Google Patents
Programmable device-based dual-mode redundant fault-tolerant method Download PDFInfo
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Abstract
The invention provides a programmable device-based dual-mode redundant fault-tolerant method. The method comprises the following steps: mapping a circuit to a lookup table, extracting redundant circuit information from the lookup table, and establishing a circuit topological structure according to the redundant circuit information; calculating the fixed fault propagation probability of the output end of the lookup table according to the circuit topological structure, and saving the fixed fault propagation probability in a database of the circuit topological structure; calculating a preset number of lookup tables according to the fixed fault propagation probability; reinforcing the programmable device according to the preset number of lookup tables. According to the programmable device-based dual-mode redundant fault-tolerant method, the reliability of a circuit can be improved.
Description
Technical field
The present invention relates to digital display circuit fault-tolerant technique field, particularly relate to a kind of duplication redundancy fault-tolerance approach based on programming device.
Background technology
Programming device has the construction cycle is short, cost is low, dirigibility is high feature and is widely used in electronic system design, based on the fpga chip of SRAM configuration, the realization of its function relies on inner configuration data completely, FPGA device based on SRAM type is easily subject to single-particle inversion (Single Event Upset in space radiation environment, SEU) impact, the FPGA system design therefore based on SRAM answers emphasis to consider single-particle inversion.
At present, the programming device fault-tolerant technique of comparative maturity is that redundancy coordinates periodic refreshing, and commonplace redundancy is triplication redundancy, triplication redundancy is that ifq circuit is copied three parts, can export correct result by comparing when one of them circuit makes a mistake, but there is the excessive problem of circuit overhead in triplication redundancy technology.
In order to save the circuit overhead in triplication redundancy technology, connect voting machine by the output terminal in protected circuit part, remaining circuit then keeps original syndeton constant, and the method suitably can reduce expense, but can reduce the reliability of circuit.
Summary of the invention
Duplication redundancy fault-tolerance approach based on programming device provided by the invention, can improve the reliability of circuit.
According to an aspect of the present invention, a kind of duplication redundancy fault-tolerance approach based on programming device is provided, comprises: circuit is mapped as look-up table, from described look-up table, extract redundant circuit information, and according to described redundant circuit information architecture circuit topological structure; Calculate the persistent fault probability of spreading of the output terminal of described look-up table according to described circuit topological structure, and described persistent fault probability of spreading is stored in the database of described circuit topological structure; The look-up table of predetermined quantity is calculated according to described persistent fault probability of spreading; Look-up table according to described predetermined quantity is reinforced programming device.
The duplication redundancy fault-tolerance approach based on programming device that the embodiment of the present invention provides, by building circuit topological structure, the persistent fault probability of spreading of the output terminal of look-up table is calculated according to circuit topological structure, the look-up table of predetermined quantity is calculated according to persistent fault probability of spreading, and the look-up table of predetermined quantity is reinforced programming device, thus improve the reliability of circuit.
Accompanying drawing explanation
The duplication redundancy fault-tolerance approach process flow diagram based on programming device that Fig. 1 provides for the embodiment of the present invention;
The method flow diagram of the look-up table by reliability constraint calculating that Fig. 2 provides for the embodiment of the present invention;
The reinforcement means process flow diagram of the programming device that Fig. 3 provides for the embodiment of the present invention.
Embodiment
General plotting of the present invention is, by building circuit topological structure, the persistent fault probability of spreading of the output terminal of look-up table is calculated according to circuit topological structure, the look-up table of predetermined quantity is calculated according to persistent fault probability of spreading, and the look-up table according to predetermined quantity is reinforced programming device, thus improve the reliability of circuit.
Below in conjunction with accompanying drawing, the duplication redundancy fault-tolerance approach based on programming device that the embodiment of the present invention provides is described in detail.
The duplication redundancy fault-tolerance approach process flow diagram based on programming device that Fig. 1 provides for the embodiment of the present invention.
With reference to Fig. 1, in step S101, circuit is mapped as look-up table, from described look-up table, extracts redundant circuit information, and according to described redundant circuit information architecture circuit topological structure.
Here, look-up table is used for realizing combinational logic and sequential logic, and it is a RAM in essence that look-up table is called for short LUT, LUT.At present, by the LUT that use 4 inputs in FPGA, each LUT can regard the RAM of 16 ﹡ 1 of 4 bit address lines as, after user describes a logical circuit by schematic diagram or HDL language, FPGA can the result of automatic calculation logic circuit, and result is stored in RAM.
In step S102, calculate the persistent fault probability of spreading of the output terminal of described look-up table according to described circuit topological structure, and described persistent fault probability of spreading is stored in the database of described circuit topological structure.
Here, the correct result that 1 (0) fault can have influence on circuit output end is fixed to circuit node, this node sensitization must be first made to be 0 (1), therefore first by the probability that each node of circuit topological structure calculating from front to back controlled is 0,1, this probability is called the controllability of node in circuit test theory.Need this fault can be blazed abroad by output in addition, therefore need by each node probability of spreading of circuit topological structure calculating from back to front, this probability is called the observability of node in circuit test theory, the observability of integration node and controllability just can obtain each node generation persistent fault and have influence on the possibility size of circuit output end correct result.
According to exemplary embodiment of the present invention, the persistent fault probability of spreading calculating the output terminal of described look-up table according to described circuit topological structure comprises:
In step S1021, calculate the probability of the logical value of the output terminal of described look-up table by the first order according to described circuit topological structure.
In step S1021, the probability of logical value is the probability of logical value 1 or 0.Can be such as, but be not limited to, be specially the original input end logical value of circuit be 0 or 1 probability be 0.5, then according to the content of look-up table dispensing unit step by step backward in counting circuit the probability of each node logical value 0 be P (0), the probability of logical value 1 is P (1).
In step S1022, calculate the observability of the output terminal of described look-up table by the second order according to described circuit topological structure.
In step S1022, can be 1 such as, but not limited to, the observability being specially the original output terminal of circuit, i.e. Observable completely, then calculates forward the observability O of each node in counting circuit step by step according to the content of look-up table dispensing unit.
In step S1023, calculate the persistent fault probability of spreading of the output terminal of described look-up table according to the probability of described logical value and described observability.
In circuit, to refer to that this node is sensitized be 1 and can by error propagation to output terminal for 0 (1) probability of failure propagation of fixing of certain node, thus cause output terminal to output the probability of error result, what calculate look-up table output terminal respectively by formula (1) and formula (2) fixes 0,1 probability of failure propagation F (P (0)) and F (P (1)).
F(P(0))＝P(0)×O (1)
F(P(1))＝P(1)×O (2)
In step S103, calculate the look-up table of predetermined quantity according to described persistent fault probability of spreading.
Here, calculate by area-constrained the number needing the look-up table copied, calculate according to area-constrained the look-up table number needing to copy, be designated as Na.In FPGA circuit, circuit area can be equivalent to the number of the look-up table that realizing circuit function needs, therefore this step calculates according to area-constrained the look-up table number needing to copy, such as certain circuit function needs 1000 look-up tables to realize, after asking use reinforcement means of the present invention, circuit area overhead can not exceed 30% of original circuit, then the look-up table number Na=1000 × 30%=300 that can copy.
According to exemplary embodiment of the present invention, described predetermined quantity is the first quantity, and the described look-up table according to described persistent fault probability of spreading calculating predetermined quantity comprises:
In step S1031, described persistent fault probability of spreading is sorted by the 3rd order.
Here, the 3rd order refers to and to sort by order from big to small.
In step S1032, the look-up table choosing the first quantity from the look-up table that the persistent fault probability of spreading of sequence is corresponding copies, and marks the described look-up table of the first quantity and the fault type of shielding.
Here, the look-up table in the look-up table corresponding to persistent fault probability of spreading of sequence one by one in marking circuit the need of copying, until the number of the look-up table of mark is Na.
According to exemplary embodiment of the present invention, described predetermined quantity is the second quantity, and the described look-up table according to described persistent fault probability of spreading calculating predetermined quantity also comprises:
In step S1033, described persistent fault probability of spreading is sorted by described 3rd order.
In step S1034, the look-up table choosing the second quantity from the look-up table that the persistent fault probability of spreading of described sequence is corresponding copies, and marks the described look-up table of the second quantity and the fault type of shielding.
In step S1035, the look-up table of described second quantity is reinforced described circuit, obtains the reliability of the circuit reinforced.
In step S1036, if the reliability of the circuit of described reinforcing is close to the target reliabilities of the circuit of described reinforcing, then completes and copy; If the reliability of the circuit of described reinforcing keeps off the target reliabilities of the circuit of described reinforcing, then the look-up table choosing the 3rd quantity from the look-up table that the persistent fault probability of spreading of described sequence is corresponding copies.
The method flow diagram of the concrete reference look-up table by reliability constraint calculating as shown in Figure 2.
Step S41, according to the look-up table probability of failure propagation in circuit topological structure database, sorts by fixing 0,1 probability of failure propagation from big to small by look-up tables all in circuit.
Step S42, setup parameter initial value: L=0, H=T, wherein T is the look-up table number that whole circuit comprises.
Here, employing binary search is searched in this step, and wherein, L is search lower limit, and H is the search upper limit, and hunting zone is all look-up tables for the first time.
Step S43, getting reproducible look-up table number N is the intermediate value of hunting zone.
Step S44, marks the look-up table needing to copy from big to small one by one, the fault type that will shield with tense marker in the sorted look-up table of step S41 according to the reproducible look-up table number N obtained in step S43.
Step S45, calculates the reliability Rn of circuit after reinforcing.
Here, if the possibility that circuit is made mistakes is evenly distributed, namely the probability of each look-up table output terminal output persistent fault is identical, the reliability of so whole circuit can represent with the mean value of each look-up table probability of failure propagation of forming circuit, wherein certain look-up table is copied and with (or) logic reinforce after it fixes 1 (0) fault by conductively-closed, therefore, during the circuit reliability after reinforcing calculates, remove and reinforce the stuck at 1 fault probability of spreading of look-up table and the stuck at 0 fault probability of spreading with "or" logic reinforcing look-up table by "AND" logic.
Step S46, compares the target reliabilities value R of Rn and reinforcing circuit, if the value of Rn is within the scope of acceptable reliability, stops search, otherwise perform step S47.
Step S47, compares Rn and reinforces the target reliabilities value R of circuit, if the look-up table that will copy that Rn is greater than R description selection is too much, needs to be limited to from down between intermediate value and re-starts binary search, then perform step S48; If the look-up table that will copy that Rn is less than R description selection is very few, need to re-start binary search between intermediate value to the upper limit, then perform step S49.
Step S48, redefines search bound, wherein, and L=0, H=N, and perform step S43, again search for the number of suitable look-up table to be copied.
Step S49, redefines search bound, wherein, and L=N, H=T, and perform step S43, again search for the number of suitable look-up table to be copied.
In step S104, the look-up table of described predetermined quantity is reinforced programming device.
Here, the look-up table of predetermined quantity is the look-up table needing to copy.
According to exemplary embodiment of the present invention, the look-up table of described predetermined quantity carries out reinforcing to programming device and comprises, and repeats following process, until the look-up table of whole described predetermined quantity is all traversed:
In step S1041, from the look-up table of described predetermined quantity, choose the first look-up table, judge the fault type of the shielding of described first look-up table.
Here, the first look-up table is the look-up table chosen arbitrarily from the look-up table of predetermined quantity.
In step S1042, if the fault type of the shielding of described first look-up table is the first kind, be then connected the first voting machine at the look-up table of described predetermined quantity with the output terminal of described look-up table.
In step S1043, if the fault type of the shielding of described first look-up table is Second Type, be then connected the second voting machine at the look-up table of described predetermined quantity with the output terminal of described look-up table.
Here, the first voting machine is " with logic " voting machine, and the second voting machine is " or logic " voting machine.
The reinforcement means process flow diagram of concrete reference programming device as shown in Figure 3.
Step S51, a look-up table node in selection circuit, the information of this look-up table in reading database.
Step S52, judges that this look-up table is the need of copying, if need to copy, then performs step S53, otherwise performs step S51, select next look-up table and read information.
Step S53: judge that look-up table needs the fault type by copying shielding, if be shielding stuck at 1 fault, then performs step S54, if be shielding stuck at 0 fault, then performs step S55.
Step S54: be connected " with logic " with the output terminal of look-up table at the look-up table copied as voting machine.
Here, when the equal non-fault of two look-up tables, then correct result is exported; If one of them look-up table there occurs stuck at 1 fault, " with logic " voting machine still can export correct result.
Step S55: be connected " or logic " with the output terminal of look-up table as voting machine at the look-up table copied.
Here, when the equal non-fault of two look-up tables, then correct result is exported; If one of them look-up table there occurs stuck at 0 fault, then " or logic " voting machine still can export correct result.
Step S56: check whether the look-up table in circuit all travels through, if all do not traveled through, then performs step S51; If all traveled through, then terminate.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; change can be expected easily or replace, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (5)
1. based on a duplication redundancy fault-tolerance approach for programming device, it is characterized in that, described method comprises:
Circuit is mapped as look-up table, from described look-up table, extracts redundant circuit information, and according to described redundant circuit information architecture circuit topological structure;
Calculate the persistent fault probability of spreading of the output terminal of described look-up table according to described circuit topological structure, and described persistent fault probability of spreading is stored in the database of described circuit topological structure;
The look-up table of predetermined quantity is calculated according to described persistent fault probability of spreading;
Look-up table according to described predetermined quantity is reinforced programming device.
2. method according to claim 1, is characterized in that, the described persistent fault probability of spreading calculating the output terminal of described look-up table according to described circuit topological structure comprises:
Calculate the probability of the logical value of the output terminal of described look-up table by the first order according to described circuit topological structure;
Calculate the observability of the output terminal of described look-up table by the second order according to described circuit topological structure;
The persistent fault probability of spreading of the output terminal of described look-up table is calculated according to the probability of described logical value and described observability.
3. method according to claim 2, is characterized in that, described predetermined quantity is the first quantity, and the described look-up table according to described persistent fault probability of spreading calculating predetermined quantity comprises:
Described persistent fault probability of spreading is sorted by the 3rd order;
The look-up table choosing the first quantity from the look-up table that the persistent fault probability of spreading of sequence is corresponding copies, and marks the described look-up table of the first quantity and the fault type of shielding.
4. method according to claim 3, is characterized in that, described predetermined quantity is the second quantity, and the described look-up table according to described persistent fault probability of spreading calculating predetermined quantity also comprises:
Described persistent fault probability of spreading is sorted by described 3rd order;
The look-up table choosing the second quantity from the look-up table that the persistent fault probability of spreading of described sequence is corresponding copies, and marks the described look-up table of the second quantity and the fault type of shielding;
The look-up table of described second quantity is reinforced described circuit, obtains the reliability of the circuit reinforced;
If the reliability of the circuit of described reinforcing is close to the target reliabilities of the circuit of described reinforcing, then completes and copy; If the reliability of the circuit of described reinforcing keeps off the target reliabilities of the circuit of described reinforcing, then the look-up table choosing the 3rd quantity from the look-up table that the persistent fault probability of spreading of described sequence is corresponding copies.
5. method according to claim 4, is characterized in that, the described look-up table according to predetermined quantity carries out reinforcing to programming device and comprises, and repeats following process, until the look-up table of whole described predetermined quantity is all traversed:
From the look-up table of described predetermined quantity, choose the first look-up table, judge the fault type of the shielding of described first look-up table;
If the fault type of the shielding of described first look-up table is the first kind, be then connected the first voting machine at the look-up table of described predetermined quantity with the output terminal of described look-up table;
If the fault type of the shielding of described first look-up table is Second Type, be then connected the second voting machine at the look-up table of described predetermined quantity with the output terminal of described look-up table.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109144793A (en) * | 2018-09-07 | 2019-01-04 | 合肥工业大学 | A kind of fault correction device and method calculated based on data flow driven |
| CN111669326A (en) * | 2020-05-07 | 2020-09-15 | 桂林电子科技大学 | Shortest route implementation method based on FPGA |
| CN113721135A (en) * | 2021-07-22 | 2021-11-30 | 南京航空航天大学 | SRAM type FPGA fault online fault tolerance method |
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| CN102541697A (en) * | 2010-12-31 | 2012-07-04 | 中国航空工业集团公司第六三一研究所 | Switching method for processing fault of dual-redundancy computer |
| CN104268253A (en) * | 2014-10-09 | 2015-01-07 | 中国科学院自动化研究所 | Partial triplication redundancy method based on lookup table configuration bit statistics |
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2015
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6141769A (en) * | 1996-05-16 | 2000-10-31 | Resilience Corporation | Triple modular redundant computer system and associated method |
| CN102541697A (en) * | 2010-12-31 | 2012-07-04 | 中国航空工业集团公司第六三一研究所 | Switching method for processing fault of dual-redundancy computer |
| CN104268253A (en) * | 2014-10-09 | 2015-01-07 | 中国科学院自动化研究所 | Partial triplication redundancy method based on lookup table configuration bit statistics |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109144793A (en) * | 2018-09-07 | 2019-01-04 | 合肥工业大学 | A kind of fault correction device and method calculated based on data flow driven |
| CN111669326A (en) * | 2020-05-07 | 2020-09-15 | 桂林电子科技大学 | Shortest route implementation method based on FPGA |
| CN111669326B (en) * | 2020-05-07 | 2022-07-29 | 桂林电子科技大学 | Shortest route implementation method based on FPGA |
| CN113721135A (en) * | 2021-07-22 | 2021-11-30 | 南京航空航天大学 | SRAM type FPGA fault online fault tolerance method |
| CN113721135B (en) * | 2021-07-22 | 2022-05-13 | 南京航空航天大学 | SRAM type FPGA fault online fault tolerance method |
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