CN104601152A - Power-on and -off resetting circuit - Google Patents
Power-on and -off resetting circuit Download PDFInfo
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- CN104601152A CN104601152A CN201510081501.1A CN201510081501A CN104601152A CN 104601152 A CN104601152 A CN 104601152A CN 201510081501 A CN201510081501 A CN 201510081501A CN 104601152 A CN104601152 A CN 104601152A
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Abstract
The invention discloses a power-on and -off resetting circuit. The power-on and -off resetting circuit comprises a resistance proportion divider circuit, a single-stage amplifier, a level shaping circuit and a threshold adjustment circuit, wherein the resistance proportion divider circuit is composed of a plurality of resistors serially connected between a power source and the ground and is used for detecting voltage of a sampling power source, the input end of the single-stage amplifier is connected with a divider reference node of the resistance proportion divider circuit and used for amplifying difference between the reference node voltage and the preset threshold, the input end of the level shaping circuit is connected with the output end of a single-stage amplifier and used for shaping output signals of the single-stage amplifier and transmitting resetting signals, and the threshold adjustment circuit is crossly connected between the resistance proportion divider circuit and the output of the single-stage amplifier circuit and used for threshold adjustment during power-on and -off resetting. According to the power-on and -off resetting circuit, resetting signals can be correctly outputted under the condition of slow increase of power source voltage or multiple power-on times, and reliability in chip power on and off is ensured.
Description
Technical field
Invention relates to integrated circuit (IC) design field, is specifically related to a kind of electrification reset, power-off reset circuit.
Background technology
Electrify restoration circuit (POR), power-off reset circuit (BOR) are the basic module circuit of integrated circuit (IC) design.Electrify restoration circuit is used in chip power power up, providing reset signal or enabling signal, to ensure that chip is started working under correct initial state.Power-off reset circuit is used for providing reset signal in chip power power down process, makes chip return to initial state, until the thorough power down of power supply;
The electrify restoration circuit adopted in current integrated circuit, postpones to design based on RC substantially.As shown in Figure 1, for the most basic based on RC power-on delay reset circuit.To connect RC filter circuit (being made up of R0, C0) between power supply (VDD) with ground (VSS), the output of filter circuit meets inverter INV0, and inverter outputs and electrification reset output signal Reset_N (Low level effective).This circuit deposits shortcoming both ways: one, supply voltage slowly rises, and electrify restoration circuit leaping voltage seriously offsets downward, and causes reset function to lose efficacy (its input-output wave shape figure as shown in Figure 2).Two, when the quick power down of power supply powers on again, because the electric charge on electric capacity cannot pass through the quick bleed off of back biased diode, when may cause again powering on, correctly reset signal can not be produced., all more or less there is the problem of above two aspects in other optimized circuit done based on Fig. 1, thus the reliability of influential system.
Summary of the invention
For the unreliable problem of the reset existed in prior art, the invention provides a kind of new design, the program has abandoned the design philosophy that tradition postpones based on RC, is integrated with power-off reset function and the quick detachment function of overturn point simultaneously.Program circuit structure is simple, and area is little, good reliability;
For achieving the above object, the present invention adopts following technical scheme:
A kind of electrification reset, power-off reset circuit, comprise resistance ratio bleeder circuit, one-stage amplifier circuit, level shaping circuit and threshold adjustment circuit, described resistance ratio bleeder circuit by multiple resistant series in power supply, between ground, for detecting sampling supply voltage, the dividing potential drop reference node of described one-stage amplifier circuit input end contact resistance proportion divider circuit, for amplifying difference between reference node voltage and setting threshold, described level shaping circuit input connects one-stage amplifier output, for the shaping of one-stage amplifier output signal, and send reset signal, described threshold adjustment circuit is connected across between resistance ratio bleeder circuit and one-stage amplifier circuit export, for electrification reset, adjusting thresholds during power-off reset,
Beneficial effect of the present invention is:
No matter power supply electrifying speed is fast or slow, also or power supply repeatedly repeat to power on, all ensure correctly to export reset signal, good reliability.Be integrated with power-off reset function not increasing in chip area situation, integrated level is high.Power on threshold value, power down threshold value is adjustable, convenient, flexible.
accompanying drawing is introduced
Fig. 1 be prior art the most basic based on RC power-on delay reset circuit schematic diagram;
Fig. 2 is the input-output wave shape figure of prior art in power supply slowly rising situation;
Fig. 3 be the present invention propose integrated electrification reset, power-off reset embodiment one circuit theory diagrams;
To be the present embodiment one slowly rise and input-output wave shape figure in decline situation at power supply Fig. 4;
To be the present embodiment one repeat to power at power supply Fig. 5, input-output wave shape figure under power-down conditions;
Fig. 6 be the present invention propose integrated electrification reset, power-off reset embodiment two circuit theory diagrams;
Fig. 7 be the present invention propose integrated electrification reset, power-off reset embodiment three circuit theory diagrams.
Embodiment
For make technical scheme set forth in the present invention and beneficial effect more clear understand, below in conjunction with drawings and the specific embodiments, the present invention will be further described.Should be appreciated that embodiment described herein is only used for explaining the present invention, be not intended to limit the present invention;
Embodiment one:
Fig. 3 shows the circuit theory diagrams of the integrated electrification reset of the present invention, power-off reset embodiment one.Described electrification reset, power-off reset circuit 100 connect to form resistance ratio bleeder circuit and with the pull-up load of resistance as one-stage amplifier using multiple resistant series;
Electrification reset, power-off reset circuit 100 comprise resistance ratio bleeder circuit 10, one-stage amplifier circuit 20, level shaping circuit 30 and threshold adjustment circuit 40.Described resistance ratio bleeder circuit 10 comprises the first resistance R0, the second resistance R1, the 3rd resistance R2, the 4th resistance R3, is series at successively between VDD-to-VSS, for detecting sampling supply voltage.Being dividing potential drop reference node A between first resistance R0 and the second resistance R1, is dividing potential drop reference node net0 between the second resistance R1 and the 3rd resistance R2, is dividing potential drop reference node B between the 3rd resistance R2 and the 4th resistance R3.Described one-stage amplifier circuit 20 comprises the second NMOS tube NM1 and the 5th resistance R4, for amplifying reference node voltage and setting threshold difference.The grid of the second NMOS tube NM1 meets dividing potential drop reference node net0, the source ground of the second NMOS tube NM1, and the drain electrode of the second NMOS tube NM1 is connected with one end of the 5th resistance R4, and the other end of this node coating-forming voltage reference node net1, the 5th resistance R4 connects power supply.Described level shaping circuit 30 comprises Schmidt trigger SMT0, for the shaping of one-stage amplifier output signal, and sends reset signal.The input of SMT0 connects voltage reference node net1, and output is reset signal Reset_N.Described threshold adjustment circuit 40 comprises the first NMOS tube NM0 and the first PMOS PM0, for threshold voltage adjustment when electrification reset, power-off reset.The grid of the first NMOS tube NM0 meets voltage reference node net1, the drain electrode of the first NMOS tube NM0 meets reference node B, the source ground of the first NMOS tube NM0, the grid of the first PMOS PM0 meets reference node net1, the drain electrode of the first PMOS PM0 meets reference node A, and the source electrode of the first PMOS PM0 connects power supply;
Electrify restoration circuit operation principle is: initial period, and supply voltage is very low, and proportion resistor divider node net0 voltage is lower than the threshold voltage of Vth1(NM1 pipe), NM1 ends, and net1 is drawn high by R4, and PM0 ends, R0 connects place in circuit, and NM0 conducting, R3 is by NM0 short circuit.Meanwhile, it is 0 that SMT0 exports Reset_N, and circuit is in reset mode.When vdd voltage rises to net0(gradually
) when equaling Vth1, NM1 conducting, net1 is dragged down, and it is 1 that SMT0 exports Reset_N, and circuit reset terminates, and circuit enters normal operating conditions.On the other hand, PM0 conducting is by R0 short circuit, and NM0 cut-off makes R3 series connection place in circuit.This state variation causes net0 voltage jump, by voltage before overturn point
saltus step is voltage after overturn point
if, R3≤R0, known, net0 voltage uprises, and this impels net1 to drag down further;
Above-mentioned introduction is learnt, electrify restoration circuit exists positive feedback near overturn point, and this positive feedback can make supply voltage depart from overturn point fast in power up, can not cause the jitter problem near overturn point, enhance system reliability.Pass through equation
can calculate electrification reset voltage threshold is: VDD=
, the value of choose reasonable R0, R1, R2, just can arrange electrification reset threshold value;
Power-off reset circuit working principle is: initial period, and vdd voltage is higher, and circuit is in normal operating conditions.Net1 is low, and PM0 conducting is by R0 short circuit, and NM0 cut-off makes R3 series connection place in circuit.When vdd voltage drops to node voltage net0 gradually
when equaling Vth1, NM1 ends, and net1 is driven high.It is 0 that SMT0 exports Reset_N, and circuit reenters reset mode, until the complete power down of system.On the other hand, PM0 cut-off makes R0 series connection place in circuit, and NM0 conducting is by R3 short circuit.This state variation causes net0 voltage jump equally, by voltage before overturn point
saltus step is voltage after upset
if, R3≤R0, known, net0 voltage step-down, this impels net1 to draw high further;
Above-mentioned introduction is learnt equally, and power-off reset circuit exists positive feedback near overturn point, and this positive feedback can make supply voltage depart from overturn point fast in power down process, can not cause the jitter problem near overturn point equally, enhance the reliability of system.Pass through equation
, can calculate power-off reset voltage threshold is: VDD=
, the value of choose reasonable R1, R2, R3, just can arrange power-off reset threshold value;
The meaning of power-off reset is, in system power failure process, preferentially by system reset, and the then thorough power down of waiting system.Because integrated circuit (IC) system power down has such feature, the incipient stage, system power failure is very fast, and afterwards, system power failure is very slow, waits for that thorough power down needs long time.If in power down process, system logic state does not reset in time and occurs mistake, and power on again, then the logic after starting there will be disorder;
In this electrification reset, power-off reset circuit, the ascending threshold of SMT0 is set as that the magnitude of voltage that powers on of 60%-80%, falling-threshold value are set as the magnitude of voltage that powers on of 20%-40%, is conducive to the shake reducing overturn point between wide stagnant regions.Second NMOS tube NM1 adopts the long ditch of large breadth length ratio to device, and the first NMOS tube NM0, the first PMOS PM0 adopt the short channel device of large breadth length ratio, is conducive to the setting accuracy improving electrification reset threshold value, power-off reset threshold value;
Known above, owing to not using capacitor element, be integrated with power-off reset function and the quick detachment function of overturn point simultaneously, make this programme not deposit shortcoming as previously mentioned.Fig. 4 gives and adopts the present invention slowly to rise and input-output wave shape figure in decline situation at voltage.Fig. 5 gives and adopts the input-output wave shape figure of the present invention under repeatedly electrifying condition;
Embodiment two:
Fig. 6 shows the circuit theory diagrams of the integrated electrification reset of the present invention, power-off reset embodiment two.With embodiment one unlike, use PMOS to realize the series connection dividing potential drop of resistance and the pull-up load of one-stage amplifier in the present embodiment.When low-power consumption requires strict, the scheme of embodiment one, needs starting resistance and pull-up resistor to arrange larger, so can take more silicon area.And in concentrated circuit, the long channel device being operated in linear zone can play equivalent resistance effect.Below in conjunction with Fig. 7 tell about with PMOS carry out resistance substitute, with PM14, PM15 for example, by PM14, the grid of PM15 connects and ground connection, the one termination power vd D of PM14, one end of another termination PM15, and another termination net1 of PM15, so, PM14, PM15 are operated in linear zone, are equivalent to two resistant series.PMOS parameter is rationally set, comprises grid width, channel length, series connection number, equivalent resistance as identical in R4 in Fig. 3 can be obtained.Other resistance is alternative equally according to above-mentioned rule, then the technical characteristic in the present embodiment, as embodiment one, repeats no more herein;
It is to be noted, PMOS substitutional resistance can be used, also can use NMOS tube substitutional resistance, also can intersect substitutional resistance.Can replacing whole resistance, also can Some substitute resistance, depending on circuit specific requirement;
Embodiment three:
Fig. 7 shows the circuit theory diagrams of the integrated electrification reset of the present invention, power-off reset embodiment three.With embodiment one unlike, use general-purpose diode Diode or clamp diode Zener Diode to realize the series connection dividing potential drop of resistance in the present embodiment.Below in conjunction with Fig. 7 tell about with Diode or Zener diode carry out resistance substitute.In integrated circuit, the forward voltage drop of Diode is generally at about 0.7V, the anti-phase clamp voltage of Zener diode is generally in about 6.5V (depending on technique doping), and through overcurrent on resistance, pressure drop can be produced on resistance, if the forward voltage drop of ohmically pressure drop and Diode or identical with the anti-phase clamp voltage of Zener diode, then their effect equivalences.Need difference, the circuit of Diode with Zener diode is connected and has directivity, and generally, the anode of Diode connects high potential, and negative electrode connects low spot position, and the negative electrode of Zener diode connects high potential, and anode connects electronegative potential.Concrete connection see the D0 in Fig. 7, D2, ZD4.Other resistance is alternative equally according to above-mentioned rule, then the technical characteristic in the present embodiment, as embodiment one, no longer describes in detail herein;
It is to be noted equally, Diode tube resistor can be used, also can use Zener diode substitutional resistance, also can intersect substitutional resistance.Can replacing whole resistance, also can Some substitute resistance, depending on circuit specific requirement;
Also has other execution mode, as PMOS, NMOS, resistance, this several device of Diode, Zener diode carries out combination in any on the basis of equivalent resistance, or the Schmidt trigger SMT0 in Fig. 3 is replaced with general inverter INV0, or increase cascade quantity of Schmidt trigger or inverter etc., technical characteristic of the present invention can be realized;
The above embodiment only have expressed several exemplary embodiment of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that to one skilled in the art, do not departing under concept thereof of the present invention that some distortion made or improve and optimizate all belong to protection scope of the present invention.
Claims (9)
1. an electrification reset, power-off reset circuit, it is characterized in that, comprise resistance ratio bleeder circuit, one-stage amplifier circuit, level shaping circuit and threshold adjustment circuit, described resistance ratio bleeder circuit by multiple resistant series in power supply, between ground, for detecting sampling supply voltage, the dividing potential drop reference node of described one-stage amplifier circuit input end contact resistance proportion divider circuit, for amplifying difference between reference node voltage and setting threshold, described level shaping circuit input connects one-stage amplifier output, for the shaping of one-stage amplifier output signal, and send reset signal, described threshold adjustment circuit is connected across between resistance ratio bleeder circuit and one-stage amplifier circuit export, for electrification reset, adjusting thresholds during power-off reset.
2. electrification reset, power-off reset circuit as claimed in claim 1, it is characterized in that, described resistance ratio bleeder circuit comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, power supply, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, between be sequentially connected in series; Being dividing potential drop reference node A between first resistance and the second resistance, is dividing potential drop reference node net0 between the second resistance and the 3rd resistance, is dividing potential drop reference node B between the 3rd resistance and the 4th resistance.
3. electrification reset, power-off reset circuit as claimed in claim 1, it is characterized in that, described one-stage amplifier circuit comprises the second NMOS tube and the 5th resistance, the grid of the second NMOS tube meets dividing potential drop reference node net0, the source ground of the second NMOS tube, the drain electrode of the second NMOS tube is connected with one end of the 5th resistance, this node coating-forming voltage reference node net1, and the other end of the 5th resistance connects power supply.
4. electrification reset, power-off reset circuit as claimed in claim 1, it is characterized in that, described level shaping circuit is bilateral Schmidt trigger; The input of Schmidt trigger connects voltage reference node net1, and the output of Schmidt trigger is reset signal.
5. electrification reset, power-off reset circuit as claimed in claim 1, it is characterized in that, described threshold adjustment circuit comprises the first NMOS tube and the first PMOS, the grid of the first NMOS tube meets voltage reference node net1, the drain electrode of the first NMOS tube meets reference node B, the source ground of the first NMOS tube, and the grid of the first PMOS meets reference node net1, the drain electrode of the first PMOS meets reference node A, and the source electrode of the first PMOS connects power supply.
6. electrification reset, power-off reset circuit as claimed in claim 1, it is characterized in that, the resistance of described 4th resistance is no more than the resistance of the first resistance.
7. as electrification reset, power-off reset circuit that claim 3 is narrated, it is characterized in that, described second NMOS tube is the long channel device of large breadth length ratio.
8. electrification reset, power-off reset circuit as claimed in claim 4, it is characterized in that, the ascending threshold of described Schmidt trigger is set as the magnitude of voltage that powers on of 60%-80%, and the falling-threshold value of described Schmidt trigger is set as the magnitude of voltage that powers on of 20%-40%.
9. electrification reset, power-off reset circuit as claimed in claim 5, it is characterized in that, described first NMOS tube, the first PMOS are the short channel device of large breadth length ratio.
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| CN201510081501.1A CN104601152A (en) | 2015-02-15 | 2015-02-15 | Power-on and -off resetting circuit |
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| CN201510081501.1A CN104601152A (en) | 2015-02-15 | 2015-02-15 | Power-on and -off resetting circuit |
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| CN201510081501.1A Pending CN104601152A (en) | 2015-02-15 | 2015-02-15 | Power-on and -off resetting circuit |
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Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106340318A (en) * | 2015-07-10 | 2017-01-18 | 爱思开海力士有限公司 | Power On Reset Circuit And Semiconductor Memory Device Including The Same |
| CN106411300A (en) * | 2016-09-26 | 2017-02-15 | 上海华力微电子有限公司 | Power-on reset circuit |
| CN106533407A (en) * | 2016-11-09 | 2017-03-22 | 上海华力微电子有限公司 | Power on reset circuit |
| CN107341075A (en) * | 2017-08-28 | 2017-11-10 | 北京融通高科微电子科技有限公司 | Power-down protection apparatus and electronic equipment |
| CN109257035A (en) * | 2018-08-30 | 2019-01-22 | 龙迅半导体（合肥）股份有限公司 | A kind of electrification reset circuit |
| CN109560795A (en) * | 2017-09-27 | 2019-04-02 | 深圳市汇春科技股份有限公司 | A kind of low voltage reset circuit |
| CN110134174A (en) * | 2018-02-08 | 2019-08-16 | 华邦电子股份有限公司 | Reset circuit of starting power source with hysteresis function |
| CN110798187A (en) * | 2019-10-30 | 2020-02-14 | 湖南融创微电子有限公司 | Power-on reset circuit |
| CN111654271A (en) * | 2020-05-22 | 2020-09-11 | 北京智芯微电子科技有限公司 | Power-on reset circuit and chip |
| CN111900964A (en) * | 2020-08-13 | 2020-11-06 | 南京物间科技有限公司 | Power-on reset and power-off reset circuit with accurate threshold point |
| CN111934657A (en) * | 2020-08-13 | 2020-11-13 | 南京物间科技有限公司 | Low-power-consumption power-on reset and power-off reset circuit |
| CN112838850A (en) * | 2020-12-30 | 2021-05-25 | 合肥市芯海电子科技有限公司 | Power-on reset circuit, integrated circuit and electronic equipment |
| CN113114191A (en) * | 2021-04-20 | 2021-07-13 | 珠海博雅科技有限公司 | Reset circuit, circuit board and reset device |
| CN114006605A (en) * | 2021-12-31 | 2022-02-01 | 峰岹科技(深圳)股份有限公司 | Single-edge delay circuit |
| US11431335B2 (en) | 2020-09-30 | 2022-08-30 | Shenzhen GOODIX Technology Co., Ltd. | Power-on reset circuit |
| CN116346103A (en) * | 2023-05-23 | 2023-06-27 | 成都市易冲半导体有限公司 | Reset circuit for detecting power supply signal and circuit reset system |
| CN117728809A (en) * | 2023-11-13 | 2024-03-19 | 中科南京智能技术研究院 | Power-on reset circuit with programmable reset threshold voltage and integrated circuit system |
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Cited By (27)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106340318A (en) * | 2015-07-10 | 2017-01-18 | 爱思开海力士有限公司 | Power On Reset Circuit And Semiconductor Memory Device Including The Same |
| CN106340318B (en) * | 2015-07-10 | 2020-10-02 | 爱思开海力士有限公司 | Power-on reset circuit and semiconductor memory device including the same |
| CN106411300A (en) * | 2016-09-26 | 2017-02-15 | 上海华力微电子有限公司 | Power-on reset circuit |
| CN106411300B (en) * | 2016-09-26 | 2019-05-31 | 上海华力微电子有限公司 | A kind of electrification reset circuit |
| CN106533407B (en) * | 2016-11-09 | 2019-05-03 | 上海华力微电子有限公司 | A kind of electrification reset circuit |
| CN106533407A (en) * | 2016-11-09 | 2017-03-22 | 上海华力微电子有限公司 | Power on reset circuit |
| CN107341075A (en) * | 2017-08-28 | 2017-11-10 | 北京融通高科微电子科技有限公司 | Power-down protection apparatus and electronic equipment |
| CN107341075B (en) * | 2017-08-28 | 2023-12-15 | 北京世通凌讯科技有限公司 | Power-down protection device and electronic equipment |
| CN109560795A (en) * | 2017-09-27 | 2019-04-02 | 深圳市汇春科技股份有限公司 | A kind of low voltage reset circuit |
| CN110134174A (en) * | 2018-02-08 | 2019-08-16 | 华邦电子股份有限公司 | Reset circuit of starting power source with hysteresis function |
| CN109257035A (en) * | 2018-08-30 | 2019-01-22 | 龙迅半导体（合肥）股份有限公司 | A kind of electrification reset circuit |
| CN109257035B (en) * | 2018-08-30 | 2022-04-05 | 龙迅半导体（合肥）股份有限公司 | Power-on reset circuit |
| CN110798187A (en) * | 2019-10-30 | 2020-02-14 | 湖南融创微电子有限公司 | Power-on reset circuit |
| CN110798187B (en) * | 2019-10-30 | 2023-04-21 | 湖南融创微电子有限公司 | Power-on reset circuit |
| CN111654271A (en) * | 2020-05-22 | 2020-09-11 | 北京智芯微电子科技有限公司 | Power-on reset circuit and chip |
| CN111900964A (en) * | 2020-08-13 | 2020-11-06 | 南京物间科技有限公司 | Power-on reset and power-off reset circuit with accurate threshold point |
| CN111934657B (en) * | 2020-08-13 | 2023-10-24 | 南京物间科技有限公司 | Low-power-consumption power-on reset and power-off reset circuit |
| CN111934657A (en) * | 2020-08-13 | 2020-11-13 | 南京物间科技有限公司 | Low-power-consumption power-on reset and power-off reset circuit |
| CN111900964B (en) * | 2020-08-13 | 2024-03-12 | 南京物间科技有限公司 | Power-on reset and power-off reset circuit with accurate threshold point |
| US11431335B2 (en) | 2020-09-30 | 2022-08-30 | Shenzhen GOODIX Technology Co., Ltd. | Power-on reset circuit |
| CN112838850A (en) * | 2020-12-30 | 2021-05-25 | 合肥市芯海电子科技有限公司 | Power-on reset circuit, integrated circuit and electronic equipment |
| CN113114191A (en) * | 2021-04-20 | 2021-07-13 | 珠海博雅科技有限公司 | Reset circuit, circuit board and reset device |
| CN114006605A (en) * | 2021-12-31 | 2022-02-01 | 峰岹科技(深圳)股份有限公司 | Single-edge delay circuit |
| CN114006605B (en) * | 2021-12-31 | 2022-05-10 | 峰岹科技(深圳)股份有限公司 | Single-edge delay circuit |
| CN116346103A (en) * | 2023-05-23 | 2023-06-27 | 成都市易冲半导体有限公司 | Reset circuit for detecting power supply signal and circuit reset system |
| CN116346103B (en) * | 2023-05-23 | 2023-07-25 | 成都市易冲半导体有限公司 | Reset circuit for detecting power supply signal and circuit reset system |
| CN117728809A (en) * | 2023-11-13 | 2024-03-19 | 中科南京智能技术研究院 | Power-on reset circuit with programmable reset threshold voltage and integrated circuit system |
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Application publication date: 20150506 |