CN104503559A - Latch-up effect resisting microprocessor reset circuit - Google Patents
Latch-up effect resisting microprocessor reset circuit Download PDFInfo
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- CN104503559A CN104503559A CN201510019748.0A CN201510019748A CN104503559A CN 104503559 A CN104503559 A CN 104503559A CN 201510019748 A CN201510019748 A CN 201510019748A CN 104503559 A CN104503559 A CN 104503559A
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- reset circuit
- electric capacity
- microprocessor
- phototriode
- resistance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
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Abstract
The invention provides a latch-up effect resisting microprocessor reset circuit and relates to the field of electronic technology application, in particular to a reset circuit. The latch-up effect resisting microprocessor reset circuit can effectively avoid latch-up rigger risk brought by a reset signal to a microprocessor and comprises a first-order reset circuit, a power failure detection circuit and a current leakage channel, wherein the power failure detection circuit and the first-order reset circuit are connected through an optocoupler. The first-order reset circuit consists of a resistor and a first capacitor which are connected in series. The power failure detection circuit consists of a diode, a second capacitor and a light-emitting diode inside the optocoupler, wherein the anode of the diode and the cathode of the light-emitting diode are respectively connected with a power supply, the positive pole of the second capacitor and the cathode of the diode are respectively connected with the anode of the light-emitting diode, and the negative pole of the second capacitor is grounded. The current leakage channel consists of a photo-transistor inside the optocoupler and an element in the first-order reset circuit, wherein the element is the first capacitor or the resistor.
Description
Technical field
The present invention's anti-latch-up microprocessor reset circuit relates to application of electronic technology field, is specially a kind of reset circuit, effectively can avoid the breech lock trigger risk that reset signal is brought microprocessor.
Background technology
Low-power consumption, the advantage such as Non-scale logical design and larger noise margin of CMOS technology make its one preferred technique becoming digital circuit, mimic channel and form digital-analog hybrid circuit on the same chip.But the intrinsic parasitical bipolar transistor of CMOS structure can be activated under some condition triggers, form positive feedback, produce breech lock, IC circuit is caused to break down, cause that data or logic state change, loss of data, burn chip time serious, cause circuit permanent failure.
Current IC domain technological design can avoid chip self breech lock odds substantially, and current industry is known as, and the generation of breech lock mainly still comes from the triggering of external condition, i.e. circuit application aspect.The external trigger conditions of IC breech lock that easily causes of generally acknowledging mainly contains: the upset of the signal at outer signals or noise particularly chip I/O pin place, I/O pin voltage exceed device supply voltage or lower than the voltage on ground voltage, I/O pin or curent change is too fast, surge appears in device power source pin or the factor such as to fall.
Modern cmos circuit is especially that all kinds of microprocessor applications of representative are geometric growth with embedded Control, in prototype debug and system application process, often there will be all kinds of wrong phenomenons such as software race flies, loss of data, parameter change.Get rid of the Bug of software own, due to variation and the complicacy of practical application circuit and external environment condition, at some in particular cases (such as frequent power on/off), when still failing to deal with problems after taking above-mentioned various interference protection measure, need to consider to be triggered by reset circuit to cause microprocessor to enter the possibility of breech lock.But due to the singularity of reset signal work, a lot of slip-stick artist easily ignores the microprocessor breech lock triggered by reset signal when dealing with problems, academia and market also find no about resetting and the achievement in research of breech lock relating heading.
Summary of the invention
The object of the invention is to provide a kind of anti-latch-up microprocessor reset circuit for above-mentioned weak point, by this reset circuit, effectively avoid the breech lock trigger risk that reset signal is brought microprocessor.
The present invention's anti-latch-up microprocessor reset circuit takes following technical scheme to realize:
Anti-latch-up microprocessor reset circuit comprises single order reset circuit, power-fail detection circuit and current by pass, is connected between power-fail detection circuit and single order reset circuit by optocoupler;
Described single order reset circuit is made up of resistance and the first capacitance series;
Power-fail detection circuit is made up of the light emitting diode of diode, the second electric capacity and optocoupler inside, the anode of diode and the negative electrode of light emitting diode are connected with power supply respectively, the positive pole of the second electric capacity, the negative electrode of diode are connected with the anode of light emitting diode respectively, the minus earth of the second electric capacity;
Current by pass is made up of the element in the phototriode of optocoupler inside and single order reset circuit; Described element is the first electric capacity or resistance.
When current by pass is made up of the first electric capacity in the phototriode of optocoupler inside and single order reset circuit, the collector of phototriode is connected with the positive pole of the first electric capacity, the grounded emitter of phototriode; In single order reset circuit, one end of resistance is connected with power supply, and the other end of resistance is connected with the positive pole of the first electric capacity, the minus earth of the first electric capacity; Single order reset circuit forms First-order Integral reset circuit, is applicable to low level reset microprocessor.
When current by pass is made up of the resistance in the phototriode of optocoupler inside and single order reset circuit, the grounded emitter of phototriode; In single order reset circuit, the positive pole of the first electric capacity is connected with power supply, and the negative pole of the first electric capacity is connected with resistance one end, and is connected with phototriode collector, resistance other end ground connection; Single order reset circuit forms first differential reset circuit, is applicable to high level reset microprocessor.
The circuit of the present invention new earial drainage path that has been the first capacitor design, when power supply power-fail, can allow the first electric capacity rapid discharge, avoid being formed microprocessor reset pin impacting simultaneously, do not affect stability and the reliability of normal reset signal.By described current by pass enable microprocessor reset pin avoid reset capacitance that is first electric capacity store electricity release time impact, effectively avoid the microprocessor breech lock trigger risk caused by reset signal.
Accompanying drawing explanation
Below with reference to accompanying drawing, the invention will be further described:
Fig. 1 is conventional microprocessor reset circuit figure a;
Fig. 2 is conventional microprocessor reset circuit figure b;
Fig. 3 is conventional microprocessor reset circuit simulation waveform;
Fig. 4 is the schematic diagram of the present invention's anti-breech lock microprocessor reset circuit (being applicable to low level reset microprocessor);
Fig. 5 is the schematic diagram of the present invention's anti-breech lock microprocessor reset circuit (being applicable to high level reset microprocessor).
In figure: C1, the first electric capacity, R1, resistance, VCC, power supply, RST, microprocessor reset pin, T1, phototriode, VD1, light emitting diode, D1, diode, C2, the second electric capacity, U1, optocoupler.
Embodiment
With reference to accompanying drawing 1 ~ 3, in conventional reset circuit diagram a, reset circuit is connected in series by resistance R1 and the first electric capacity C1, a termination power of resistance R1, and the resistance R1 other end is connected with the positive pole of the first electric capacity C1, the minus earth of the first electric capacity C1; With reference to the working waveform figure of figure 3, during on/off electricity, the change in voltage on microprocessor reset pin RST, meets the external trigger conditions feature causing microprocessor breech lock.When power supply VCC is energized, power supply VCC is mainly charged to the first electric capacity C1 by resistance R1, and produce reset signal, now microprocessor not yet enters duty; And when power supply VCC power down, microprocessor reset pin RST is directly impacted in the electric discharge of the first electric capacity C1.
In conventional reset circuit diagram b, add diode discharge loop, but be limited by the dropping characteristic of power supply, still can not avoid the electric discharge for microprocessor reset pin RST.When the continuous quick on-off electricity of system, this impact will become frequently, becomes the important triggering factors causing microprocessor breech lock.
For head it off, the present invention's anti-breech lock microprocessor reset circuit is that the first electric capacity C1 devises a new earial drainage path, when power supply power-fail, can allow the first electric capacity C1 rapid discharge, avoid being formed microprocessor reset pin RST impacting simultaneously, do not affect stability and the reliability of normal reset signal.
With reference to accompanying drawing 4 ~ 5, the present invention's anti-latch-up microprocessor reset circuit comprises single order reset circuit, power-fail detection circuit and current by pass, is connected between power-fail detection circuit and single order reset circuit by optocoupler U1;
Described single order reset circuit is composed in series by resistance R1 and the first electric capacity C1;
Power-fail detection circuit is made up of the light emitting diode VD1 of diode D1, the second electric capacity C2 and optocoupler U1 inside, the anode of diode D1 and the negative electrode of light emitting diode VD1 are connected with power supply VCC respectively, the positive pole of the second electric capacity C2, the negative electrode of diode D1 are connected with the anode of light emitting diode VD1 respectively, the minus earth of the second electric capacity C2;
Current by pass is made up of the element in the phototriode T1 of optocoupler U1 inside and single order reset circuit; Described element is the first electric capacity C1 or resistance R1.
When current by pass is made up of the first electric capacity C1 in the phototriode T1 of optocoupler U1 inside and single order reset circuit, the collector of phototriode T1 is connected with the positive pole of the first electric capacity C1, the grounded emitter of phototriode T1; In single order reset circuit, one end of resistance R1 is connected with power supply VCC, and the other end of resistance R1 is connected with the positive pole of the first electric capacity C1, the minus earth of the first electric capacity C1; Single order reset circuit forms First-order Integral reset circuit, is applicable to low level reset microprocessor.
When current by pass is made up of the resistance R1 in the phototriode T1 of optocoupler U1 inside and single order reset circuit, the grounded emitter of phototriode T1; In single order reset circuit, the positive pole of the first electric capacity C1 is connected with power supply VCC, and the negative pole of the first electric capacity C1 is connected with resistance R1 one end, and is connected with the collector of phototriode T1, the other end ground connection of resistance R1; Single order reset circuit forms first differential reset circuit, is applicable to high level reset microprocessor.
Anti-breech lock microprocessor reset circuit shown in Fig. 4 is applicable to low level reset microprocessor, and it comprises three parts: First-order Integral reset circuit, power-fail detection circuit and current by pass.Be connected by signal wire between each part mentioned above circuit.The effect of each ingredient of the present invention is specifically described below in conjunction with accompanying drawing 4:
(1) First-order Integral reset circuit
1. form primarily of resistance R1 and the first electric capacity C1, resistance R1 one end connects power supply VCC, and the other end connects the positive pole of the first electric capacity C1, the minus earth of the first electric capacity C1.
2. when power supply VCC powers on, due to transient effect when the first electric capacity C1 charges, in the voltage U of the first electric capacity C1 positive pole
rinitial potential equals power supply ground, through the delay of certain hour, and the first electric capacity C1 charging complete.In the process, U
rgradually become high level.This process is utilized to provide reset signal for microprocessor.In the process, microprocessor does not enter duty.The length of time delay depends on the value of resistance R1 and the first electric capacity C1, and time delay is determined in the functional requirement according to design object.The capacitance that the resistance of resistance R1 is multiplied by the first electric capacity C1 is called as time constant.
(2) power-fail detection circuit
1. the light emitting diode VD1 primarily of diode D1, the second electric capacity C2 and optocoupler inside forms.Power supply VCC connects the anode of diode D1 and the negative electrode of light emitting diode VD1; The anode of the positive pole of the second electric capacity C2, the negative electrode of diode D1 and light emitting diode VD1 links together; The negative pole of the second electric capacity C2 connects power supply ground.
When being 2. energized, diode D1 forward conduction, the light emitting diode VD1 of optocoupler U1 inside is owing to being reverse energising, now not conducting, and power supply VCC passes through diode D1 to the second electric capacity C2 charging accumulation of energy.After charging complete, the second electric capacity C2 cathode voltage equals VCC.
3., during power supply VCC power down, VCC voltage reduces, and now the second electric capacity C2 cathode voltage is higher than VCC voltage, and diode D1 has become reverse energising, not conducting; The light emitting diode VD1 forward conduction of optocoupler U1 inside, the electric energy that the second electric capacity C2 stores is discharged to power supply VCC by light emitting diode VD1, forms electric current I
f, thus trigger the phototriode T1 conducting of optocoupler U1 inside.
(3) current by pass
1. form primarily of the phototriode T1 of optocoupler U1 inside and the first electric capacity C1, phototriode T1 collector connects the first electric capacity C1 positive pole, and phototriode T1 emitter connects power supply ground.
When being 2. energized, the light emitting diode VD1 described in power-fail detection circuit is oppositely energized, so phototriode T1 not conducting, now current by pass is in off state, does not affect reset circuit work.
3. during power down, under power-fail detection circuit triggers, phototriode T1 conducting, current by pass closes, the electric energy that first electric capacity C1 stores is formed by phototriode T1 and is close to direct electric discharge over the ground, thus avoids the first impact of electric capacity C1 electric discharge to microprocessor reset pin RST.
Anti-breech lock microprocessor reset circuit shown in Fig. 5 is applicable to high level reset microprocessor, and it comprises three parts: first differential reset circuit, power-fail detection circuit and current by pass.Be connected by signal wire between each part mentioned above circuit.The effect of each ingredient of the present invention is specifically described below in conjunction with accompanying drawing 5:
(1) first differential reset circuit
1. form primarily of resistance R1 and the first electric capacity C1, the first electric capacity C1 positive pole connects power supply VCC, first electric capacity C1 negative pole contact resistance R1 one end, another termination power ground of resistance R1.
2. when power supply VCC powers on, due to transient effect when the first electric capacity C1 charges, in the voltage U of the first electric capacity C1 negative pole
rbe high level instantaneously, along with charging process, in circuit, electric current reduces gradually, U
rdiminish.Through the delay of certain hour, the first electric capacity C1 charging complete, does not have electric current to produce, U in circuit
rcurrent potential equals power supply ground.In the process, U
rlow level is faded to from high level.This process is utilized to provide reset signal for microprocessor.In the process, microprocessor does not enter duty.The length of time delay depends on the value of resistance R1 and the first electric capacity C1, and time delay is determined in the functional requirement according to design object.The capacitance that the resistance of resistance R1 is multiplied by the first electric capacity C1 is called as time constant.
(2) power-fail detection circuit
1. the light emitting diode VD1 primarily of diode D1, the second electric capacity C2 and optocoupler inside forms.Power supply VCC connects the anode of diode D1 and the negative electrode of light emitting diode VD1; The anode of the positive pole of the second electric capacity C2, the negative electrode of diode D1 and light emitting diode VD1 links together; The negative pole of the second electric capacity C2 connects power supply ground.
When being 2. energized, diode D1 forward conduction, the light emitting diode VD1 of optocoupler U1 inside is owing to being reverse energising, now not conducting, and power supply VCC passes through diode D1 to the second electric capacity C2 charging accumulation of energy.After charging complete, the second electric capacity C2 cathode voltage equals VCC.
3., during power supply VCC power down, VCC voltage reduces, and now the second electric capacity C2 cathode voltage is higher than VCC voltage, and diode D1 has become reverse energising, not conducting; The light emitting diode VD1 forward conduction of optocoupler inside, the electric energy that electric capacity C2 stores is discharged to power supply VCC by light emitting diode VD1, forms electric current I
f, thus trigger the phototriode T1 conducting of optocoupler U1 inside.
(3) current by pass
1. form primarily of the phototriode T1 of optocoupler inside and resistance R1, the collector connecting resistance R1 of phototriode T1 and the tie point of the first electric capacity C1 negative pole, the emitter of phototriode T1 connects power supply ground.
When being 2. energized, the light emitting diode VD1 described in power-fail detection circuit is oppositely energized, so phototriode T1 not conducting, now current by pass is in off state, does not affect reset circuit work.
3. during power down, under power-fail detection circuit triggers, phototriode T1 conducting, current by pass closes, because reset pin RST when microprocessor normally works is low level, now, current by pass directly by drop-down by the phototriode T1 of conducting for microprocessor reset pin RST be earth potential, avoid the first impact of electric capacity C1 electric discharge on microprocessor reset pin RST.
Claims (3)
1. an anti-latch-up microprocessor reset circuit, be is characterized in that: comprise single order reset circuit, power-fail detection circuit and current by pass, is connected between power-fail detection circuit and single order reset circuit by optocoupler;
Described single order reset circuit is made up of resistance and the first capacitance series;
Power-fail detection circuit is made up of the light emitting diode of diode, the second electric capacity and optocoupler inside, the anode of diode and the negative electrode of light emitting diode are connected with power supply respectively, the positive pole of the second electric capacity, the negative electrode of diode are connected with the anode of light emitting diode respectively, the minus earth of the second electric capacity;
Current by pass is made up of the element in the phototriode of optocoupler inside and single order reset circuit; Described element is the first electric capacity or resistance.
2. anti-latch-up microprocessor reset circuit according to claim 1, it is characterized in that: when current by pass is made up of the first electric capacity in the phototriode of optocoupler inside and single order reset circuit, the collector of phototriode is connected with the positive pole of the first electric capacity, the grounded emitter of phototriode; In single order reset circuit, one end of resistance is connected with power supply, and the other end of resistance is connected with the positive pole of the first electric capacity, the minus earth of the first electric capacity; Single order reset circuit forms First-order Integral reset circuit, is applicable to low level reset microprocessor.
3. anti-latch-up microprocessor reset circuit according to claim 1, is characterized in that: when current by pass is made up of the resistance in the phototriode of optocoupler inside and single order reset circuit, the grounded emitter of phototriode; In single order reset circuit, the positive pole of the first electric capacity is connected with power supply, and the negative pole of the first electric capacity is connected with resistance one end, and is connected with phototriode collector, resistance other end ground connection; Single order reset circuit forms first differential reset circuit, is applicable to high level reset microprocessor.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510019748.0A CN104503559A (en) | 2015-01-15 | 2015-01-15 | Latch-up effect resisting microprocessor reset circuit |
| PCT/CN2015/095370 WO2016112744A1 (en) | 2015-01-15 | 2015-11-24 | Anti-latch-up effect microprocessor reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510019748.0A CN104503559A (en) | 2015-01-15 | 2015-01-15 | Latch-up effect resisting microprocessor reset circuit |
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| CN104503559A true CN104503559A (en) | 2015-04-08 |
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|---|---|---|---|
| CN201510019748.0A Pending CN104503559A (en) | 2015-01-15 | 2015-01-15 | Latch-up effect resisting microprocessor reset circuit |
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| CN (1) | CN104503559A (en) |
| WO (1) | WO2016112744A1 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016112744A1 (en) * | 2015-01-15 | 2016-07-21 | 无锡职业技术学院 | Anti-latch-up effect microprocessor reset circuit |
| WO2017028348A1 (en) * | 2015-08-19 | 2017-02-23 | 深圳市华星光电技术有限公司 | Optical coupling isolation switch circuit |
| CN108173537A (en) * | 2018-01-02 | 2018-06-15 | 京东方科技集团股份有限公司 | Restart circuit and electronic equipment |
| CN108445819A (en) * | 2018-05-25 | 2018-08-24 | 无锡职业技术学院 | A kind of anti-latch-up SCM system |
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| JPS6039138U (en) * | 1983-08-22 | 1985-03-18 | 株式会社日立製作所 | power circuit |
| CN104503559A (en) * | 2015-01-15 | 2015-04-08 | 无锡职业技术学院 | Latch-up effect resisting microprocessor reset circuit |
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2015
- 2015-01-15 CN CN201510019748.0A patent/CN104503559A/en active Pending
- 2015-11-24 WO PCT/CN2015/095370 patent/WO2016112744A1/en active Application Filing
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| JPS5825453Y2 (en) * | 1978-10-11 | 1983-06-01 | 株式会社東芝 | DC power supply initialization circuit |
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| JPS63133731U (en) * | 1987-02-24 | 1988-09-01 | ||
| CN101727122A (en) * | 2010-02-01 | 2010-06-09 | 哈尔滨工业大学 | Quadratic linear power system latching preventing circuit for system level CMOS integrated circuit |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016112744A1 (en) * | 2015-01-15 | 2016-07-21 | 无锡职业技术学院 | Anti-latch-up effect microprocessor reset circuit |
| WO2017028348A1 (en) * | 2015-08-19 | 2017-02-23 | 深圳市华星光电技术有限公司 | Optical coupling isolation switch circuit |
| CN108173537A (en) * | 2018-01-02 | 2018-06-15 | 京东方科技集团股份有限公司 | Restart circuit and electronic equipment |
| CN108173537B (en) * | 2018-01-02 | 2021-12-31 | 京东方科技集团股份有限公司 | Restart circuit and electronic equipment |
| CN108445819A (en) * | 2018-05-25 | 2018-08-24 | 无锡职业技术学院 | A kind of anti-latch-up SCM system |
| WO2019223762A1 (en) * | 2018-05-25 | 2019-11-28 | 无锡职业技术学院 | Anti-latch-up single-chip computer system |
| US11630430B2 (en) | 2018-05-25 | 2023-04-18 | Wuxi Institute Of Technology | Latchup immune microcontroller system |
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| Publication number | Publication date |
|---|---|
| WO2016112744A1 (en) | 2016-07-21 |
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Application publication date: 20150408 |