CN203242571U - Relay control circuit and device - Google Patents
Relay control circuit and device Download PDFInfo
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- CN203242571U CN203242571U CN 201320104858 CN201320104858U CN203242571U CN 203242571 U CN203242571 U CN 203242571U CN 201320104858 CN201320104858 CN 201320104858 CN 201320104858 U CN201320104858 U CN 201320104858U CN 203242571 U CN203242571 U CN 203242571U
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Abstract
The utility model discloses a relay control circuit connected with a relay. The relay control circuit includes a power input terminal, a delay power supply module, a controller and a data retention module. The input terminal of the delay power supply module is connected with the power input terminal. The output terminal of the delay power supply module is connected with the power supply terminal of the relay. The power supply terminal of the controller is connected with the power input terminal. The input terminal of the data retention module is connected with the input and output port of the controller. The output terminal of the data retention module is connected with the control terminal of the relay. The utility model also discloses a relay control device, comprising one or more relays and the relay control circuit. The relay control circuit provided by the utility model effectively solves the problems of uncertainty of controller initial state caused by a non-latching retention relay and relay malfunction. The relay control circuit and device have the advantages of simple and reasonable circuit structure and lower cost compared with a magnetic latching relay.
Description
Technical field
The utility model relates to the relay technical field, relates in particular to a kind of control relay circuit and device.
Background technology
At present, relay is because it is simple in structure, cost is lower, be widely used in many switching value control fields, yet in use, the phenomenon that relay misoperation is done often occur, therefore, in the prior art, usually prevent relay misoperation in use with magnetic latching relay, but the price of magnetic latching relay is relatively more expensive with respect to non-magnetic latching relay, and the drive circuit that is used for the driving magnetic latching relay is also comparatively complicated, and application cost is higher.
The utility model content
Main purpose of the present utility model is to propose a kind of control relay circuit and device, is intended to solve because using non-magnetic latching relay to cause initial condition unstable the problem that relay misoperation is done.
In order to achieve the above object, the utility model proposes a kind of control relay circuit, this control relay circuit is connected with relay, comprise power input, be used for time-delay supply module, the controller of described relay time-delay power supply and be used for signal condition according to described controller output, keep module to the data of described relay output control signal; Wherein:
The input of described time-delay supply module is connected with described power input, and the output of described time-delay supply module is connected with the feeder ear of described relay; The feeder ear of described controller is connected with described power input, and described data keep the input of module to be connected with the input/output port of described controller, and described data keep the output of module to be connected with the control end of described relay.
Preferably, described time-delay supply module comprises charhing unit and delay unit; The input of described charhing unit is connected with described power input, and the output of described charhing unit is connected with the input of described delay unit, and the output of described delay unit is connected with the feeder ear of described relay.
Preferably, described charhing unit comprises a diode, the first resistance and the first electric capacity; One end of described the first resistance is connected with described power input as the input of described charhing unit, and is connected with the negative electrode of described diode, the other end of described the first resistance and the anodic bonding of described diode, and through described the first capacity earth.
Preferably, described delay unit comprises a timing chip, the second electric capacity and a switch element; The power pins of described timing chip and reset pin all are connected with described power input, the threshold values pin of described timing chip and triggering pin are all through described the first capacity earth, the voltage control pin of described timing chip is through described the second capacity earth, the grounding pin ground connection of described timing chip, the output pin of described timing chip is connected with the control end of described switch element, the input of described switch element is connected with described power input, and the output of described switch element is connected with the feeder ear of described relay.
Preferably, described delay unit also comprises the second resistance, and the control end of described switch element is connected with the output pin of described timing chip through described the second resistance.
Preferably, described switch element is metal-oxide-semiconductor; The grid of described metal-oxide-semiconductor is connected with the output pin of described timing chip through described the second resistance as the control end of described switch element; The source electrode of described metal-oxide-semiconductor is connected with described power input as the input of described switch element; The drain electrode of described metal-oxide-semiconductor is connected with the feeder ear of described relay as the output of described switch element.
Preferably, described switch element is triode; The base stage of described triode is connected with the output pin of described timing chip through described the second resistance as the control end of described switch element; The emitter of described triode is connected with described power input as the input of described switch element; The collector electrode of described triode is connected with the feeder ear of described relay as the output of described switch element.
Preferably, described data keep module to comprise latching chip, the 3rd resistance and the 3rd electric capacity; The described corresponding connection of I/O port of latching data input pin with the described controller of chip, the described clock input pin that latchs chip is connected with the I/O port of described controller, and be connected with power input through the 3rd resistance, the described corresponding connection of control end of latching data output pin with the relay of chip, the described power pins that latchs chip is connected with described power input, and through described the 3rd capacity earth, described enable pin and the equal ground connection of grounding pin of latching chip.
The utility model also proposes a kind of relay control device, this relay control device comprises one or more relays, also comprise control relay circuit, this control relay circuit is connected with described relay, comprise power input, be used for time-delay supply module, the controller of described relay time-delay power supply and be used for signal condition according to described controller output, keep module to the data of described relay output control signal; Wherein:
The input of described time-delay supply module is connected with described power input, and the output of described time-delay supply module is connected with the feeder ear of described relay; The feeder ear of described controller is connected with described power input, and described data keep the input of module to be connected with the input/output port of described controller, and described data keep the output of module to be connected with the control end of described relay.
Control relay circuit of the present utility model, by the time-delay of time-delay supply module relay is powered, reserve time enough and carry out initialization to controller, keep module that the signal of controller output is latched by data, so that consistent with the signal after the stable output of controller to the control signal of relay output, prevent controller in running during initialization the level state of its I/O port unstable and cause relay misoperation to be done, solved because using non-magnetic latching relay to cause the controller initial condition uncertain the problem that relay misoperation is done.And the utility model also has the circuit structure advantages of simple, and cost uses the cheap advantage of magnetic latching relay.
Description of drawings
Fig. 1 is the theory diagram of the utility model control relay circuit preferred embodiment;
Fig. 2 is the electrical block diagram of time-delay supply module in the utility model control relay circuit;
Fig. 3 is the electrical block diagram that data keep module in the utility model control relay circuit.
The realization of the purpose of this utility model, functional characteristics and advantage in connection with embodiment, and is described further with reference to accompanying drawing.
Embodiment
Further specify the technical solution of the utility model below in conjunction with Figure of description and specific embodiment.Should be appreciated that specific embodiment described herein only in order to explaining the utility model, and be not used in restriction the utility model.
The utility model proposes a kind of control relay circuit.
With reference to Fig. 1, Fig. 1 is the theory diagram of the utility model control relay circuit 100 preferred embodiments.
Among the utility model embodiment, control relay circuit 100 is connected with relay 200, and control relay circuit 100 comprises that power input VCC_IN, time-delay supply module 110, controller 120 and data keep module 130; Time-delay supply module 110 is used for relay 200 time-delay power supplies, the signal condition that data keep module 130 to be used for according to controller 120 outputs, to relay 200 output control signals, with the break-make of control relay 200, i.e. the control signal of data maintenance module 130 outputs drives relay 200 connections or control relay 200 disconnections by the drive circuit of relay 200.
Wherein, the input of time-delay supply module 110 is connected with power input VCC_IN, and the output of time-delay supply module 110 is connected with the feeder ear of relay 200; The feeder ear of controller 120 is connected with power input VCC_IN, and data keep the input of module 130 to be connected with the input/output port of controller 120, and data keep the output of module 130 to be connected with the control end of relay 200.
The present embodiment is powered to relay 200 by 110 time-delays of time-delay supply module, reserve time enough and carry out initialization to controller 120, keep the signal of 130 pairs of controllers of module, 120 outputs to latch by data, so that consistent with the signal after the controller 120 stable outputs to the control signal of relay 200 outputs, prevent controller 120 in running during initialization the level state of its I/O port unstable and cause relay 200 misoperations, solved because using non-magnetic latching relay to cause controller 120 initial conditions uncertain the problem of relay 200 misoperations.
See figures.1.and.2 in the lump, wherein Fig. 2 is the electrical block diagram of time-delay supply module 110 in the utility model control relay circuit 100.
In the present embodiment, time-delay supply module 110 comprises charhing unit 111 and delay unit 112; The input of charhing unit 111 is connected with power input VCC_IN, and the output of charhing unit 111 is connected with the input of delay unit 112, and the output of delay unit 112 is connected with the feeder ear V_RLY of relay 200.
Particularly, charhing unit 111 comprises diode D1, the first resistance R 1 and the first capacitor C 1; One end of the first resistance R 1 is as the input of charhing unit 111, VCC_IN is connected with power input, and is connected with the negative electrode of diode D1, and the other end of the first resistance R 1 is divided into two-way, wherein one the tunnel with the anodic bonding of diode D1, another road the first capacitor C 1 ground connection.
Particularly, delay unit 112 comprises timing chip U1, the second capacitor C 2 and switch element 1121, and the present embodiment preferably selects the SA555 chip as timing chip U1, also can select in addition the chip of other concrete equivalent function to replace; The power pins VCC1 of timing chip U1 is connected with power input VCC_IN, the reset pin RST of timing chip U1 also is connected with power input VCC_IN, the threshold values pin THR of timing chip U1 is through the first capacitor C 1 ground connection, the triggering pin TRIG of timing chip U1 is also through the first capacitor C 1 ground connection, the voltage control pin CVOLT of timing chip U1 is through the second capacitor C 2 ground connection, the grounding pin GND1 ground connection of timing chip U1, the output pin OUT of timing chip U1 is connected with the control end of switch element 1121, the input of switch element 1121 is connected with power input VCC_IN, and the output of switch element 1121 is connected with the feeder ear V_RLY of relay 200.
Particularly, delay unit 112 also comprises the second resistance R 2, and the control end of switch element 1121 is connected with the output pin OUT of timing chip U1 through the second resistance R 2.
Further, switch element 1121 is metal-oxide-semiconductor Q1, and the present embodiment is preferably selected the PMOS pipe; The grid of metal-oxide-semiconductor Q1 is connected with the output pin OUT of timing chip U1 through the second resistance R 2 as the control end of switch element 1121, and the second resistance R 2 is the current-limiting resistance of the grid of metal-oxide-semiconductor Q1; The source electrode of metal-oxide-semiconductor Q1 is as the input of switch element 1121, and VCC_IN is connected with power input; The drain electrode of metal-oxide-semiconductor Q1 is connected with the feeder ear V_RLY of relay 200 as the output of switch element 1121.Need to prove, in the present embodiment, switch element 1121 is selected NMOS pipe, and carries out corresponding modify and realize identical function, also all in protection range of the present utility model.
In addition, according to the characteristic of PMOS pipe, switch element 1121 also can be selected the triode (not shown), for example selects the positive-negative-positive triode, the base stage of triode is connected with the output pin OUT of timing chip U1 through the second resistance R 2 as the control end of switch element 1121; The emitter of triode is as the input of switch element 1121, and VCC_IN is connected with power input; The collector electrode of triode is connected with the feeder ear V_RLY of relay 200 as the output of switch element 1121.In like manner, in the present embodiment, according to the characteristic of NMOS pipe, switch element 1121 is selected NPN type triode, and carries out corresponding modify and realize identical function, also all in protection range of the present utility model.
In conjunction with Fig. 1 and Fig. 3, wherein Fig. 3 is the electrical block diagram that data keep module 130 in the utility model control relay circuit 100.
In the present embodiment, data keep module 130 to comprise latching chip U2, the 3rd resistance R 3 and the 3rd capacitor C 3, it is that chip U2 is latched in the conduct of 74LS574 chip that the present embodiment is preferably selected universal latch storage chip, also can select in addition 74 family chips of other concrete equivalent function or other chips to replace; Latch the corresponding connection of I/O port (P10 to P17) of data input pin (D0 to D7) with the controller 120 of chip U2, in Fig. 3,8 the data input pins (D0 to D7) that latch chip U2 are connected to respectively 8 I/O ports (P10 to P17) of controller 120, the clock input pin CLK that latchs chip U2 is connected with an I/O port P20 of controller 120, to receive the clock signal of controller 120 outputs, the clock input pin CLK that latchs chip U2 also is connected with power input VCC_IN through the 3rd resistance R 3, latch the corresponding connection of control end of data output pin with the relay 200 of chip U2, in Fig. 3, latch 8 data output pins (O0 to O7) of chip U2, be connected to respectively the control end of 8 relays 200, Fig. 3 only illustrates an embodiment, can suitably reduce the use of the output pin that latchs chip U2 according to the quantity of relay 200, if need to control simultaneously more relay 200, then can increase as required the quantity that latchs chip U2, the power pins VCC2 that latchs chip U2 is connected with power input VCC_IN, and latch the power pins VCC2 of chip U2 through the 3rd capacitor C 3 ground connection, latch the enable pin of chip U2
Ground connection, the grounding pin GND2 that latchs chip U2 is ground connection also.
The operation principle of the utility model control relay circuit 100 specifically describes as follows:
As shown in Figure 2, diode D1, the first resistance R 1 and the first capacitor C 1 form RC charging circuit unit, when time-delay supply module 110 powers on, charge gradually to the first capacitor C 1 by the first resistance R 1 from the supply voltage VCC of power input VCC_IN input, the voltage that produces in the first capacitor C 1 is added on the triggering pin TRIG of timing chip U1, when the voltage of the triggering pin TRIG of timing chip U1 during less than 1/3 supply voltage VCC, the output pin OUT output high level signal of timing chip U1 is to the grid of metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q1 cut-off, so that the feeder ear V_RLY that supply voltage VCC can not export relay 200 to by metal-oxide-semiconductor Q1 is relay 200 power supplies, i.e. relay 200 power supplies are closed; When the voltage of the triggering pin TRIG of timing chip U1 during greater than 1/3 supply voltage VCC, the output pin OUT output low level signal of timing chip U1 is to the grid of metal-oxide-semiconductor Q1, driven MOS pipe Q1 conducting, so that the feeder ear V_RLY that supply voltage VCC can export relay 200 to by metal-oxide-semiconductor Q1 is relay 200 power supplies, namely relay 200 is for electric-openings; Prevented when controller 120 initialization owing to the uncertain relay that causes 200 misoperations of its I/O port (P10 to P17) state.
In the present embodiment, the delay time of time-delay supply module 110 is Tr=1.1*R
1* C
1, R wherein
1Be the resistance of the first resistance R 1, C
1Be the capacitance of the first capacitor C 1, hence one can see that, and the parameter of revising the first resistance R 1 and the first capacitor C 1 can change the delay time of time-delay supply module 110, so namely applicable to the application scenario of different controller 120.
As shown in Figure 3, by the characteristic that latchs chip U2 as can be known, when the clock signal that receives from controller 120 as the clock input pin CLK that latchs chip U2 becomes high level by low level, the signal (IN0 to IN7) that controller 120 outputs to the data input pin (D0 to D7) that latchs chip U2 just is updated to the data output pin (O0 to O7) that latchs chip U2, the data output pin (O0 to O7) that namely latchs chip U2 just can be updated to the control signal (OUT0 to OUT7) of relay 200 outputs, and the state of relay 200 just can change.The present embodiment is in implementation procedure, and when not needing to change relay 200 state, the clock signal state that the clock input pin CLK of chip U2 is latched in maintenance is high level.Because controller 120 its I/O port in initialization procedure only can keep a kind of level state (high level or low level), and the clock signal state that latchs the clock input pin CLK of chip U2 is high level, therefore, the state of clock signal only can keep high level constant or become low level by high level, the two situation can be so that controller 120 output to the signal (IN0 to IN7) of the data input pin (D0 to D7) that latchs chip U2 is effectively latched, can not be modified to the control signal (OUT0 to OUT7) of relay 200 output thereby latch chip U2, so that relay 200 can misoperation yet.
In addition, when data keep module 130 to power on, uncertain state can appear in the control signal that latchs chip U2 output, cause relay 200 to be in error condition, at this moment, can be failure to actuate by latching relay 200 in conjunction with the 200 time-delay power supplies of 110 pairs of relays of time-delay supply module, until after controller 120 power-up initializings and the control signal that latchs chip U2 output determine, relay 200 states are just determined, relay 200 just moves, when namely the initialization time of controller 120 is less than the delay time of time-delay supply module 110, can avoid the problem of relay 200 misoperations.Because the present embodiment is revised the delay time that the parameter of the first resistance R 1 and the first capacitor C 1 can change time-delay supply module 110, therefore suitably select the first resistance R 1 and the first capacitor C 1 parameter so that the delay time of time-delay supply module 110 greater than initialization time of controller 120, just can prevent controller 120 in running during initialization the level state of its I/O port unstable and cause relay 200 misoperations, solved because using non-magnetic latching relay to cause controller 120 initial conditions uncertain the problem of relay 200 misoperations.
With respect to prior art, control relay circuit 100 of the present utility model is powered to relay 200 by 110 time-delays of time-delay supply module, reserve time enough and carry out initialization to controller 120, keep the signal of 130 pairs of controllers of module, 120 outputs to latch by data, so that consistent with the signal after the controller 120 stable outputs to the control signal of relay 200 outputs, prevent controller 120 in running during initialization the level state of its I/O port unstable and cause relay 200 misoperations, solved because using non-magnetic latching relay to cause controller 120 initial conditions uncertain the problem of relay 200 misoperations.And the utility model also has the circuit structure advantages of simple, and cost uses the cheap advantage of magnetic latching relay.
The utility model also proposes a kind of relay control device, this relay control device comprises one or more relays, also comprise control relay circuit 100, this control relay circuit 100 is connected with relay, the circuit structure of this control relay circuit 100, operation principle and the beneficial effect that brings be consistent with above-described embodiment all, repeats no more herein.
The above only is preferred embodiment of the present utility model; be not so limit claim of the present utility model; every equivalent structure or equivalent flow process conversion that utilizes the utility model specification and accompanying drawing content to do; or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present utility model.
Claims (9)
1. control relay circuit, be connected with relay, it is characterized in that, comprise power input, be used for time-delay supply module, the controller of described relay time-delay power supply and be used for signal condition according to described controller output, keep module to the data of described relay output control signal; Wherein:
The input of described time-delay supply module is connected with described power input, and the output of described time-delay supply module is connected with the feeder ear of described relay; The feeder ear of described controller is connected with described power input, and described data keep the input of module to be connected with the input/output port of described controller, and described data keep the output of module to be connected with the control end of described relay.
2. control relay circuit as claimed in claim 1 is characterized in that, described time-delay supply module comprises charhing unit and delay unit; The input of described charhing unit is connected with described power input, and the output of described charhing unit is connected with the input of described delay unit, and the output of described delay unit is connected with the feeder ear of described relay.
3. control relay circuit as claimed in claim 2 is characterized in that, described charhing unit comprises a diode, the first resistance and the first electric capacity; One end of described the first resistance is connected with described power input as the input of described charhing unit, and is connected with the negative electrode of described diode, the other end of described the first resistance and the anodic bonding of described diode, and through described the first capacity earth.
4. control relay circuit as claimed in claim 3 is characterized in that, described delay unit comprises a timing chip, the second electric capacity and a switch element; The power pins of described timing chip and reset pin all are connected with described power input, the threshold values pin of described timing chip and triggering pin are all through described the first capacity earth, the voltage control pin of described timing chip is through described the second capacity earth, the grounding pin ground connection of described timing chip, the output pin of described timing chip is connected with the control end of described switch element, the input of described switch element is connected with described power input, and the output of described switch element is connected with the feeder ear of described relay.
5. control relay circuit as claimed in claim 4 is characterized in that, described delay unit also comprises the second resistance, and the control end of described switch element is connected with the output pin of described timing chip through described the second resistance.
6. control relay circuit as claimed in claim 5 is characterized in that, described switch element is metal-oxide-semiconductor; The grid of described metal-oxide-semiconductor is connected with the output pin of described timing chip through described the second resistance as the control end of described switch element; The source electrode of described metal-oxide-semiconductor is connected with described power input as the input of described switch element; The drain electrode of described metal-oxide-semiconductor is connected with the feeder ear of described relay as the output of described switch element.
7. control relay circuit as claimed in claim 5 is characterized in that, described switch element is triode; The base stage of described triode is connected with the output pin of described timing chip through described the second resistance as the control end of described switch element; The emitter of described triode is connected with described power input as the input of described switch element; The collector electrode of described triode is connected with the feeder ear of described relay as the output of described switch element.
8. control relay circuit as claimed in claim 1 is characterized in that, described data keep module to comprise latching chip, the 3rd resistance and the 3rd electric capacity; The described corresponding connection of I/O port of latching data input pin with the described controller of chip, the described clock input pin that latchs chip is connected with the I/O port of described controller, and be connected with power input through the 3rd resistance, the described corresponding connection of control end of latching data output pin with the relay of chip, the described power pins that latchs chip is connected with described power input, and through described the 3rd capacity earth, described enable pin and the equal ground connection of grounding pin of latching chip.
9. a relay control device comprises one or more relays, it is characterized in that, also comprises the described control relay circuit of any one in the claim 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320104858 CN203242571U (en) | 2013-03-07 | 2013-03-07 | Relay control circuit and device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320104858 CN203242571U (en) | 2013-03-07 | 2013-03-07 | Relay control circuit and device |
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| CN203242571U true CN203242571U (en) | 2013-10-16 |
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| CN 201320104858 Expired - Lifetime CN203242571U (en) | 2013-03-07 | 2013-03-07 | Relay control circuit and device |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105245840A (en) * | 2015-09-30 | 2016-01-13 | 浙江宇视科技有限公司 | Data forwarding method and device and camera |
| CN105845505A (en) * | 2016-06-14 | 2016-08-10 | 珠海英搏尔电气股份有限公司 | Electrical part assembly of electric vehicle, relay switch circuit and control method therefor |
| CN107589699A (en) * | 2017-09-22 | 2018-01-16 | 贵州振华群英电器有限公司（国营第八九厂） | A kind of relay output state keeping method and solid-state relay used |
| CN108198731A (en) * | 2018-02-05 | 2018-06-22 | 厦门拓宝科技有限公司 | A kind of magnetic latching relay control circuit |
| CN110112038A (en) * | 2019-06-11 | 2019-08-09 | 骆驼集团武汉光谷研发中心有限公司 | A kind of relay drive circuit |
| CN110706954A (en) * | 2019-09-12 | 2020-01-17 | 恒大智慧充电科技有限公司 | Emergency stop switch circuit and emergency stop and reset method of emergency stop switch |
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2013
- 2013-03-07 CN CN 201320104858 patent/CN203242571U/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105245840A (en) * | 2015-09-30 | 2016-01-13 | 浙江宇视科技有限公司 | Data forwarding method and device and camera |
| CN105245840B (en) * | 2015-09-30 | 2018-09-14 | 浙江宇视科技有限公司 | A kind of data forwarding method, device and video camera |
| CN105845505A (en) * | 2016-06-14 | 2016-08-10 | 珠海英搏尔电气股份有限公司 | Electrical part assembly of electric vehicle, relay switch circuit and control method therefor |
| CN105845505B (en) * | 2016-06-14 | 2017-11-17 | 珠海英搏尔电气股份有限公司 | Electric car electric component assembly, relay switching circuit and its control method |
| CN107589699A (en) * | 2017-09-22 | 2018-01-16 | 贵州振华群英电器有限公司（国营第八九厂） | A kind of relay output state keeping method and solid-state relay used |
| CN108198731A (en) * | 2018-02-05 | 2018-06-22 | 厦门拓宝科技有限公司 | A kind of magnetic latching relay control circuit |
| CN108198731B (en) * | 2018-02-05 | 2023-11-21 | 厦门拓宝科技有限公司 | Magnetic latching relay control circuit |
| CN110112038A (en) * | 2019-06-11 | 2019-08-09 | 骆驼集团武汉光谷研发中心有限公司 | A kind of relay drive circuit |
| CN110112038B (en) * | 2019-06-11 | 2020-11-06 | 骆驼集团武汉光谷研发中心有限公司 | Relay drive circuit |
| CN110706954A (en) * | 2019-09-12 | 2020-01-17 | 恒大智慧充电科技有限公司 | Emergency stop switch circuit and emergency stop and reset method of emergency stop switch |
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