CN104599983A - Glue overflowing preventing type packaging method of semiconductor device - Google Patents

Glue overflowing preventing type packaging method of semiconductor device Download PDF

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Publication number
CN104599983A
CN104599983A CN201410836378.5A CN201410836378A CN104599983A CN 104599983 A CN104599983 A CN 104599983A CN 201410836378 A CN201410836378 A CN 201410836378A CN 104599983 A CN104599983 A CN 104599983A
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CN
China
Prior art keywords
lead frame
injection
semiconductor device
chip
mould
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410836378.5A
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Chinese (zh)
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CN104599983B (en
Inventor
敖利波
曹周
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Great Team Backend Foundry Dongguan Co Ltd
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Great Team Backend Foundry Dongguan Co Ltd
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Publication date
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Priority to CN201410836378.5A priority Critical patent/CN104599983B/en
Publication of CN104599983A publication Critical patent/CN104599983A/en
Application granted granted Critical
Publication of CN104599983B publication Critical patent/CN104599983B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The invention discloses a glue overflowing preventing type packaging method of a semiconductor device. The method comprises the steps of adhering a chip; overlapping a conductor frame; welding a lead; performing injection molding; when in injection molding, a tape is adhered to the lower surface of the conductor frame; an injection molding die is closed; the die is downwards pressed and the tape on the lower surface of the conductor frame is deformed to enable close contact of the conductor frame and the die; finally the injection molding is done.

Description

A kind of semiconductor device prevents the method for packing of excessive glue
Technical field
The present invention relates to technical field of semiconductor encapsulation, particularly relate to the method for packing that a kind of semiconductor device prevents excessive glue.
Background technology
At present, the step of semiconductor packages, comprising: die bonding; Wire bonds and injection moulding, in injection step, first, matched moulds is carried out to injection mold, then, injection mold presses down injection mo(u)lding, because the inner surface of mould contacts not tight with semiconductor device end face, there is space, when causing injection mo(u)lding, the phenomenon of glue of overflowing can be there is in surface on the semiconductor device, affect the heat dispersion of semiconductor device and attractive in appearance.
Summary of the invention
The object of the invention is to propose the method for packing that a kind of semiconductor device prevents excessive glue, can prevent semiconductor device upper surface from occurring the phenomenon of excessive glue.
For reaching this object, the present invention by the following technical solutions:
Semiconductor device prevents a method for packing for excessive glue, comprises the steps:
Die bonding;
Lead frame is superimposed;
Wire bonds;
Injection moulding;
Described injection step comprises:
Tape at the lower surface of lead frame;
Injection mould closing;
Mould presses down, and the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact;
Injection mo(u)lding.
Further, described die bonding step comprises:
Prepare the first lead frame;
Adhering chip: the lower surface of described chip is by bonding with described first lead frame in conjunction with material.
Further, described lead frame laminating step comprises:
Prepare the second lead frame;
Cementation laminated: described second lead frame and described first lead frame superimposed, and by bonding with the upper surface of described chip in conjunction with material.
Further, before injection step, also comprise baking procedure, by first lead frame good with described die bonding and the second lead frame, send into oven cooking cycle, in conjunction with material solidification after baking, and then semiconductor whole height is determined.
Further, before feeding oven cooking cycle, the whole height of pilot frame and chip.
A kind of two-side radiation semiconductor package structure provided by the invention and method for packing thereof, by the method for taping at lead frame lower surface, when making injection mould closing, in the process that mould presses down, the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact, and excessive glue causes the heat dispersion of semiconductor device and aesthetic measure to decline to prevent semiconductor device upper surface from occurring.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, introduce doing one to the accompanying drawing used required in embodiment or description of the prior art simply below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the flow chart that a kind of semiconductor device that the embodiment of the present invention one provides prevents the method for packing of excessive glue;
Fig. 2 is the flow chart that a kind of semiconductor device that the embodiment of the present invention two provides prevents the method for packing of excessive glue;
Fig. 3 is the flow chart of the injection step that the embodiment of the present invention three provides;
Fig. 4 is the structural representation of the injection step S41 that the embodiment of the present invention three provides;
Fig. 5 is the structural representation of the injection step S42 that the embodiment of the present invention three provides;
Fig. 6 is the structural representation of the injection step S43 that the embodiment of the present invention three provides;
Fig. 7 is the structural representation of the injection step S44 that the embodiment of the present invention three provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, hereinafter with reference to the accompanying drawing in the embodiment of the present invention, by execution mode, technical scheme of the present invention is described clearly and completely, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment one:
With reference to figure 1, a kind of semiconductor device that the embodiment of the present invention one provides prevents the method for packing of excessive glue from comprising: step S10-S40.
Step S10: die bonding;
Step S20: lead frame is superimposed
Step S30: wire bonds;
Step S40: injection moulding;
Wherein step S40 comprises:
Tape at the lower surface of lead frame;
Injection mould closing;
Mould presses down, and the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact;
Injection mo(u)lding.
A kind of two-side radiation semiconductor package structure provided by the invention and method for packing thereof, by the method for taping at lead frame lower surface, when making injection mould closing, in the process that mould presses down, the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact, and excessive glue causes the heat dispersion of semiconductor device and aesthetic measure to decline to prevent semiconductor device upper surface from occurring.
Wherein, step S10 comprises:
Prepare the first lead frame;
Adhering chip: the lower surface of described chip is by bonding with described first lead frame in conjunction with material;
Step S20 comprises:
Prepare the second lead frame;
Cementation laminated: described second lead frame and described first lead frame superimposed, and by bonding with the upper surface of described chip in conjunction with material;
Wherein, before step S40, also comprise baking procedure, by first lead frame good with described die bonding and the second lead frame, send into oven cooking cycle, in conjunction with material solidification after baking, and then semiconductor whole height is determined.
Wherein, before feeding oven cooking cycle, the whole height of pilot frame and chip.Make semiconductor in encapsulation process, chip can not be damaged by pressure and semiconductor packages can not be caused to overflow glue, improve the package quality of product, further increase the integral heat sink performance of product.
Embodiment two:
With reference to figure 1, a kind of semiconductor device that the embodiment of the present invention two provides prevents the method for packing of excessive glue from comprising: step S10-S40.
Step S11: prepare the first lead frame;
Step S12: bonding chip, the lower surface of described chip is by bonding with described first lead frame in conjunction with material;
Step S21: prepare the second lead frame:
Step S22: cementation laminated, described second lead frame and described first lead frame superimposed, and by bonding with described chip upper surface in conjunction with material;
Step S20: baking, by first lead frame good with described die bonding and the second lead frame, sends into oven cooking cycle, and in conjunction with material solidification after baking, and then semiconductor whole height is determined.
Step S31: wire bonds;
Step S40: injection moulding, the lower surface of lead frame is taped, and during injection mould closing, mould presses down, and the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact.
A kind of semiconductor device provided by the invention prevents the method for packing of excessive glue, by the method for taping at lead frame lower surface, when making injection mould closing, in the process that mould presses down, the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact, and excessive glue causes the heat dispersion of semiconductor device and aesthetic measure to decline to prevent semiconductor device upper surface from occurring.
Wherein, before feeding oven cooking cycle, the whole height of pilot frame and chip.Make semiconductor in encapsulation process, chip can not be damaged by pressure and semiconductor packages can not be caused to overflow glue, improve the package quality of product, further increase the integral heat sink performance of product.
Embodiment three
The injection step that the present embodiment provides, any one semiconductor device provided for above-described embodiment prevents the method for packing of excessive glue.
With reference to figure tri-to figure seven, the injection step that embodiment three provides comprises: step S31-S34.
Step S41, tapes at the lower surface of lead frame;
Wherein, the bottom surface of chip 10 and end face bond respectively by conjunction with material 20 and described first lead frame 30 and described second lead frame 40,
50 are taped at the lower surface of described first lead frame 30.
Step S42, injection mould closing;
Wherein, injection mold 60 matched moulds, contacts with the upper surface of described first lead frame 30.
Step S43, mould presses down, and the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact;
Wherein, injection mold 60 presses down, and the adhesive tape 50 of the lower surface of described first lead frame 30 is out of shape, the described upper surface of the second lead frame 40 and the inner surface close contact of injection mold 60.
Step S44, injection mo(u)lding.
Wherein, in injection mold 60, inject colloid 70, the upper surface of described second lead frame 40 exposes to colloid 70.
After completing injection step, tear the adhesive tape being positioned at described first lead frame 30 off, the first lead frame 30 is leaked outside in colloid 70.
A kind of semiconductor device provided by the invention prevents the method for packing of excessive glue, by the method for taping at lead frame lower surface, when making injection mould closing, in the process that mould presses down, the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact, and excessive glue causes the heat dispersion of semiconductor device and aesthetic measure to decline to prevent semiconductor device upper surface from occurring.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.

Claims (5)

1. semiconductor device prevents a method for packing for excessive glue, comprises the steps:
Die bonding;
Lead frame is superimposed;
Wire bonds;
Injection moulding;
It is characterized in that: described injection step comprises:
Tape at the lower surface of lead frame;
Injection mould closing;
Mould presses down, and the adhesive tape distortion of lead frame lower surface makes lead frame and mould close contact;
Injection mo(u)lding.
2. method for packing according to claim 1, is characterized in that:
Described die bonding step comprises:
Prepare the first lead frame;
Adhering chip: the lower surface of described chip is by bonding with described first lead frame in conjunction with material.
3. method for packing according to claim 2, is characterized in that:
Described lead frame laminating step comprises:
Prepare the second lead frame;
Cementation laminated: described second lead frame and described first lead frame superimposed, and by bonding with the upper surface of described chip in conjunction with material.
4. method for packing according to claim 3, is characterized in that: before injection step, also comprises baking procedure, by first lead frame good with described die bonding and the second lead frame, send into oven cooking cycle, in conjunction with material solidification after baking, and then semiconductor whole height is determined.
5. method for packing according to claim 4, is characterized in that: before feeding oven cooking cycle, the whole height of pilot frame and chip.
CN201410836378.5A 2014-12-29 2014-12-29 A kind of semiconductor devices prevents the method for packing of excessive glue Active CN104599983B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410836378.5A CN104599983B (en) 2014-12-29 2014-12-29 A kind of semiconductor devices prevents the method for packing of excessive glue

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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CN104599983B CN104599983B (en) 2018-01-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105762084A (en) * 2016-04-29 2016-07-13 南通富士通微电子股份有限公司 Packaging method and packaging device for flip chip

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060240140A1 (en) * 2005-04-22 2006-10-26 Towa Corporation Resin molding apparatus
CN103700596A (en) * 2013-12-09 2014-04-02 宁波市鄞州科启动漫工业技术有限公司 Compression mold packaging method and device for reducing bubbles in mold packaging colloid
CN104064481A (en) * 2013-03-18 2014-09-24 日东电工株式会社 Adhering Apparatus And Method For Manufacturing Electronic Apparatus
CN203942731U (en) * 2014-04-02 2014-11-12 东莞劲胜精密组件股份有限公司 A kind of metal waterproof case of electronic product

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060240140A1 (en) * 2005-04-22 2006-10-26 Towa Corporation Resin molding apparatus
CN104064481A (en) * 2013-03-18 2014-09-24 日东电工株式会社 Adhering Apparatus And Method For Manufacturing Electronic Apparatus
CN103700596A (en) * 2013-12-09 2014-04-02 宁波市鄞州科启动漫工业技术有限公司 Compression mold packaging method and device for reducing bubbles in mold packaging colloid
CN203942731U (en) * 2014-04-02 2014-11-12 东莞劲胜精密组件股份有限公司 A kind of metal waterproof case of electronic product

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105762084A (en) * 2016-04-29 2016-07-13 南通富士通微电子股份有限公司 Packaging method and packaging device for flip chip

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Publication number Publication date
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