CN104578790A - Digital signal sampling circuit applied to primary-side feedback flyback converter and control method of digital signal sampling circuit - Google Patents
Digital signal sampling circuit applied to primary-side feedback flyback converter and control method of digital signal sampling circuit Download PDFInfo
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- CN104578790A CN104578790A CN201410834298.6A CN201410834298A CN104578790A CN 104578790 A CN104578790 A CN 104578790A CN 201410834298 A CN201410834298 A CN 201410834298A CN 104578790 A CN104578790 A CN 104578790A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33515—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention relates to a digital signal sampling circuit applied to a primary-side feedback flyback converter and a control method of the digital signal sampling circuit. The sampling circuit is provided with a control module comprising a sampling module and a digital control core, wherein the sampling module comprises two comparators, a time calculation module and an error production circuit; positive input ends of the two comparators are connected with sampling voltage Vsense in main topology; a negative input end of the comparator 1 is connected with fixed voltage Vr; a negative input end of the comparator 2 is connected with fixed voltage Vzvs; outputs of the two comparators generate time T1 and T2 via the time calculation module; the error production circuit obtains an error signal digital value e(n) according to a magnitude relationship between the time T1 and T2; the error signal e(n) and a sampling current signal Isense are simultaneously output to the digital control core; the digital control core is a general digital negative feedback control module; and an output duty ratio signal duty is connected with a grid of a switch tube Q1 in the main topology.
Description
Technical field
The present invention relates to digital switch power supply, particularly relate to a kind of the digital signal samples circuit and the control method thereof that are applied to former limit feedback anti exciting converter.
Background technology
Along with the development of digital technology, digital power is due to the advantage of himself, more and more come into one's own, in AC-DC and DC-DC Switching Power Supply, increasing control system adopts digital form to realize, relative to analog controller, digitial controller has following advantage: digital power overcomes the complexity of present generation power supplies, it achieve the fusion of Digital and analog technology, provide very strong adaptability and flexibility, possess direct supervision, process and the ability of adaptive system condition, almost any power requirement can be met.Digital power also by remote diagnosis to guarantee the system reliability continued, realize the function such as fault management, overvoltage (stream) protection, automatically redundancy.Because the integrated level of digital power is very high, the complexity of system does not increase too much with the increase of function, peripheral components is little, decrease and account for plate area, simplify and manufacture and design flow process, simultaneously, the automatic diagnosis of digital power, the ability of adjustment make debugging and maintenance work become light, digital power managing chip is easy under heterogeneous and synchronizing signal, carry out heterogeneous formula parallel connection application in addition, extensibility and repeatability outstanding, easily realize load current-sharing, reduce EMI, and simplify filter circuit design.Just because of these advantages, digital power just can become the development trend of following Switching Power Supply.
Digital sampling techniques has irreplaceable effect for the development promoting digital power, traditional digital signal samples is at the inner integrated ADC sample circuit of power supply chip, no doubt digital signal accurately can be obtained by such technology, but an integrated adc circuit not only increases the area of chip, improve cost, more importantly improve the power consumption of chip self.In order to solve such problem, IWATT company proposes a kind of more classical flex point sampling algorithm, as shown in Figure 1, in this algorithm, only need two DAC-circuit and several comparator circuit, just accurately can obtain the digital information of output voltage, this algorithm of application IWATT company, sample relative to traditional ADC, substantially reduce area and the power consumption of chip.But two DAC-circuit and several comparator also occupies a part of area of chip, still certain impact can be produced to the area of chip and power consumption.
Summary of the invention
For overcoming limitation and the deficiency of prior art, the invention provides a kind of digital signal samples algorithm for former limit feedback anti exciting converter.
The present invention is by the following technical solutions: a kind of digital signal samples circuit being applied to former limit feedback anti exciting converter, and the main topology of former limit feedback anti exciting converter comprises rectifier bridge, filter capacitor C1, resistance R3, transformer T1, sustained diode 1, storage capacitor C2, electric capacity C3, load R
l, switching tube Q1, sampling divider resistance R1 and R2, diode D2, current sampling resistor Rsense, wherein transformer has three windings: former limit winding Np, vice-side winding Ns, auxiliary winding Naux, auxiliary winding is identical with the Same Name of Ends of vice-side winding, and contrary with former limit Motor Winding Same Name of Ends, and resistance R3, electric capacity C3 and diode D2 form RCD circuit, ensure the trouble free service of switching tube Q1, it is characterized in that:
Control module is set, the sampled voltage input Vsense of control module connects the link of divider resistance R1 and R2, the source electrode of sample rate current input Isense connecting valve pipe Q1 of control module and the link of current sampling resistor Rsense, the grid of the duty cycle signals duty connecting valve pipe Q1 that control module exports;
Said control module comprises sampling module and digital control core, sampling module comprises comparator 1 and comparator 2 and Time Calculation module and error and produces circuit, comparator 1 and the positive input terminal of comparator 2 are all connected sampled voltage input Vsense, the negative input end of comparator 1 is connected and fixed voltage Vr, and this voltage Vr is determined by vice-side winding Ns and auxiliary winding Naux turn ratio and sample divider resistance R1, R2; The negative input end of comparator 2 connects the 0 current potential fixed voltage Vzvs that internal reference is given; The output signal of comparator 1 and comparator 2 is all input to Time Calculation module, Time Calculation module is according to the output signal of comparator 1 and comparator 2, applicating counter obtains time T1 and T2, time T1 and T2 is input to error and produces circuit, error produces circuit and obtains error signal e (n) according to the magnitude relationship of time T1 and T2, as T2=2*T1, the error signal e (n) of output is 0; As T2<2*T1, export a positive error signal e (n), error signal e (n) is a positive digital amount, and its size is relevant with the difference of T2 and 2*T1, the difference of T2 and 2*T1 is larger, and error signal e (n) is larger; As T2>2*T1, export a negative error signal e (n), error signal e (n) is a negative digital quantity, and its size is relevant with the difference of T2 and 2*T1, the difference of T2 and 2*T1 is larger, and error signal e (n) is less;
Error signal e (n) and sample rate current input signal Isense are two input signals of digital control core, digital control core is a general digital negative feedback control module, comprise digital compensator, comparator 3 and rest-set flip-flop, error signal e (n) obtains through digital compensator the negative input end that sample rate current threshold value Ipeak is connected to comparator 3, sample rate current information Isense connects the positive input terminal of comparator 3, the output of comparator 3 connects the R end of rest-set flip-flop, the pulse signal SET of fixed frequency connects the S end of rest-set flip-flop, the grid of rest-set flip-flop output duty cycle signal duty connecting valve pipe Q1.
The above-mentioned control method being applied to the digital signal samples circuit of former limit feedback anti exciting converter, it is characterized in that: input ac voltage AC is connected to the former limit winding of transformer by rectifier bridge and filter capacitor C1, now transformer primary side winding Np stored energy, switching tube Q1 closes and has no progeny, transformer primary side winding Np stops stored energy and Energy Coupling to vice-side winding Ns, is coupled and next energy passes through sustained diode 1 and storage capacitor C2 supply load R
lconsume, in a switch periods, when the output voltage stabilization of anti exciting converter is fed back on former limit, the energy of AC supply and load R
lthe energy consumed is equal, when the output voltage of former limit feedback anti exciting converter is less than normal, next switch periods, the sampled voltage Vsense that control module is come according to sampling and sample rate current Isense signal, increase the time of switching tube Q1 conducting, make output voltage return to stationary value; When the output voltage of former limit feedback anti exciting converter is bigger than normal, next switch periods, the sampled voltage Vsense that control module is come according to sampling and sample rate current Isense signal, reduce the time of switching tube Q1 conducting, and the output voltage making former limit feed back anti exciting converter returns to stationary value;
Detailed process is as follows: when error signal e (n) is 0, the sample rate current threshold value Ipeak that digital compensator produces is constant, when error signal e (n) is for time negative, the sample rate current threshold value Ipeak that digital compensator produces reduces, when error signal e (n) is timing, the sample rate current threshold value Ipeak that digital compensator produces increases, during switching tube Q1 conducting, sample rate current Isense increases, when sample rate current Isense is increased to equal with sample rate current threshold value Ipeak, comparator 3 exports a high impulse, rest-set flip-flop is resetted, signal SET is used for set rest-set flip-flop, when the error signal e (n) inputted is 0, the duty ratio of duty cycle signals duty is constant, when the error signal e (n) of input is when being less than 0, obtain duty cycle signals duty duty ratio to reduce, when the error signal e (n) of input is timing, the duty cycle signals duty duty ratio obtained increases, the output voltage stabilization of anti exciting converter is made by such negative-feedback regu-lation.
Advantage of the present invention and remarkable result:
1, present invention eliminates the analog to digital conversion circuit (ADC) needed for sampling and D/A converting circuit (DAC), for chip saves area and power consumption.
2, the present invention can produce the size of the error signal digital quantity that circuit produces according to the quantitative regulating error of the concrete size of T1 and T2, well improves control precision.
Accompanying drawing explanation
Tu1Shi IWATT company sampling algorithm structure chart;
Fig. 2 is overall structure reduced graph of the present invention;
Fig. 3 is control module cut-away view;
To be correlated with when Fig. 4 is output voltage stabilization oscillogram;
Fig. 5 be output voltage bigger than normal time to be correlated with oscillogram;
Fig. 6 be output voltage less than normal time to be correlated with oscillogram;
Fig. 7 be output voltage very little be waveform correlation figure.
Fig. 8 is digital control core inner structure chart.
Embodiment
Referring to Fig. 2, the main topology of existing former limit feedback anti exciting converter comprises rectifier bridge, filter capacitor C1, resistance R3, transformer T1, sustained diode 1, storage capacitor C2, electric capacity C3, load R
l, switching tube Q1, divider resistance R1 and R2, diode D2, current sampling resistor Rsense, wherein transformer has three windings: former limit winding Np, vice-side winding Ns, auxiliary winding Naux, auxiliary winding is identical with the Same Name of Ends of vice-side winding, and with former limit Motor Winding Same Name of Ends is contrary, resistance R3, electric capacity C3 and diode D2 form RCD circuit, ensure the trouble free service of switching tube Q1.The present invention arranges the grid of the duty ratio output duty connecting valve pipe Q1 of control module, the sampled voltage Vsense of control module hold connect divider resistance R2 and the link of R1, the sample rate current Isense of control module holds the ungrounded end connecting current sampling resistor Rsense.During switching tube Q1 conducting, input ac voltage AC is connected to the former limit winding of transformer by rectifier bridge and filter capacitor C1, now transformer primary side winding Np stored energy, switching tube Q1 closes and has no progeny, transformer primary side winding Np stops stored energy and Energy Coupling to vice-side winding Ns, is coupled and next energy passes through sustained diode 1 and storage capacitor C2 supply load R
lconsume, in a switch periods, when the output voltage stabilization of anti exciting converter is fed back on former limit, the energy of AC supply and load R
lthe energy consumed should be equal, when the output voltage of former limit feedback anti exciting converter is less than normal, next switch periods, Vsense and the Isense signal that control module can be come according to sampling increases the time of switch conduction, output voltage is made to return to stationary value, when the output voltage of former limit feedback anti exciting converter is bigger than normal, next switch periods, Vsense and the Isense signal that control module can be come according to sampling reduces the time of switch conduction, makes output voltage return to stationary value.
Referring to Fig. 3, control module comprises sampling module and digital control core, and sampling module comprises two comparators, a Time Calculation module and an error signal generation circuit.Two comparators 1 with 2 positive input port be connected the auxiliary winding sampled signal of former limit feedback anti exciting converter, the negative input end of comparator 1 is connected and fixed voltage Vr, the negative input end of comparator 2 is connected and fixed voltage Vzvs, the wherein size of fixed voltage Vr and the proportional relation of output voltage of former limit feedback anti exciting converter, proportionality coefficient is the system parameters decision of being fed back anti exciting converter by former limit, and fixed voltage Vzvs is the voltage close to 0 position.The output elapsed time computing module computing of comparator 1 and comparator 2, applicating counter obtains time T1 and T2, wherein T1 represents comp2 and is high level and comp1 is low level pulse holds time, T2 represents comp2 and becomes first low level pulse after low level from high level and hold time, T1 and T2 is input to error and produces circuit, error produces circuit and obtains error signal e (n) according to the magnitude relationship of time T1 and T2, as T2=2*T1, the error signal e (n) exported is 0, as T2<2*T1, export a positive error signal e (n), error signal e (n) is a positive digital amount, its size is relevant with the difference of T2 and 2*T1, the difference of T2 and 2*T1 is larger, error signal e (n) is larger, as T2>2*T1, export a negative error signal e (n), error signal e (n) is a negative digital quantity, its size is relevant with the difference of T2 and 2*T1, the difference of T2 and 2*T1 is larger, error signal e (n) is less.
Error signal e (n) and sample rate current input signal Isense are two input signals of digital control core, digital control core is a general digital negative feedback control module, as shown in Figure 8, comprise digital compensator, comparator 3 and rest-set flip-flop, error signal e (n) obtains through digital compensator the negative input end that sample rate current threshold value Ipeak is connected to comparator 3, sample rate current information Isense connects the positive input terminal of comparator 3, the output of comparator 3 connects the R end of rest-set flip-flop, the pulse signal SET of fixed frequency connects the S end of rest-set flip-flop, the grid of rest-set flip-flop output duty cycle signal duty connecting valve pipe Q1.When the error signal e (n) of input is 0, the Ipeak that digital compensator produces is constant, the duty ratio of duty cycle signals duty is constant, when the error signal e (n) of input is when being less than 0, the Ipeak that digital compensator produces reduces, and obtains duty cycle signals duty duty ratio and reduces, when the error signal e (n) of input is timing, the Ipeak that digital compensator produces increases, and the duty cycle signals duty duty ratio obtained increases.During switch conduction, Isense increases, when Isense is increased to equal with Ipeak, comparator 3 exports a high impulse, and rest-set flip-flop is resetted, and signal SET is the pulse signal of a fixed frequency, receive the S end of rest-set flip-flop, be used for set rest-set flip-flop, by negative-feedback regu-lation as shown in the figure, just can realize the stable of output voltage.
Referring to Fig. 4-7, according to the auxiliary winding sampled signal waveform characteristic of former limit feedback anti exciting converter, during switch conduction, signal is a very little negative voltage, after switch disconnects, signal rises to rapidly a higher magnitude of voltage, and after switch disconnects in a period of time, signal can produce the vibration of a decay, then signal can decline with a very little slope, when the fly-wheel diode electric current of former limit feedback anti exciting converter drops to 0, signal is now claimed to be in A point, the magnitude of voltage of signal accurately can reflect the output voltage values of former limit feedback anti exciting converter and proportional relation, proportionality coefficient is identical with the proportionality coefficient that anti exciting converter output voltage is fed back on former limit with Vr, afterwards, signal can with fixing decay cycle of oscillation.By the output waveform comp2 of comparator 2, Time Calculation module can calculate the width T2 of comparator 2 output waveform comp2 first low level pulse after switch OFF, undertaken and computing by the output waveform comp1 of comparator 1 and the output waveform comp2 of comparator 2, Time Calculation module can obtain the output waveform of comparator 2 and the difference T1 of comparator 1 output waveform first high level pulse time width after switch OFF, winding sampled signal is assisted to give A point mutually if anti exciting converter is fed back on voltage Vr and former limit, T2=2*T1 should be had, now illustrate that the output voltage of former limit feedback anti exciting converter is in stable state, error produces circuit and exports the error signal e (n) that is 0.Winding sampled signal is assisted to give on A point mutually if anti exciting converter is fed back on voltage Vr and former limit, i.e. T2<2*T1, now illustrate that the output voltage of former limit feedback anti exciting converter is in state less than normal, this time error produces the error signal e (n) that circuit produces a positive digital amount, the size of error signal determines according to the concrete size of T1 and T2, if T2 is much less than the T1 of twice, so error signal is a larger positive digital amount, otherwise error signal can be a smaller positive digital amount.Winding sampled signal is assisted to give under A point mutually if anti exciting converter is fed back on voltage Vr and former limit, i.e. T2>2*T1, now illustrate that the output voltage of former limit feedback anti exciting converter is in state bigger than normal, this time error produces the error signal that circuit produces a negative digital quantity, the size of error signal absolute value determines according to the concrete size of T1 and T2, if T2 is much larger than the T1 of twice, so error signal absolute value is a larger digital quantity, otherwise error signal absolute value can be a smaller digital quantity.The error signal that digital control core inputs according to error signal generation circuit regulates with other controlled quentity controlled variable, defeated duty cycle signals, adjusts the output voltage of former limit feedback anti exciting converter.
Referring to Fig. 4, when former limit feedback anti exciting converter output voltage stabilization, sampled signal Vsense and fixed voltage Vr can intersect at A point, A point represents that now former limit feedback anti exciting converter sustained diode 1 electric current reduces to the moment of 0, the now magnitude of voltage of Vsense and the proportional relation of former limit feedback anti exciting converter output voltage, proportionality coefficient is that the system parameters feeding back anti exciting converter by former limit determines, determines primarily of vice-side winding Ns and auxiliary winding Naux turn ratio and sampling resistor R1, R2.Fixed voltage Vr and Vsense obtains waveform comp1 by comparator 1, and fixed voltage Vzvs and Vsense intersects at E and F, and fixed voltage Vzvs and Vsense obtains waveform comp2 by comparator 2.Time Calculation module obtains time T2 by the time width calculated between E and F 2, and Time Calculation module obtains time T1 according to the time width between A and E, and time T1 and T2 is input to error and produces circuit.Now T2 and T1 meets relation T2=2*T1, and it is the error signal e (n) of 0 that error generation circuit can export a value.
Referring to Fig. 5, when former limit feedback anti exciting converter output voltage is bigger than normal, sampled signal Vsense and fixed voltage Vr can intersect at B point under A point, A point represents that now former limit feedback anti exciting converter sustained diode 1 electric current reduces to the moment of 0, the now magnitude of voltage of Vsense and the proportional relation of former limit feedback anti exciting converter output voltage, proportionality coefficient is that the system parameters feeding back anti exciting converter by former limit determines, determines primarily of vice-side winding Ns and auxiliary winding Naux turn ratio and sampling resistor R1, R2.Fixed voltage Vr and Vsense obtains waveform comp1 by comparator 1, and fixed voltage Vzvs and Vsense intersects at E and F, and fixed voltage Vzvs and Vsense obtains waveform comp2 by comparator 2.Time Calculation module obtains time T2 by the time width calculated between E and F 2, Time Calculation module obtains time T1 according to the time width between B and E, time T1 and T2 is input to error and produces circuit, now T2 and T1 meets relation T2>2*T1, error produces circuit can export the error signal e (n) that a value is negative digital quantity, the size of error signal e (n) is determined by the concrete quantitative relationship of T2 and 2*T1, if T2 is much larger than the T1 of twice, so error signal e (n) absolute value is a larger digital quantity, otherwise error signal e (n) absolute value can be a smaller digital quantity.
Referring to Fig. 6, when former limit feedback anti exciting converter output voltage is less than normal, sampled signal Vsense and fixed voltage Vr can intersect at C point on A point, A point represents that now former limit feedback anti exciting converter sustained diode 1 electric current reduces to the moment of 0, the now magnitude of voltage of Vsense and the proportional relation of former limit feedback anti exciting converter output voltage, proportionality coefficient is that the system parameters feeding back anti exciting converter by former limit determines, determines primarily of vice-side winding Ns and auxiliary winding Naux turn ratio and sampling resistor R1, R2.Fixed voltage Vr and Vsense obtains waveform comp1 by comparator 1, and fixed voltage Vzvs and Vsense intersects at E and F, and fixed voltage Vzvs and Vsense obtains waveform comp2 by comparator 2.Time Calculation module obtains time T2 by the time width calculated between E and F 2, Time Calculation module obtains time T1 according to the time width between B and E, time T1 and T2 is input to error and produces circuit, now T2 and T1 meets relation T2<2*T1, error produces circuit can export the error signal e (n) that a value is positive digital amount, the size of error signal e (n) is determined by the concrete quantitative relationship of T2 and 2*T1, if T2 is much less than the T1 of twice, so error signal e (n) is a larger digital quantity, otherwise error signal e (n) can be a smaller digital quantity.
Referring to Fig. 7, when former limit feedback anti exciting converter output voltage is very little, sampled signal Vsense and fixed voltage Vr can not have intersection point, fixed voltage Vr and Vsense obtains waveform comp1 by comparator 1, fixed voltage Vzvs and Vsense obtains waveform comp2 by comparator 2, and E, F are the intersection points of fixed voltage Vzvs and Vsense.Time Calculation module can obtain time T2 by waveform comp2.Because sampled signal Vsense and fixed voltage Vr does not have intersection point, this time error produces the error signal e (n) that circuit produces a positive digital amount, and now the value of e (n) is larger, concrete size is relevant to the design parameter that anti exciting converter is fed back on former limit.
Claims (2)
1. be applied to a digital signal samples circuit for former limit feedback anti exciting converter, the main topology of former limit feedback anti exciting converter comprises rectifier bridge, filter capacitor C1, resistance R3, transformer T1, sustained diode 1, storage capacitor C2, electric capacity C3, load R
l, switching tube Q1, sampling divider resistance R1 and R2, diode D2, current sampling resistor Rsense, wherein transformer has three windings: former limit winding Np, vice-side winding Ns, auxiliary winding Naux, auxiliary winding is identical with the Same Name of Ends of vice-side winding, and contrary with former limit Motor Winding Same Name of Ends, and resistance R3, electric capacity C3 and diode D2 form RCD circuit, ensure the trouble free service of switching tube Q1, it is characterized in that:
Control module is set, the sampled voltage input Vsense of control module connects the link of divider resistance R1 and R2, the source electrode of sample rate current input Isense connecting valve pipe Q1 of control module and the link of current sampling resistor Rsense, the grid of the duty cycle signals duty connecting valve pipe Q1 that control module exports;
Said control module comprises sampling module and digital control core, sampling module comprises comparator 1 and comparator 2 and Time Calculation module and error and produces circuit, comparator 1 and the positive input terminal of comparator 2 are all connected sampled voltage input Vsense, the negative input end of comparator 1 is connected and fixed voltage Vr, and this voltage Vr is determined by vice-side winding Ns and auxiliary winding Naux turn ratio and sample divider resistance R1, R2; The negative input end of comparator 2 connects the 0 current potential fixed voltage Vzvs that internal reference is given; The output signal of comparator 1 and comparator 2 is all input to Time Calculation module, Time Calculation module is according to the output signal of comparator 1 and comparator 2, applicating counter obtains time T1 and T2, time T1 and T2 is input to error and produces circuit, error produces circuit and obtains error signal e (n) according to the magnitude relationship of time T1 and T2, as T2=2*T1, the error signal e (n) of output is 0; As T2<2*T1, export a positive error signal e (n), error signal e (n) is a positive digital amount, and its size is relevant with the difference of T2 and 2*T1, the difference of T2 and 2*T1 is larger, and error signal e (n) is larger; As T2>2*T1, export a negative error signal e (n), error signal e (n) is a negative digital quantity, and its size is relevant with the difference of T2 and 2*T1, the difference of T2 and 2*T1 is larger, and error signal e (n) is less;
Error signal e (n) and sample rate current input signal Isense are two input signals of digital control core, digital control core is a general digital negative feedback control module, comprise digital compensator, comparator 3 and rest-set flip-flop, error signal e (n) obtains through digital compensator the negative input end that sample rate current threshold value Ipeak is connected to comparator 3, sample rate current information Isense connects the positive input terminal of comparator 3, the output of comparator 3 connects the R end of rest-set flip-flop, the pulse signal SET of fixed frequency connects the S end of rest-set flip-flop, the grid of rest-set flip-flop output duty cycle signal duty connecting valve pipe Q1.
2. the control method being applied to the digital signal samples circuit of former limit feedback anti exciting converter according to claim 1, it is characterized in that: input ac voltage AC is connected to the former limit winding of transformer by rectifier bridge and filter capacitor C1, now transformer primary side winding Np stored energy, switching tube Q1 closes and has no progeny, transformer primary side winding Np stops stored energy and Energy Coupling to vice-side winding Ns, is coupled and next energy passes through sustained diode 1 and storage capacitor C2 supply load R
lconsume, in a switch periods, when the output voltage stabilization of anti exciting converter is fed back on former limit, the energy of AC supply and load R
lthe energy consumed is equal, when the output voltage of former limit feedback anti exciting converter is less than normal, next switch periods, the sampled voltage Vsense that control module is come according to sampling and sample rate current Isense signal, increase the time of switching tube Q1 conducting, make output voltage return to stationary value; When the output voltage of former limit feedback anti exciting converter is bigger than normal, next switch periods, the sampled voltage Vsense that control module is come according to sampling and sample rate current Isense signal, reduce the time of switching tube Q1 conducting, and the output voltage making former limit feed back anti exciting converter returns to stationary value;
Detailed process is as follows: when error signal e (n) is 0, the sample rate current threshold value Ipeak that digital compensator produces is constant, when error signal e (n) is for time negative, the sample rate current threshold value Ipeak that digital compensator produces reduces, when error signal e (n) is timing, the sample rate current threshold value Ipeak that digital compensator produces increases, during switching tube Q1 conducting, sample rate current Isense increases, when sample rate current Isense is increased to equal with sample rate current threshold value Ipeak, comparator 3 exports a high impulse, rest-set flip-flop is resetted, signal SET is used for set rest-set flip-flop, when the error signal e (n) inputted is 0, the duty ratio of duty cycle signals duty is constant, when the error signal e (n) of input is when being less than 0, obtain duty cycle signals duty duty ratio to reduce, when the error signal e (n) of input is timing, the duty cycle signals duty duty ratio obtained increases, the output voltage stabilization of anti exciting converter is made by such negative-feedback regu-lation.
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Cited By (17)
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| CN104868743A (en) * | 2015-06-16 | 2015-08-26 | 重庆邮电大学 | Auxiliary power supply system for electric vehicle |
| CN105099203A (en) * | 2015-07-24 | 2015-11-25 | 矽力杰半导体技术(杭州)有限公司 | Voltage sampling control circuit, voltage sampling control method and isolated converter |
| CN105486910A (en) * | 2016-01-20 | 2016-04-13 | 连云港杰瑞电子有限公司 | DC high voltage isolation detection method |
| CN105811780A (en) * | 2016-05-03 | 2016-07-27 | 东南大学 | Constant voltage control method for output voltage of primary-side feedback flyback type converter |
| CN106054995A (en) * | 2016-07-04 | 2016-10-26 | 东南大学 | Constant current control system for continuous current mode (CCM) and discontinuous conduct mode (DCM) of primary-side feedback flyback power supply |
| CN106533205A (en) * | 2016-11-01 | 2017-03-22 | 东南大学 | Method for improving constant-voltage sampling precision of primary-side feedback flyback power supply during high-power working |
| CN107769566A (en) * | 2017-03-28 | 2018-03-06 | 杰华特微电子（杭州）有限公司 | Isolated on-off circuit and its control method |
| CN109194097A (en) * | 2018-09-28 | 2019-01-11 | 杰华特微电子（杭州）有限公司 | Switching power source control circuit and method and Switching Power Supply |
| CN109406860A (en) * | 2018-12-24 | 2019-03-01 | 厦门能瑞康电子有限公司 | A kind of voltage sampling circuit |
| CN109995248A (en) * | 2017-12-29 | 2019-07-09 | 东南大学 | A kind of method of sampling improving flyback resonance class Switching Power Supply output stability |
| CN110581651A (en) * | 2019-10-12 | 2019-12-17 | 无锡芯朋微电子股份有限公司 | Highly integrated switching power supply and control circuit |
| CN110677046A (en) * | 2019-09-23 | 2020-01-10 | 东南大学 | Peak current mode digital control system and method for flyback power supply in DCM (discontinuous conduction mode) |
| CN110912377A (en) * | 2019-10-29 | 2020-03-24 | 南京航空航天大学 | Novel low-delay current sampling method for digital PWM converter |
| CN112198358A (en) * | 2020-09-07 | 2021-01-08 | 上海军陶电源设备有限公司 | Flyback converter input voltage secondary side detection circuit |
| CN112542939A (en) * | 2020-12-22 | 2021-03-23 | 成都启臣微电子股份有限公司 | Primary side feedback synchronous response circuit |
| CN114123788A (en) * | 2021-11-12 | 2022-03-01 | 许继集团有限公司 | Flexible direct-current transmission converter valve submodule redundancy energy-taking device and control method thereof |
| WO2022041578A1 (en) * | 2020-08-31 | 2022-03-03 | 华源智信半导体(深圳)有限公司 | Power converter and current comparison feedback circuit |
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Cited By (27)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104868743A (en) * | 2015-06-16 | 2015-08-26 | 重庆邮电大学 | Auxiliary power supply system for electric vehicle |
| CN105099203B (en) * | 2015-07-24 | 2018-06-26 | 矽力杰半导体技术(杭州)有限公司 | A kind of voltage sample control circuit, voltage sample control method and isolated converter |
| CN105099203A (en) * | 2015-07-24 | 2015-11-25 | 矽力杰半导体技术(杭州)有限公司 | Voltage sampling control circuit, voltage sampling control method and isolated converter |
| CN105486910A (en) * | 2016-01-20 | 2016-04-13 | 连云港杰瑞电子有限公司 | DC high voltage isolation detection method |
| CN105486910B (en) * | 2016-01-20 | 2018-09-07 | 连云港杰瑞电子有限公司 | A kind of high direct voltage isolation detection method |
| CN105811780A (en) * | 2016-05-03 | 2016-07-27 | 东南大学 | Constant voltage control method for output voltage of primary-side feedback flyback type converter |
| CN105811780B (en) * | 2016-05-03 | 2018-04-24 | 东南大学 | A kind of output voltage constant pressure control method of primary side feedback inverse excitation type converter |
| CN106054995B (en) * | 2016-07-04 | 2017-08-25 | 东南大学 | A kind of primary side feedback flyback power supply CCM and the Constant Current Control System of DCM patterns |
| CN106054995A (en) * | 2016-07-04 | 2016-10-26 | 东南大学 | Constant current control system for continuous current mode (CCM) and discontinuous conduct mode (DCM) of primary-side feedback flyback power supply |
| CN106533205A (en) * | 2016-11-01 | 2017-03-22 | 东南大学 | Method for improving constant-voltage sampling precision of primary-side feedback flyback power supply during high-power working |
| CN106533205B (en) * | 2016-11-01 | 2018-10-23 | 东南大学 | A method of primary side feedback flyback sourse is improved in pressure constant state down-sampling precision |
| CN107769566A (en) * | 2017-03-28 | 2018-03-06 | 杰华特微电子（杭州）有限公司 | Isolated on-off circuit and its control method |
| CN107769566B (en) * | 2017-03-28 | 2023-07-18 | 杰华特微电子股份有限公司 | Isolation type switch circuit and control method thereof |
| CN109995248B (en) * | 2017-12-29 | 2020-11-27 | 东南大学 | Sampling method for improving output stability of flyback resonant switching power supply |
| CN109995248A (en) * | 2017-12-29 | 2019-07-09 | 东南大学 | A kind of method of sampling improving flyback resonance class Switching Power Supply output stability |
| CN109194097A (en) * | 2018-09-28 | 2019-01-11 | 杰华特微电子（杭州）有限公司 | Switching power source control circuit and method and Switching Power Supply |
| CN109406860A (en) * | 2018-12-24 | 2019-03-01 | 厦门能瑞康电子有限公司 | A kind of voltage sampling circuit |
| CN110677046A (en) * | 2019-09-23 | 2020-01-10 | 东南大学 | Peak current mode digital control system and method for flyback power supply in DCM (discontinuous conduction mode) |
| CN110677046B (en) * | 2019-09-23 | 2020-06-16 | 东南大学 | Peak current mode digital control system and method for flyback power supply in DCM (discontinuous conduction mode) |
| CN110581651B (en) * | 2019-10-12 | 2020-09-08 | 无锡芯朋微电子股份有限公司 | Highly integrated switching power supply and control circuit |
| CN110581651A (en) * | 2019-10-12 | 2019-12-17 | 无锡芯朋微电子股份有限公司 | Highly integrated switching power supply and control circuit |
| US11056977B2 (en) | 2019-10-12 | 2021-07-06 | Wuxi Chipown Microelectronics Co., Ltd. | Highly integrated switching power supply and control circuit |
| CN110912377A (en) * | 2019-10-29 | 2020-03-24 | 南京航空航天大学 | Novel low-delay current sampling method for digital PWM converter |
| WO2022041578A1 (en) * | 2020-08-31 | 2022-03-03 | 华源智信半导体(深圳)有限公司 | Power converter and current comparison feedback circuit |
| CN112198358A (en) * | 2020-09-07 | 2021-01-08 | 上海军陶电源设备有限公司 | Flyback converter input voltage secondary side detection circuit |
| CN112542939A (en) * | 2020-12-22 | 2021-03-23 | 成都启臣微电子股份有限公司 | Primary side feedback synchronous response circuit |
| CN114123788A (en) * | 2021-11-12 | 2022-03-01 | 许继集团有限公司 | Flexible direct-current transmission converter valve submodule redundancy energy-taking device and control method thereof |
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