WO2022041578A1 - Power converter and current comparison feedback circuit - Google Patents

Abstract

A power converter and a current comparison feedback circuit (1). The current comparison feedback circuit (1) can be used for forming and maintaining a reference current, the reference current being determined according to a first current of a first resistor (R1) when a switching tube (2) is in an on state; when the switching tube (2) is in an off state, a second current of the first resistor (R1) is acquired, and according to a comparison result of the reference current and the second current, a feedback signal is sent to a control module (3) so as to utilize the feedback signal to represent whether a voltage at the two ends of the switching tube (2) enters a target interval, the target interval matching voltage 0 V.

Description

Power Converter and Current Comparison Feedback Circuit technical field

The invention relates to the field of circuit detection, in particular to a power converter and a current comparison feedback circuit.

Background technique

In the switching power supply converter, taking the flyback converter as an example, its core components may include, for example, a switch tube and a transformer, and the switch tube is connected in series with the primary winding of the transformer, wherein the switch tube is controlled by the control module, in order to realize the control of the switch tube. , and other possible control requirements, it is necessary to detect the source-drain voltage of the switch. Among them, it is necessary to detect whether the source-drain voltage of the switch tube is close to 0V, and then judge whether to turn on the switch tube according to the detection result, so as to realize ZVS (ZeroVoltageSwitch). This way, the purpose of reducing the turn-on loss can be achieved.

In the existing related art, one method is to directly sample the source-drain voltage of the switch tube through resistance for detection, however, it will bring about the problem of large power loss in the detection part, and further, may also bring security risks; another One method is to directly detect the voltage of the auxiliary winding. When the voltage fed back by the auxiliary winding is less than 0V, and after a certain time delay, the ZVS of the switch tube can be obtained. This method cannot obtain an accurate ZVS point, and it varies with the output voltage and current. Variety

SUMMARY OF THE INVENTION

The invention provides a power converter and a current comparison feedback circuit to solve the problems of large power loss and detection accuracy in the detection part. .

According to a first aspect of the present invention, a power converter is provided, comprising: a switch tube, a transformer, and a control module for controlling the on and off of the switch tube, wherein the transformer includes a primary winding on the input side, The secondary winding on the output side and the auxiliary winding on the output side, the switch tube is connected in series with the primary winding and then connected between the input power supply and the ground;

The power converter further includes: a first resistor, a second resistor and a current comparison feedback circuit;

The first end of the first resistor is connected to the first end of the auxiliary winding, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected To the second end of the auxiliary winding, the second end of the auxiliary winding is grounded; one end of the current comparison feedback circuit is connected to the second end of the first resistor, and the other end of the current comparison feedback circuit is connected to the the control module, the control module is also connected to the control end of the switch tube;

The current comparison feedback circuit is used to:

forming and maintaining a reference current, where the reference current is determined according to the first current of the first resistor when the switch is in an on state;

When the switch tube is in an off state, the second current of the first resistor is collected, and a feedback signal is sent to the control module according to the comparison result between the reference current and the second current, so as to use the The feedback signal indicates whether the voltage across the switch tube enters the target interval, and the target interval matches the 0V voltage.

Optionally, the current comparison feedback circuit includes: a current copy unit, a first mirror unit, a second mirror unit, a reference maintaining unit and an output unit; the current copy unit is connected to the second end of the first resistor, so The first mirror unit and the second mirror unit are connected to the current copy unit, the reference sustain unit is connected to the first mirror unit, and the input side of the output unit is connected to the reference sustain unit and the second mirror unit Feedback nodes between mirror elements;

The current copying unit is used for: copying the first current and the second current;

The first mirroring unit is used for: mirroring the first current copied by the current copying unit when the switch tube is in an on state, and forming an intermediate current; the intermediate current is associated with the first current corresponding to the The first mirror current of ;

The reference maintaining unit is configured to: form the reference current matching the intermediate current when the switch is in an on state, and maintain the reference current when the switch is in an off state ;

The second mirroring unit is used for: mirroring the second current copied by the current copying unit when the switch tube is in an off state, and forming a second mirror current corresponding to the second current;

The output unit is configured to: when the switch tube is in an off state, obtain a comparison result between the second mirror current and the reference current, and obtain a comparison result between the second mirror current and the reference current according to the comparison result of the second mirror current and the reference current , and send out the feedback signal.

Optionally, the difference between the intermediate current and the first mirror current is a fixed value.

Optionally, the first mirroring unit is connected to the control module;

The control module is also used for:

When the switch tube is in an off state, controlling the first mirror unit to be in an open state;

When the switch tube is in the on state, the first mirror unit is controlled to be in the on state, so that the first mirror unit in the on state can form the intermediate current.

Optionally, the first mirror unit includes a first P-channel MOS transistor, a first N-channel MOS transistor, at least one switch and a first current source; the at least one switch includes a first switch and/or a second switch;

The source and gate of the first P-channel MOS transistor are connected to the current replication unit, and the drain of the first P-channel MOS transistor is connected to the first N-channel directly or through the first switch The drain of the MOS transistor, the source of the first N-channel MOS transistor is grounded, the gate of the first N-channel MOS transistor is connected to the reference maintaining unit directly or through the second switch, and the first N-channel MOS transistor is connected to the reference maintaining unit. The gate of an N-channel MOS transistor is also connected to the drain of the first N-channel MOS transistor; the drain of the first P-channel MOS transistor is also directly or indirectly connected to the input side of the first current source , the output side of the first current source is grounded; the at least one switch is connected to the control module;

When the control module controls the first mirror unit to be in an open state, it is specifically configured to: control the at least one switch to be disconnected;

When the control module controls the first mirror unit to be in an on state, it is specifically configured to: control the at least one switch to be turned on;

in:

The current of the first P-channel MOS transistor is the first mirror current corresponding to the first current when the switch transistor is in an on state and the at least one switch is all on;

The current of the first N-channel MOS transistor is the intermediate current when the switch transistor is in an on state and the at least one switch is all on.

Optionally, the reference maintaining unit includes an energy storage device and a second N-channel MOS transistor, and a first end of the energy storage device is respectively connected to the first mirror unit and the second N-channel MOS transistor. a gate, the source of the second N-channel MOS transistor is grounded, and the drain of the second N-channel MOS transistor is connected to the second mirror unit;

The energy storage device is used for:

When the first mirror unit forms the intermediate current, obtain the corresponding energy storage current, and store energy to form a maintenance voltage; when the first mirror unit does not form the intermediate current, use the maintenance voltage as the supplying power to the gate of the second N-channel MOS transistor;

Wherein, the current of the second N-channel MOS transistor is the reference current;

When the first mirror unit forms the intermediate current, the reference current is a mirror current of the intermediate current;

When the first mirror unit does not form the intermediate current, the reference current is formed by supplying power to the gate of the second N-channel MOS transistor by the sustain voltage.

Optionally, the second mirroring unit includes a second P-channel MOS transistor, the source and gate of the second P-channel MOS transistor are connected to the current replication unit, and the second P-channel MOS transistor is The drain is connected to the reference sustain unit;

in:

When the switch tube is in an on state, the current of the second P-channel MOS tube is a first mirror current corresponding to the first current;

When the switch transistor is in an off state, the current of the second P-channel MOS transistor is a second mirror current corresponding to the second current.

Optionally, the output unit includes a first inverter and a second inverter, the input end of the first inverter is connected to the feedback node, and the output end of the first inverter is connected to the feedback node. The input end of the second inverter and the output end of the second inverter are connected to the control module.

Optionally, the current replication unit includes a second current source, a first transistor, a second transistor and a third P-channel MOS transistor; the first transistor is an NPN transistor, and the second transistor is an NPN transistor. The triode is a PNP tube;

The emitter of the first transistor is connected to the second end of the first resistor, the collector of the first transistor is connected to the drain of the third P-channel MOS transistor, the first three The base of the transistor is connected to the collector of the second transistor, the emitter of the first transistor is grounded, and the source of the third P-channel MOS transistor is also connected to the second current source. an input side, the output side of the second current source is connected to the collector of the second triode;

The source and gate of the third P-channel MOS transistor are connected to the first mirror unit and the second mirror unit, so that the first mirror unit and the second mirror unit can mirror the The current of the third P-channel MOS transistor obtains the corresponding mirror current.

Optionally, the power converter further includes a clamping module, and both ends of the second resistor are connected in parallel with the clamping module;

The clamping module is used to clamp the node voltage between the first resistor and the second resistor to a clamping voltage when the switch tube is turned on, and the clamping voltage matches the 0V voltage .

According to a second aspect of the present invention, a current comparison feedback circuit is provided, comprising: a current copy unit, a first mirror unit, a second mirror unit, a reference maintaining unit and an output unit; the current copy unit is connected to the circuit to be tested, The first mirror unit and the second mirror unit are connected to the current copy unit, the reference maintaining unit is connected to the first mirror unit, and the input side of the output unit is connected to the reference maintaining unit and the first mirror unit. Feedback node between two mirror elements;

The current copying unit is used for: collecting the first current of the circuit under test in the first period and the second current in the second period;

The first mirror unit is configured to: in the first period, mirror the first current copied by the current copy unit to form an intermediate current; the intermediate current is associated with a first mirror corresponding to the first current current;

The reference maintaining unit is used for: forming a reference current matching the intermediate current in the first period, and maintaining the reference current unchanged in the second period;

The second mirroring unit is configured to: in the second period, mirror the second current copied by the current copying unit, and form a second mirror current corresponding to the second current;

The output unit is configured to: in the second period, obtain a comparison result between the second mirror current and the reference current, and report to the control module according to the comparison result between the second mirror current and the reference current Send a feedback signal.

Optionally, the first mirror unit includes a first P-channel MOS transistor, a first N-channel MOS transistor, at least one switch and a first current source; the at least one switch includes a first switch and/or a second switch;

The source and gate of the first P-channel MOS transistor are connected to the current replication unit, and the drain of the first P-channel MOS transistor is connected to the first N-channel directly or through the first switch The drain of the MOS transistor, the source of the first N-channel MOS transistor is grounded, the gate of the first N-channel MOS transistor is connected to the reference maintaining unit directly or through the second switch, and the first N-channel MOS transistor is connected to the reference maintaining unit. The gate of an N-channel MOS transistor is also connected to the drain of the first N-channel MOS transistor; the drain of the first P-channel MOS transistor is also directly or indirectly connected to the input side of the first current source , the output side of the first current source is grounded; the at least one switch is connected to the control module;

in:

In the first period and when the at least one switch is turned on, the current of the first P-channel MOS transistor is the first mirror current corresponding to the first current;

During the first period and when the at least one switch is turned on, the current of the first N-channel MOS transistor is the intermediate current.

Optionally, the reference maintaining unit includes an energy storage device and a second N-channel MOS transistor, and a first end of the energy storage device is respectively connected to the first mirror unit and the second N-channel MOS transistor. a gate, the source of the second N-channel MOS transistor is grounded, and the drain of the second N-channel MOS transistor is connected to the second mirror unit;

The energy storage device is used for:

When the first mirror unit forms the intermediate current, obtain the corresponding energy storage current, and store energy to form a maintenance voltage; when the first mirror unit does not form the intermediate current, use the maintenance voltage as the supplying power to the gate of the second N-channel MOS transistor;

Wherein, the current of the second N-channel MOS transistor is the reference current;

When the first mirror unit forms the intermediate current, the reference current is a mirror current of the intermediate current;

When the first mirror unit does not form the intermediate current, the reference current is formed by supplying power to the gate of the second N-channel MOS transistor by the sustain voltage.

Optionally, the second mirroring unit includes a second P-channel MOS transistor, the source and gate of the second P-channel MOS transistor are connected to the current replication unit, and the second P-channel MOS transistor is The drain is connected to the reference sustain unit;

in:

The current of the second P-channel MOS transistor during the first period is the first mirror current corresponding to the first current;

During the second period, the current of the second P-channel MOS transistor is a second mirror current corresponding to the second current.

Optionally, the output unit includes a first inverter and a second inverter, the input end of the first inverter is connected to the feedback node, and the output end of the first inverter is connected to the feedback node. The input end of the second inverter, and the output end of the second inverter is connected to the control module.

Optionally, the current replication unit includes a second current source, a first transistor, a second transistor and a third P-channel MOS transistor; the first transistor is an NPN transistor, and the second transistor is an NPN transistor. The triode is a PNP tube;

The emitter of the first triode is directly or indirectly connected to the circuit to be tested, the collector of the first triode is connected to the drain of the third P-channel MOS transistor, and the first triode is connected to the drain of the third P-channel MOS transistor. The base of the transistor is connected to the collector of the second triode, the emitter of the second triode is grounded, the base and the emitter of the second triode are connected to each other, and the third P-channel The source of the channel MOS transistor is also connected to the input side of the second current source, and the output side of the second current source is connected to the collector of the second triode;

The source and gate of the third P-channel MOS transistor are connected to the first mirror unit and the second mirror unit, so that the first mirror unit and the second mirror unit can mirror the The current of the third P-channel MOS transistor obtains the corresponding mirror current.

In the power converter provided by the present invention, the correlation between the current of the first resistor connected in series with the auxiliary winding and the source-drain voltage of the switch tube is fully considered, and based on the maintained reference voltage, the on-switch of the first resistor is accurately detected. Whether the second current after the tube is turned off drops and reaches the first current when the switch tube is not turned off, and further, the detection result can correspond to whether the source-drain voltage of the switch tube crosses zero. It can be seen that the present invention does not need to directly detect the switch tube, avoids the problem of large power loss in the detection part, and realizes detection with lower power loss.

At the same time, in the power converter and the current comparison feedback circuit provided by the present invention, based on the reference voltage, the present invention creatively realizes the current of the circuit to be measured under a period (for example, the first period, the period when the switch tube is in a conducting state) Comparison with the current of the circuit to be tested in another period (eg, the second period, the period when the switch is in the off state).

In view of this, in the prior art, in order to compare currents in different time periods, it is necessary to detect the currents of a certain period of time, and then store them in the memory of the control module in digital form, and then detect the currents of another period of time. After retrieving the stored information, this method needs to occupy the memory and program resources of the control module, and also increases the processing burden and processing flow of the control module, which affects the processing efficiency. In contrast, in the present invention, the control module only needs to obtain the detection result, which effectively simplifies the processing burden and processing flow, saves memory and program resources, and also helps to improve processing efficiency.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention, and for those of ordinary skill in the art, other drawings can also be obtained from these drawings without any creative effort.

1 is a schematic diagram 1 of a circuit structure of a power converter in an embodiment of the present invention;

2 is a schematic diagram 2 of the circuit structure of the power converter in an embodiment of the present invention;

3 is a schematic diagram 3 of the circuit structure of the power converter in an embodiment of the present invention;

4 is a schematic circuit diagram of a power converter in an embodiment of the present invention;

5 is a schematic diagram of electrical signal comparison of a power converter in an embodiment of the present invention;

6 is a schematic diagram 5 of the circuit structure of a power converter in an embodiment of the present invention;

7 is a schematic diagram 1 of the structure of a current comparison feedback circuit in an embodiment of the present invention;

8 is a second structural schematic diagram of a current comparison feedback circuit in an embodiment of the present invention;

9 is a schematic circuit diagram of a current comparison feedback circuit, a first resistor, a second resistor and an auxiliary winding according to an embodiment of the present invention;

FIG. 10 is a third structural schematic diagram of a current comparison feedback circuit in an embodiment of the present invention;

FIG. 11 is a schematic circuit diagram of a current comparison feedback circuit in an embodiment of the present invention.

Description of reference numbers:

1- Current comparison feedback circuit;

11- the first mirror unit;

111 - the first current source;

12 - the second mirror unit;

13- Current copy unit;

131 - the second current source;

14 - Reference maintenance unit;

15 - output unit;

2- switch tube;

3- control module;

4- clamp module;

R1 - the first resistance;

R2 - the second resistance;

Na - auxiliary winding;

Np-primary winding;

Ns - secondary winding;

D1 - output diode;

D2 - clamp diode;

C1- output capacitor;

C2-input capacitance;

C3 - energy storage capacitor;

S1-switch tube;

S2 - clamp switch tube;

PM1-the first P-channel MOS tube;

PM2- the second P-channel MOS tube;

PM3-the third P-channel MOS tube;

K1 - the first switch;

K2 - the second switch;

K3 - the third switch;

NM1 - the first N-channel MOS tube;

NM2 - the second N-channel MOS tube;

A1 - the first inverter;

A2 - the second inverter;

Q1 - the first transistor;

Q2 - the second triode.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The terms "first", "second", "third", "fourth", etc. (if present) in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to Describe a particular order or sequence. It is to be understood that the data so used may be interchanged under appropriate circumstances such that the embodiments of the invention described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having" and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those expressly listed Rather, those steps or units may include other steps or units not expressly listed or inherent to these processes, methods, products or devices.

The technical solutions of the present invention will be described in detail below with specific examples. The following specific embodiments may be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

Referring to FIGS. 1 to 3 , the power converter provided by the embodiment of the present invention includes: a switch tube 2 , a transformer, and a control module 3 for controlling the on and off of the switch tube, and the transformer includes an input The primary winding Np on the side, the secondary winding Ns on the output side, and the auxiliary winding Na on the output side, the switch tube 2 is connected in series with the primary winding Np and then connected between the input power supply and the ground.

The switch tube 2 may be a MOS tube or a BJT tube. In a specific example, the switch tube 2 may be, for example, an NMOS tube. If the switch 2 is an NMOS, the primary winding Np can be connected to the drain of the switch 2 , and the source of the switch 2 can be grounded through a resistor. A resistor or other device may also be provided between the switch tube 2 and the primary winding Np. The control terminal of the switch tube 2 is connected to the control circuit 1. If the switch tube 2 is an NMOS, the control terminal of the switch tube 2 may refer to its gate.

The number of secondary windings Ns involved above may be one or more, and no matter what form is adopted, it does not deviate from the scope of the embodiments of the present invention.

In the embodiment of the present invention, in order to detect the source-drain voltage of the switch tube 2, one side of the auxiliary winding is selected to detect, and further, the power converter further includes: a first resistor R1, a second resistor R2 and a current comparison feedback circuit 1.

The first end of the first resistor R1 is connected to the first end of the auxiliary winding Na, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second resistor R2 The second end of the auxiliary winding Na is connected to the second end of the auxiliary winding Na, and the second end of the auxiliary winding Na is grounded (that is, the second end of the second resistor R2 is also grounded); one end of the current comparison feedback circuit 1 is connected to The second end of the first resistor R1 and the other end of the current comparison feedback circuit 1 are connected to the control module 3 .

Please refer to FIG. 2 , FIG. 3 and FIG. 4 , the power converter may further include a clamping module 4 , and both ends of the second resistor R2 are connected in parallel with the clamping module 4 ;

The clamping module 4 is used to clamp the node voltage between the first resistor and the second resistor to a clamping voltage when the switch tube is turned on, and the clamping voltage is in phase with the 0V voltage. match. Furthermore, any device or a combination of devices that can realize this function can be applied to realize the clamping module 4 .

In an example, as shown in FIG. 3 and FIG. 4 , the clamping module 4 may include a clamping diode D2 connected in parallel with both ends of the second resistor R2 , and the anode of the clamping diode is grounded. In other examples, the clamping module 4 can also be implemented with triodes or other devices.

The following takes the clamping diode D2 as an example to illustrate the specific function of the clamping module 4:

The output of the auxiliary winding Na is connected to the first resistor R1 and the second resistor R2 to divide the voltage, and the clamping diode D2 is connected in parallel with the second resistor R2, so that when the switch tube 2 (ie the switch tube S1 shown in FIG. 4 ) is turned on, The voltage of the V_sense terminal (ie the detection node) is clamped to about 0V through the clamping diode D2, and then the current I1 flowing through the first resistor R1 is proportional to the source-drain voltage Vds voltage of the switch tube, which can be characterized as: I1 =(Vin-Vds)*(Na/Np)/R1;

in:

Vin is the primary input voltage;

In addition to identifying the auxiliary winding, Na can also represent the number of turns of the corresponding auxiliary winding in the formula;

In addition to identifying the primary winding, Np can also represent the number of turns of the corresponding primary winding in the formula;

In addition to identifying the first resistor, R1 can also represent the resistance value corresponding to the first resistor in the formula.

The above relationship can also be understood with reference to the waveforms shown in FIG. 5 .

In FIG. 5 , I_R1 is used to characterize the current of the first resistor R1 (ie I1 ) mentioned above, and V_sense is used to characterize the voltage of the detection node shown in FIGS. 2 to 4 . The waveform diagram of the control signal of the tube S1, and the waveform diagram of the control signal of the clamp switch S2.

When the switch S1 is fully turned on, Vds=0V, and the current of I1 is

I1_S1_ON=(Vin-0)*(Na/Np)/R1

When the switch S1 is completely disconnected, when the clamp switch S2 discharges the secondary, and the clamp switch S2 is also disconnected, its main inductor current discharges the capacitance of the switch, and Vds slowly changes from Vin+N* Vo drops to 0V.

I1_S1_OFF=(Vin-Vds)*(Na/Np)/R1

It can be known that when Vds=0, I1_S1_ON=I1_S1_OFF. Therefore, it can be detected that Vds drops to 0V.

From this, we can clearly learn the current of the first resistor R1, the voltage V_sense of the detection node, the relationship between the switch S1 and the clamping switch S2, wherein the clamping switch S2 is turned on after the switch S1 is turned off, and is The switch S1 is turned off before it is turned on. If the switch S1 and the clamping switch S2 change, the corresponding waveform diagram may also change adaptively. The relationship between the source-drain voltage Vds and the first resistor I_R1 can be understood with reference to the waveform shown in FIG. 5 .

In addition, please refer to FIG. 4 , the clamp switch S2 mentioned above can be connected in series with the input capacitor C2 and then connected in parallel to both ends of the primary winding Np, and the control end of the clamp switch S2 can be connected to the control module 3 to be controlled by it Further, the clamping switch S2 can be an NMOS. The first end of the secondary winding Ns can be connected to the positive electrode of the output diode D1, the second end of the secondary winding Ns can be connected to the negative electrode of the output capacitor C1, and the negative electrode of the output diode D1 can be connected to the positive electrode of the output capacitor C1.

Based on the above description, it can be known that the magnitude of the source-drain voltage Vds can be obtained by detecting the magnitude of the current of the first resistor R1 . The embodiments of the present invention provide a specific implementation manner for current detection, and the following will focus on the current comparison feedback module.

In the embodiment of the present invention, the current comparison feedback circuit 1 is used for:

forming and maintaining a reference current, where the reference current is determined according to the first current of the first resistor when the switch is in an on state;

When the switch tube is in an off state, the second current of the first resistor is collected, and a feedback signal is sent to the control module according to the comparison result between the reference current and the second current, so as to use the The feedback signal indicates whether the voltage across the switch tube (ie, the source-drain voltage Vds) enters the target interval, and the target interval matches the 0V voltage.

Among them, the maintenance of the reference current may refer to maintaining the reference current completely unchanged or floating within a small range, wherein the floating range may vary according to the precision of the means for achieving current maintenance, as long as the means are designed to make It remains unchanged (or does not change greatly) as much as possible, and the maintained current is determined according to the first current of the first resistor when the switch is turned on. No matter how the final accuracy is or how the floating range changes, it will not be affected. depart from the scope of the embodiments of the present invention.

The target interval can be understood as any interval used to determine whether the source-drain voltage Vds crosses zero, for example, it can refer to an interval less than or equal to 0V, and in this case, it can also refer to an interval less than or equal to a preset value. The value may be a preset value (eg, 10V) that is greater than 0V and close to 0V. It can also be an interval related to the Vin voltage, such as 10%*Vin, so that the on-voltage of the switch tube can be changed with Vin to achieve more functions. If it is powered by 220V, its voltage is

According to the diagram of FIG. 5 , when the switch S1 is turned off, the switch S1 can be controlled to be turned on when it is detected that the source-drain voltage Vds of the switch S1 drops to over 0V, because the source-drain voltage Vds and the current I_R1 of the first resistor The decrease is relatively synchronous, and further, the zero-crossing of the source-drain voltage Vds can correspond to the current I_R1 dropping to the current level when the switch S1 is turned on. When the current level is on, it can be understood that the zero-crossing of the source-drain voltage Vds is detected.

Corresponding to different implementations of the target interval, the above reference current may be the same as the first current, or may have a fixed difference from the first current, and the difference may correspond to the above-mentioned aggregate target interval preset in the interval. The gap between the value and 0V.

The above-mentioned first current and second current may be understood as the current of the same circuit under test at different times (eg, the current of the first resistor when the switch is on and the current of the first resistor when the switch is off).

In the above scheme, the correlation between the current of the first resistor connected in series with the auxiliary winding and the source-drain voltage of the switch tube is fully considered, and based on the maintained reference voltage, the voltage of the first resistor after the switch tube is turned off is accurately detected. Whether the second current drops and reaches the first current when the switch tube is not turned off, and further, the detection result can correspond to whether the source-drain voltage of the switch tube crosses zero. It can be seen that the present invention does not need to directly detect the switch tube, avoids the problem of large power loss in the detection part, and realizes detection with lower power loss.

At the same time, based on the reference voltage, the present invention creatively realizes that the current of the circuit to be tested in one period (for example, the first period, the period when the switch is in the on state) is different from the current of the circuit to be tested in another period (for example, the second period, when the switch is off). The comparison between the currents of the circuit under test under the period of the state).

In view of this, in the prior art, in order to compare currents in different time periods, it is necessary to detect the currents of a certain period of time, and then store them in the memory of the control module in digital form, and then detect the currents of another period of time. After retrieving the stored information, this method needs to occupy the memory and program resources of the control module, and also increases the processing burden and processing flow of the control module, which affects the processing efficiency. In contrast, in the present invention, the control module only needs to obtain the detection result, which effectively simplifies the processing burden and processing flow, saves memory and program resources, and also helps to improve processing efficiency.

Please refer to FIG. 6 , in one embodiment, the current comparison feedback circuit 1 in the power converter includes: a current copy unit 13 , a first mirror unit 11 , a second mirror unit 12 , a reference maintaining unit 14 and an output unit 15 .

The current replication unit 13 is connected to the second end of the first resistor R1 (ie, connected to the node between the first resistor R1 and the second resistor R2 ), the first mirror unit 11 and the second mirror unit 12 The current replication unit 13 is connected, the reference maintaining unit 14 is connected to the first mirroring unit 11, and the input side of the output unit 15 is connected to the feedback node between the reference maintaining unit and the second mirroring unit;

The current copying unit 13 is used to copy the first current and the second current; for example, when the switch is turned on, the copied first current can be obtained, and when the switch is turned off, the copied first current can be obtained. two current;

The first mirroring unit 11 is used to: when the switch tube 2 is in an on state, mirror the first current copied by the current copying unit, and form an intermediate current; the intermediate current is associated with the first current The first mirror current corresponding to the current; the intermediate current can be, for example, the same as the first mirror current, or it can have a fixed difference from the first mirror current, or, for example, the difference between the two does not exceed a preset difference range. .

The reference maintaining unit 14 is used to: form the reference current matching the intermediate current when the switch tube 2 is in an on state, and maintain the reference current when the switch tube is in an off state Reference current; the reference current may be the same as the intermediate current, and at the same time, it does not exclude the implementation of a fixed difference between the two, or the difference does not exceed a preset difference range.

The second mirroring unit 12 is configured to: when the switch tube 2 is in an off state, mirror the second current copied by the current copying unit, and form a second mirror current corresponding to the second current;

The output unit 15 is configured to: when the switch tube 2 is in an off state, obtain a comparison result between the second mirror current and the reference current, and obtain a comparison result between the second mirror current and the reference current according to the difference between the second mirror current and the reference current. The results of the comparison are compared, and the feedback signal is issued.

Further, the first mirror unit is connected to the control module (not shown in the figure);

The control module 3 is also used for:

When the switch tube 2 is in an off state, the first mirror unit 11 is controlled to be in an open state;

When the switch tube 2 is in the on state, the first mirror unit 11 is controlled to be in the on state, so that the first mirror unit in the on state can form the intermediate current, that is, only when the first mirror unit is in the on state. Only in this state can the first mirror unit 11 enable the reference maintaining unit to form a reference current in response to the intermediate current.

In order to realize the above functions, please refer to FIG. 7 , the first mirror unit 11 includes a first P-channel MOS transistor PM1 , a first N-channel MOS transistor NM1 , at least one switch and a first current source 111 ; the at least one The switches include a first switch K1 and/or a second switch K2; in a further optional solution, at least one switch may further include a third switch K3 shown in FIG. 9 in series with the first current source 111 .

The first P-channel MOS transistor PM1 can be, for example, the same size as the second P-channel MOS transistor PM2 in the second mirroring unit 12 and the third P-channel MOS transistor PM3 in the current copying unit 13, and further, it can be realized mirror image of the current.

The source and gate of the first P-channel MOS transistor PM1 are connected to the current copy unit 13 (for example, the source and the gate of the third P-channel MOS transistor PM3 can be connected in a matched manner). The drain of the channel MOS transistor PM1 is connected to the drain of the first N-channel MOS transistor NM1 directly or through the first switch K1, the source of the first N-channel MOS transistor NM1 is grounded, and the first N-channel MOS transistor NM1 is connected to the ground. The gate of the N-channel MOS transistor NM1 is connected to the reference maintaining unit 14 directly or through the second switch K2 (for example, the gate of the second N-channel MOS transistor NM2 can be connected to the first end of the energy storage capacitor C3) , the gate of the first N-channel MOS transistor NM1 is also connected to the drain of the first N-channel MOS transistor NM1; the drain of the first P-channel MOS transistor PM1 is also directly or indirectly connected to the The input side of the first current source 111 (for example, the input side of the first current source 111 can be connected directly or via the third switch K3), the output side of the first current source 111 is grounded; the at least one switch is connected to the control The module 3 , in turn, can be switched on and off under the control of the control module 3 .

When the control module 3 controls the first mirror unit 11 to be in an open state, it is specifically configured to: control the at least one switch to be disconnected;

When the control module 3 controls the first mirror unit 11 to be in an on state, it is specifically configured to: control the at least one switch to be turned on;

in:

When the switch tube 2 is in an on state and the at least one switch is turned on, the current of the first P-channel MOS transistor PM1 is the first mirror current corresponding to the first current;

The current of the first N-channel MOS transistor NM1 is the intermediate current when the switch transistor 2 is in an on state and the at least one switch is all on.

Please refer to FIG. 8 , the reference maintaining unit 4 includes an energy storage device (eg, a storage capacitor C3 ) and a second N-channel MOS transistor NM2 , and the first ends of the energy storage device (eg, the storage capacitor C3 ) are respectively connected to The first mirror unit 11 (eg, the gate of the first N-channel MOS transistor NM1) and the gate of the second N-channel MOS transistor NM2, and the source of the second N-channel MOS transistor NM2 Grounding, the drain of the second N-channel MOS transistor NM2 is connected to the second mirror unit (specifically, it can be connected to the second P-channel MOS transistor PM2 therein).

Wherein, the first N-channel MOS transistor NM1 and the second N-channel MOS transistor NM2 are of the same size, at this time, the first N-channel MOS transistor NM1 and the second N-channel MOS transistor NM1 Tube NM2 can form a mirrored current.

The energy storage device is used for:

When the first mirror unit forms the intermediate current, obtain a corresponding energy storage current, and store energy to form a maintenance voltage;

When the first mirror unit does not form the intermediate current, the gate of the second N-channel MOS transistor is powered by the sustain voltage.

The energy storage current may be, for example, the gate current of the first N-channel MOS transistor NM1. The above maintenance voltage can be, for example, the voltage between the gate of the first N-channel MOS transistor NM1 and the ground. The intermediate current may be, for example, the source-drain current of the first N-channel MOS transistor NM1.

Wherein, the current of the second N-channel MOS transistor NM2 is the reference current mentioned above; and then:

When the first mirror unit 11 forms the intermediate current, the reference current is a mirror current of the intermediate current;

When the first mirror unit 11 does not form the intermediate current, the reference current is formed by the power supply of the sustain voltage to the gate of the second N-channel MOS transistor NM2, because the sustain voltage of the energy storage device has With certain stability, the gate voltage of the second N-channel MOS transistor NM2 can be maintained, and correspondingly, the source-drain current of the second N-channel MOS transistor NM2 can be maintained at the reference current.

Please refer to FIG. 9 , the second mirror unit 12 includes a second P-channel MOS transistor PM2, and the source and gate of the second P-channel MOS transistor PM2 are connected to the current replication unit (for example, matched to connect the third The source and gate of the P-channel MOS transistor PM3), the drain of the second P-channel MOS transistor PM2 is connected to the reference maintaining unit (for example, the drain of the second N-channel MOS transistor NM2);

in:

When the switch tube 2 is in an on state, the current of the second P-channel MOS tube PM2 is the first mirror current corresponding to the first current;

When the switch transistor 2 is in an off state, the current of the second P-channel MOS transistor PM2 is a second mirror current corresponding to the second current.

In conjunction with the circuit structure of the above first mirror unit 11, the second mirror unit 12 and the reference maintaining unit 14, and the waveform diagram shown in Figure 5 and Figure 4, it can be seen that:

In the stage of t0-t1, the switch S1 is turned on, and the direction of the current flowing through the first resistor R1 is shown in Figure 4; After the current (or converted into a voltage) can be maintained, taking FIG. 7 and FIG. 9 as examples, the first switch K1, the second switch K2, and the third switch K3 are in the on state, and the first switch K1, the second switch K2, and the third switch K3 The current (ie, the first current) flows through the first P-channel MOS transistor PM1 by mirroring, and after subtracting a certain value Idc (Idc can represent a fixed voltage value Vbias=Idc*R1), it flows through the first N-channel MOS transistor NM1, where Idc may be the current provided by the first current source 111; the second N-channel MOS transistor NM2 and the first N-channel MOS transistor NM1 are also in a mirror relationship, and flow through the second N-channel MOS transistor NM2 The current is INM2=I1-Idc (this is the reference current). At time t1, the switch S1, the first switch K1, the second switch K2, and the third switch K3 are controlled to be disconnected, and INM2 passes through the energy storage capacitor C3. Keep.

During the period of t1-t2, the direction of the current flowing through R1 is opposite to that shown in Figure 4. The source-drain voltage Vds of the switch tube decreases to Vin at the time of t2, and the voltage V_sense of the corresponding detection node drops to zero. At the time of t2-t3, the switch tube The source-drain voltage Vds drops from Vin resonance. At this time, the current flowing through the first resistor R1 represents the resonance voltage, and the current flows through the second P-channel MOS transistor PM2 through another mirror source. At t3, when the current drops to INM2 (ie The maintained reference current), the output signal of the output module can be reversed, and the signal is given to drive the switch S1. Since the voltage represented by Idc is very low, such as 10V, the switch S1 achieves ZVS (ie zero-crossing) at this time. detection is turned on).

Any circuit structure in the art that can feed back the comparison result represented by the signal of the feedback node to the control module 3 can be used as an example of the output unit 15 .

In an example shown in FIG. 9 , the output unit 15 includes a first inverter A1 and a second inverter A2, the input end of the first inverter A1 is connected to the feedback node, the The output end of the first inverter A1 is connected to the input end of the second inverter A2 , and the output end of the second inverter A2 is connected to the control module 3 .

After two inversions, a relatively standard level signal that is convenient for the control module 3 to identify can be obtained.

Any circuit structure capable of replicating the first current and the second current in the art can be used as an example of the current replicating unit 13 .

In an example shown in FIG. 9 , the current replication unit 13 includes a second current source 131, a first transistor Q1, a second transistor Q2 and a third P-channel MOS transistor PM3; A transistor Q1 is an NPN transistor, and the second transistor is a PNP transistor.

The emitter of the first transistor Q1 is directly or indirectly connected to the second end of the first resistor R1, and the collector of the first transistor Q1 is connected to the drain of the third P-channel MOS transistor PM3 pole, the base of the first transistor Q1 is connected to the collector of the second transistor Q2, the emitter of the second transistor Q2 is grounded, and the base of the second transistor Q2 connected to the emitter, the source of the third P-channel MOS transistor PM3 is also connected to the input side of the second current source 131, and the output side of the second current source 131 is connected to the second triode Collector of Q2;

The source and gate of the third P-channel MOS transistor PM3 are connected to the first mirror unit 11 and the second mirror unit 12, so that: the first mirror unit 11 and the second mirror unit 12 can mirror the current of the third P-channel MOS transistor PM3 to obtain a corresponding mirror current.

The connection relationship between the third P-channel channel MOS transistor PM3 and the first mirror unit 11 and the second mirror unit 12 can be understood with reference to the foregoing description and the circuit shown in FIG. 9 .

The voltages of the first transistor Q1 and the second transistor Q2 are approximately equal. The voltage of the node VMS is clamped to 0V, so when the auxiliary winding is the negative voltage Vax, IR1=Vax/R1, and the current of the third P-channel MOS transistor PM3 is equal to the current of IR1. IR1 is the current of the first resistor R1.

In some examples, for the circuit shown in FIG. 9, the first current source 111 can also be removed, and the mirror ratio of the first N-channel MOS transistor NM1 and the second N-channel MOS transistor NM2 can be changed, for example, 10:9, then The reference current source current is 90% of the first current source, that is, when the switch S1 is turned off and Vds drops to 10%*Vin, it can be considered that Vds drops to 0.

In addition to the above description, please refer to FIG. 10 and FIG. 11 , a current comparison feedback circuit is provided, which can also be understood as: the application scenarios of the current comparison feedback circuit mentioned above are not limited to the solutions formed when the power converter is used. No matter what kind of scenario is applied, the comparison of currents in different time periods and the feedback of the comparison results can be realized, which can also be regarded as an implementation of the embodiments of the present invention.

Please refer to FIG. 10 and FIG. 11 , the current comparison feedback circuit 1 includes: a current copy unit 13 , a first mirror unit 11 , a second mirror unit 12 , a reference maintaining unit 14 and an output unit 15 ; the current copy unit 13 is connected to the under-test circuit, the first mirror unit 11 and the second mirror unit 12 are connected to the current copy unit 13, the reference maintaining unit 14 is connected to the first mirror unit 11, and the input side of the output unit 15 is connected to the the feedback node between the reference maintaining unit 14 and the second mirroring unit 12;

The current copying unit 13 is used for: collecting the first current of the circuit under test in the first period and the second current in the second period;

The first mirroring unit 11 is configured to: in the first period, mirror the first current copied by the current copying unit to form an intermediate current; the intermediate current is associated with the first current corresponding to the first current mirror current;

The reference maintaining unit 14 is configured to: form a reference current matching the intermediate current during the first period, and maintain the reference current unchanged during the second period;

The second mirror unit 12 is configured to: in the second period, mirror the second current copied by the current copy unit, and form a second mirror current corresponding to the second current;

The output unit 15 is configured to: in the second period of time, obtain a comparison result between the second mirror current and the reference current, and according to the comparison result between the second mirror current and the reference current, to control the The module sends out a feedback signal.

The circuit to be tested can be, for example, the circuit of the first resistor R1 mentioned above, the first period of time can be, for example, the period of time when the switch tube 2 is turned on, and the second period of time can be, for example, the period of time when the switch tube 2 is turned on. .

Any descriptions and examples of the current replication unit, the first mirror unit, the second mirror unit, the reference maintaining unit and the output unit can be understood with reference to the foregoing description, and only part of the description will be repeated below.

Optionally, the first mirroring unit 11 includes a first P-channel MOS transistor PM1, a first N-channel MOS transistor NM1, at least one switch and a first current source 111; the at least one switch includes a first switch K1 and/or the second switch K2;

The source and gate of the first P-channel MOS transistor PM1 are connected to the current copying unit 13, and the drain of the first P-channel MOS transistor PM1 is connected to the first P-channel MOS transistor directly or through the first switch K1. The drain of an N-channel MOS transistor NM1, the source of the first N-channel MOS transistor NM1 is grounded, and the gate of the first N-channel MOS transistor NM1 is connected directly or through the second switch K2. In the reference maintaining unit 14, the gate of the first N-channel MOS transistor NM1 is also connected to the drain of the first N-channel MOS transistor NM2; the drain of the first P-channel MOS transistor PM1 is also directly connected Or indirectly connected to the input side of the first current source 111, and the output side of the first current source 111 is grounded; the at least one switch is connected to the control module;

in:

In the first period and when the at least one switch is turned on, the current of the first P-channel MOS transistor is the first mirror current corresponding to the first current;

During the first period and when the at least one switch is turned on, the current of the first N-channel MOS transistor is the intermediate current.

Optionally, the reference maintaining unit includes an energy storage device (for example, an energy storage capacitor C3) and a second N-channel MOS transistor NM2, and the first end of the energy storage device is respectively connected to the first mirror unit 11 and the second N-channel MOS transistor. the gate of the second N-channel MOS transistor NM2, the source of the second N-channel MOS transistor is grounded, and the drain of the second N-channel MOS transistor NM2 is connected to the second mirror unit;

The energy storage device is used for:

When the first mirror unit forms the intermediate current, obtain the corresponding energy storage current, and store energy to form a maintenance voltage; when the first mirror unit does not form the intermediate current, use the maintenance voltage as the supplying power to the gate of the second N-channel MOS transistor;

Wherein, the current of the second N-channel MOS transistor NM2 is the reference current;

When the first mirror unit 11 forms the intermediate current, the reference current is a mirror current of the intermediate current;

When the first mirror unit 11 does not form the intermediate current, the reference current is formed by the power supply of the sustain voltage to the gate of the second N-channel MOS transistor.

Optionally, the second mirroring unit 12 includes a second P-channel MOS transistor PM2, the source and gate of the second P-channel MOS transistor PM2 are connected to the current copying unit 13, and the second P-channel MOS transistor PM2 is connected to the current copying unit 13. The drain of the channel MOS transistor PM2 is connected to the reference maintaining unit 14;

in:

The current of the second P-channel MOS transistor during the first period is the first mirror current corresponding to the first current;

During the second period, the current of the second P-channel MOS transistor is a second mirror current corresponding to the second current.

Optionally, the output unit 15 includes a first inverter A1 and a second inverter A2, an input end of the first inverter A1 is connected to the feedback node, and an input end of the first inverter A1 is connected to the feedback node. The output end is connected to the input end of the second inverter A2, and the output end of the second inverter A2 is connected to the control module.

Optionally, the current replication unit includes a second current source 131, a first transistor Q1, a second transistor Q2 and a third P-channel MOS transistor PM3; the first transistor Q1 is an NPN transistor , the second transistor Q2 is a PNP tube;

The emitter of the first transistor Q1 is directly or indirectly connected to the circuit to be tested, the collector of the first transistor Q1 is connected to the drain of the third P-channel MOS transistor, and the first transistor Q1 is connected to the drain of the third P-channel MOS transistor. The base of the transistor Q1 is connected to the collector of the second transistor Q2, the emitter of the second transistor Q2 is grounded, and the base and the emitter of the second transistor Q2 are connected to each other, The source of the third P-channel MOS transistor PM3 is also connected to the input side of the second current source 131, and the output side of the second current source 131 is connected to the collector of the second transistor Q2;

The source and gate of the third P-channel MOS transistor PM3 are connected to the first mirror unit 11 and the second mirror unit 12, so that: the first mirror unit 11 and the second mirror unit 12 can mirror the current of the third P-channel MOS transistor to obtain a corresponding mirror current.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions described in the foregoing embodiments can still be modified, or some or all of the technical features thereof can be equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present invention. Scope.

Claims (16)

1. A power converter, comprising: a switch tube, a transformer and a control module for controlling the on and off of the switch tube, the transformer includes a primary winding on an input side, a secondary winding on an output side, and an output side The auxiliary winding of the switch tube is connected in series with the primary winding and then connected between the input power supply and the ground. It is characterized in that it also includes: a first resistor, a second resistor and a current comparison feedback circuit;

   The first end of the first resistor is connected to the first end of the auxiliary winding, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected To the second end of the auxiliary winding, the second end of the auxiliary winding is grounded; one end of the current comparison feedback circuit is connected to the second end of the first resistor, and the other end of the current comparison feedback circuit is connected to the the control module, the control module is also connected to the control end of the switch tube;

   The current comparison feedback circuit is used to:

   forming and maintaining a reference current, where the reference current is determined according to the first current of the first resistor when the switch is in an on state;

   When the switch tube is in an off state, the second current of the first resistor is collected, and a feedback signal is sent to the control module according to the comparison result between the reference current and the second current, so as to use the The feedback signal indicates whether the voltage across the switch tube enters the target interval, and the target interval matches the 0V voltage.
2. The power converter according to claim 1, wherein the current comparison feedback circuit comprises: a current copy unit, a first mirror unit, a second mirror unit, a reference maintaining unit and an output unit; the current copy unit is connected to The second end of the first resistor, the first mirror unit and the second mirror unit are connected to the current copy unit, the reference maintaining unit is connected to the first mirror unit, the input side of the output unit connecting a feedback node between the reference maintaining unit and the second mirroring unit;

   The current copying unit is used for: copying the first current and the second current;

   The first mirroring unit is used for: mirroring the first current copied by the current copying unit when the switch tube is in an on state, and forming an intermediate current; the intermediate current is associated with the first current corresponding to the The first mirror current of ;

   The reference maintaining unit is configured to: form the reference current matching the intermediate current when the switch is in an on state, and maintain the reference current when the switch is in an off state ;

   The second mirroring unit is used for: mirroring the second current copied by the current copying unit when the switch tube is in an off state, and forming a second mirror current corresponding to the second current;

   The output unit is configured to: when the switch tube is in an off state, obtain a comparison result between the second mirror current and the reference current, and obtain a comparison result between the second mirror current and the reference current according to the comparison result of the second mirror current and the reference current , and send out the feedback signal.
3. The power converter according to claim 2, wherein the difference between the intermediate current and the first mirror current is a fixed value.
4. The power converter according to claim 3, wherein the first mirror unit is connected to the control module;

   The control module is also used for:

   When the switch tube is in an off state, controlling the first mirror unit to be in an open state;

   When the switch tube is in the on state, the first mirror unit is controlled to be in the on state, so that the first mirror unit in the on state can form the intermediate current.
5. The power converter according to claim 4, wherein the first mirror unit comprises a first P-channel MOS transistor, a first N-channel MOS transistor, at least one switch and a first current source; the at least one a switch includes a first switch and/or a second switch;

   The source and gate of the first P-channel MOS transistor are connected to the current replication unit, and the drain of the first P-channel MOS transistor is connected to the first N-channel directly or through the first switch The drain of the MOS transistor, the source of the first N-channel MOS transistor is grounded, the gate of the first N-channel MOS transistor is connected to the reference maintaining unit directly or through the second switch, and the first N-channel MOS transistor is connected to the reference maintaining unit. The gate of an N-channel MOS transistor is also connected to the drain of the first N-channel MOS transistor; the drain of the first P-channel MOS transistor is also directly or indirectly connected to the input side of the first current source , the output side of the first current source is grounded; the at least one switch is connected to the control module;

   When the control module controls the first mirror unit to be in an open state, it is specifically configured to: control the at least one switch to be disconnected;

   When the control module controls the first mirror unit to be in an on state, it is specifically configured to: control the at least one switch to be turned on;

   in:

   The current of the first P-channel MOS transistor is the first mirror current corresponding to the first current when the switch transistor is in an on state and the at least one switch is all on;

   The current of the first N-channel MOS transistor is the intermediate current when the switch transistor is in an on state and the at least one switch is all on.
6. The power converter according to claim 2, wherein the reference maintaining unit comprises an energy storage device and a second N-channel MOS transistor, and the first ends of the energy storage device are respectively connected to the first mirror unit with the gate of the second N-channel MOS transistor, the source of the second N-channel MOS transistor is grounded, and the drain of the second N-channel MOS transistor is connected to the second mirror unit;

   The energy storage device is used for:

   When the first mirror unit forms the intermediate current, obtain the corresponding energy storage current, and store the energy to form a maintenance voltage; when the first mirror unit does not form the intermediate current, use the maintenance voltage as the supplying power to the gate of the second N-channel MOS transistor;

   Wherein, the current of the second N-channel MOS transistor is the reference current;

   When the first mirror unit forms the intermediate current, the reference current is a mirror current of the intermediate current;

   When the first mirror unit does not form the intermediate current, the reference current is formed by supplying power to the gate of the second N-channel MOS transistor by the sustain voltage.
7. The power converter according to any one of claims 2 to 6, wherein the second mirror unit comprises a second P-channel MOS transistor, and the source and gate of the second P-channel MOS transistor connecting the current replication unit, and the drain of the second P-channel MOS transistor is connected to the reference maintaining unit;

   in:

   When the switch tube is in an on state, the current of the second P-channel MOS tube is a first mirror current corresponding to the first current;

   When the switch transistor is in an off state, the current of the second P-channel MOS transistor is a second mirror current corresponding to the second current.
8. The power converter according to any one of claims 2 to 6, wherein the output unit comprises a first inverter and a second inverter, and an input end of the first inverter is connected to the a feedback node, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter is connected to the control module.
9. The power converter according to any one of claims 2 to 6, wherein the current copy unit comprises a second current source, a first transistor, a second transistor and a third P-channel MOS transistor ; The first triode is an NPN tube, and the second triode is a PNP tube;

   The emitter of the first triode is directly or indirectly connected to the second end of the first resistor, the collector of the first triode is connected to the drain of the third P-channel MOS transistor, and the The base of the first triode is connected to the collector of the second triode, the emitter of the second triode is grounded, the base and the emitter of the second triode are connected to each other, the The source of the third P-channel MOS transistor is also connected to the input side of the second current source, and the output side of the second current source is connected to the collector of the second transistor;

   The source and gate of the third P-channel MOS transistor are connected to the first mirror unit and the second mirror unit, so that the first mirror unit and the second mirror unit can mirror the The current of the third P-channel MOS transistor obtains the corresponding mirror current.
10. The power converter according to any one of claims 1 to 6, further comprising a clamping module, and both ends of the second resistor are connected in parallel with the clamping module;

    The clamping module is used to clamp the node voltage between the first resistor and the second resistor to a clamping voltage when the switch tube is turned on, and the clamping voltage matches the 0V voltage .
11. A current comparison feedback circuit, characterized in that it includes: a current copying unit, a first mirroring unit, a second mirroring unit, a reference maintaining unit and an output unit; the current copying unit is connected to a circuit to be tested, and the first mirroring unit The current replication unit is connected to the second mirror unit, the reference sustain unit is connected to the first mirror unit, and the input side of the output unit is connected to the reference sustain unit and the second mirror unit. feedback node;

    The current copying unit is used for: collecting the first current of the circuit under test in the first period and the second current in the second period;

    The first mirror unit is configured to: in the first period, mirror the first current copied by the current copy unit to form an intermediate current; the intermediate current is associated with a first mirror corresponding to the first current current;

    The reference maintaining unit is used for: forming a reference current matching the intermediate current in the first period, and maintaining the reference current unchanged in the second period;

    The second mirroring unit is configured to: in the second period, mirror the second current copied by the current copying unit, and form a second mirror current corresponding to the second current;

    The output unit is configured to: in the second period, obtain a comparison result between the second mirror current and the reference current, and report to the control module according to the comparison result between the second mirror current and the reference current Send a feedback signal.
12. The current comparison feedback circuit according to claim 11, wherein the first mirror unit comprises a first P-channel MOS transistor, a first N-channel MOS transistor, at least one switch and a first current source; the at least one switch includes a first switch and/or a second switch;

    The source and gate of the first P-channel MOS transistor are connected to the current replication unit, and the drain of the first P-channel MOS transistor is connected to the first N-channel directly or through the first switch The drain of the MOS transistor, the source of the first N-channel MOS transistor is grounded, the gate of the first N-channel MOS transistor is connected to the reference maintaining unit directly or through the second switch, and the first N-channel MOS transistor is connected to the reference maintaining unit. The gate of an N-channel MOS transistor is also connected to the drain of the first N-channel MOS transistor; the drain of the first P-channel MOS transistor is also directly or indirectly connected to the input side of the first current source , the output side of the first current source is grounded; the at least one switch is connected to the control module;

    in:

    In the first period and when the at least one switch is turned on, the current of the first P-channel MOS transistor is the first mirror current corresponding to the first current;

    During the first period and when the at least one switch is turned on, the current of the first N-channel MOS transistor is the intermediate current.
13. The current comparison feedback circuit according to claim 12, wherein the reference maintaining unit comprises an energy storage device and a second N-channel MOS transistor, and the first ends of the energy storage device are respectively connected to the first mirror image the gate of the unit and the second N-channel MOS transistor, the source of the second N-channel MOS transistor is grounded, and the drain of the second N-channel MOS transistor is connected to the second mirror unit;

    The energy storage device is used for:

    When the first mirror unit forms the intermediate current, obtain the corresponding energy storage current, and store the energy to form a maintenance voltage; when the first mirror unit does not form the intermediate current, use the maintenance voltage as the supplying power to the gate of the second N-channel MOS transistor;

    Wherein, the current of the second N-channel MOS transistor is the reference current;

    When the first mirror unit forms the intermediate current, the reference current is a mirror current of the intermediate current;

    When the first mirror unit does not form the intermediate current, the reference current is formed by supplying power to the gate of the second N-channel MOS transistor by the sustain voltage.
14. The current comparison feedback circuit according to any one of claims 11 to 13, wherein the second mirror unit comprises a second P-channel MOS transistor, and the source and gate of the second P-channel MOS transistor the electrode is connected to the current replication unit, and the drain of the second P-channel MOS transistor is connected to the reference maintaining unit;

    in:

    The current of the second P-channel MOS transistor during the first period is the first mirror current corresponding to the first current;

    During the second period, the current of the second P-channel MOS transistor is a second mirror current corresponding to the second current.
15. The current comparison feedback circuit according to any one of claims 11 to 13, wherein the output unit comprises a first inverter and a second inverter, and an input end of the first inverter is connected to the the feedback node, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter is connected to the control module.
16. The current comparison feedback circuit according to any one of claims 11 to 13, wherein the current replication unit comprises a second current source, a first transistor, a second transistor and a third P-channel MOS tube; the first triode is an NPN tube, and the second triode is a PNP tube;

    The emitter of the first triode is connected to the circuit to be tested, the collector of the first triode is connected to the drain of the third P-channel MOS transistor, and the base of the first triode is connected to the drain of the third P-channel MOS transistor. The collector of the second transistor is connected to the collector, the emitter of the first transistor is grounded, and the source of the third P-channel MOS transistor is also connected to the input side of the second current source, so the output side of the second current source is connected to the collector of the second triode;

    The source and gate of the third P-channel MOS transistor are connected to the first mirror unit and the second mirror unit, so that the first mirror unit and the second mirror unit can mirror the The current of the third P-channel MOS transistor obtains the corresponding mirror current.

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