CN104576809A - 905nm硅雪崩光电二极管及其制作方法 - Google Patents
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Abstract
本发明公开了一种905nm硅雪崩光电二极管，包括P+衬底层、π型层、P型雪崩区、N+光敏区、N+保护环和P+截止环，其创新在于：在所述N+保护环的外周和所述P+截止环的内周之间设置有第二N+保护环。本发明还公开了前述905nm硅雪崩光电二极管的制作方法。本发明的有益技术效果是：能大幅提高905nm硅雪崩光电二极管的工作温度上限。
Description
技术领域
本发明涉及一种硅雪崩光电二极管制作技术，尤其涉及一种905nm硅雪崩光电二极管及其制作方法。
背景技术
硅雪崩光电二极管是一种具有内部增益的光电探测器，由于其具备倍增功能，因此光电转换灵敏度比一般的PN结光敏二极管要高很多，在光敏器件中具有重要的地位。
基于常规思路，现有硅雪崩光电二极管上只设置了一个保护环，存在的问题是：硅雪崩光电二极管在高温下（大于85℃），工作电压会变高，极易发生边缘击穿问题。
发明内容
针对背景技术中的问题，本发明提出了一种905nm硅雪崩光电二极管，包括P+衬底层、π型层、P型雪崩区、N+光敏区、N+保护环和P+截止环，其创新在于：在所述N+保护环的外周和所述P+截止环的内周之间设置有第二N+保护环。
本发明的原理是：本发明通过在N+保护环的外周和P+截止环的内周之间设置第二N+保护环来形成双保护环结构，双保护环结构可以使器件的工作温度达到125℃时也不会发生边缘击穿，从而大幅提高905nm硅雪崩光电二极管的工作温度上限。
优选地，所述π型层、P型雪崩区、N+光敏区、N+保护环和P+截止环形成于电阻率大于或等于3000Ω·cm的P型高阻硅上，所述P+衬底层的电阻率为0.001~0.002Ω·cm。采用高电阻率的P型高阻硅来加工硅雪崩光电二极管，可以有效增加器件的光吸收率，使器件获得更高的光响应度。
为了便于本领域技术人员实施，本发明还提出了一种905nm硅雪崩光电二极管制作方法，其创新在于：按如下步骤制作905nm硅雪崩光电二极管：1）提供P+衬底层和外延层；所述外延层为P型高阻硅；
2）采用磷离子注入工艺，在外延层上形成N+保护环；N+保护环结深为7～8μm，磷离子注入浓度为1020/cm3量级；
3）采用磷离子注入工艺，在外延层上N+保护环的外周形成第二N+保护环；第二N+保护环结深为1～2μm，磷离子注入浓度为1016/cm3量级；
4）采用硼离子注入工艺，在第二N+保护环的外周形成P+截止环，P+截止环结深为2～3μm，硼离子注入浓度为1018/cm3量级；
5）在外延层表面淀积一定厚度的SiO2层，然后在氮气氛围、1300℃～1500℃条件下高温推结4小时；高温推结操作结束后，去掉SiO2层；
6）采用高能离子注入工艺，在外延层上形成P型雪崩区，P型雪崩区位于N+保护环内，P型雪崩区结深为5～6mm，高能离子注入浓度为1017/cm3；
7）采用砷离子注入工艺，在外延层上形成N+光敏区，N+光敏区位于N+保护环内，N+光敏区为0.1~0.5μm，砷离子注入浓度为1020/cm3量级；
8）在外延层表面淀积SiO2层，在SiO2层表面淀积Si3N4增透膜；
9）制作金属电极；
10）进行背面减薄处理。
优选地，所述P型高阻硅的电阻率大于或等于3000Ω·cm，所述P+衬底层的电阻率为0.001~0.002Ω·cm。
本发明的有益技术效果是：能大幅提高905nm硅雪崩光电二极管的工作温度上限。
附图说明
图1、本发明的结构示意图；
图中各个标记所对应的名称分别为：P+衬底层1、π型层2、P型雪崩区3、N+光敏区4、N+保护环5、P+截止环6、第二N+保护环7、电极8、Si3N4增透膜9。
具体实施方式
一种905nm硅雪崩光电二极管，包括P+衬底层1、π型层2、P型雪崩区3、N+光敏区4、N+保护环5和P+截止环6，其创新在于：在所述N+保护环5的外周和所述P+截止环6的内周之间设置有第二N+保护环7。
进一步地，所述π型层2、P型雪崩区3、N+光敏区4、N+保护环5、P+截止环6、第二N+保护环7形成于电阻率大于或等于3000Ω·cm的P型高阻硅上，所述P+衬底层1的电阻率为0.001~0.002Ω·cm。
一种905nm硅雪崩光电二极管制作方法，其创新在于：按如下步骤制作905nm硅雪崩光电二极管：1）提供P+衬底层1和外延层；所述外延层为P型高阻硅；
2）采用磷离子注入工艺，在外延层上形成N+保护环5；N+保护环5结深为7～8μm，磷离子注入浓度为1020/cm3量级；
3）采用磷离子注入工艺，在外延层上N+保护环5的外周形成第二N+保护环7；第二N+保护环7结深为1～2μm，磷离子注入浓度为1016/cm3量级；
4）采用硼离子注入工艺，在第二N+保护环7的外周形成P+截止环6，P+截止环6结深为2～3μm，硼离子注入浓度为1018/cm3量级；
5）在外延层表面淀积一定厚度的SiO2层，然后在氮气氛围、1300℃～1500℃条件下高温推结4小时；高温推结操作结束后，去掉SiO2层；
6）采用高能离子注入工艺，在外延层上形成P型雪崩区3，P型雪崩区3位于N+保护环5内，P型雪崩区3结深为5～6mm，高能离子注入浓度为1017/cm3；
7）采用砷离子注入工艺，在外延层上形成N+光敏区4，N+光敏区4位于N+保护环5内，N+光敏区4为0.1~0.5μm，砷离子注入浓度为1020/cm3量级；
8）在外延层表面淀积SiO2层，在SiO2层表面淀积Si3N4增透膜；
9）制作金属电极；
10）进行背面减薄处理。
进一步地，所述P型高阻硅的电阻率大于或等于3000Ω·cm，所述P+衬底层1的电阻率为0.001~0.002Ω·cm。
Claims (4)
1.一种905nm硅雪崩光电二极管，包括P+衬底层（1）、π型层（2）、P型雪崩区（3）、N+光敏区（4）、N+保护环（5）和P+截止环（6），其特征在于：在所述N+保护环（5）的外周和所述P+截止环（6）的内周之间设置有第二N+保护环（7）。
2.根据权利要求1所述的905nm硅雪崩光电二极管，其特征在于：所述π型层（2）、P型雪崩区（3）、N+光敏区（4）、N+保护环（5）、P+截止环（6）、第二N+保护环（7）形成于电阻率大于或等于3000Ω·cm的P型高阻硅上，所述P+衬底层（1）的电阻率为0.001~0.002Ω·cm。
3.一种905nm硅雪崩光电二极管制作方法，其特征在于：按如下步骤制作905nm硅雪崩光电二极管：1）提供P+衬底层（1）和外延层；所述外延层为P型高阻硅；
2）采用磷离子注入工艺，在外延层上形成N+保护环（5）；N+保护环（5）结深为7～8μm，磷离子注入浓度为1020/cm3量级；
3）采用磷离子注入工艺，在外延层上N+保护环（5）的外周形成第二N+保护环（7）；第二N+保护环（7）结深为1～2μm，磷离子注入浓度为1016/cm3量级；
4）采用硼离子注入工艺，在第二N+保护环（7）的外周形成P+截止环（6），P+截止环（6）结深为2～3μm，硼离子注入浓度为1018/cm3量级；
5）在外延层表面淀积一定厚度的SiO2层，然后在氮气氛围、1300℃～1500℃条件下高温推结4小时；高温推结操作结束后，去掉SiO2层；
6）采用高能离子注入工艺，在外延层上形成P型雪崩区（3），P型雪崩区（3）位于N+保护环（5）内，P型雪崩区（3）结深为5～6mm，高能离子注入浓度为1017/cm3；
7）采用砷离子注入工艺，在外延层上形成N+光敏区（4），N+光敏区（4）位于N+保护环（5）内，N+光敏区（4）为0.1~0.5μm，砷离子注入浓度为1020/cm3量级；
8）在外延层表面淀积SiO2层，在SiO2层表面淀积Si3N4增透膜；
9）制作金属电极；
10）进行背面减薄处理。
4.根据权利要求3所述的905nm硅雪崩光电二极管制作方法，其特征在于：所述P型高阻硅的电阻率大于或等于3000Ω·cm，所述P+衬底层（1）的电阻率为0.001~0.002Ω·cm。
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| CN106356290A (zh) * | 2016-10-28 | 2017-01-25 | 中国电子科技集团公司第四十四研究所 | 1064nm硅基雪崩探测器及其制作方法 |
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| US20100271108A1 (en) * | 2009-04-23 | 2010-10-28 | Stmicroelectronics S.R.L. | Geiger-mode photodiode with integrated and jfet-effect-adjustable quenching resistor, photodiode array, and corresponding manufacturing method |
| CN203950825U (zh) * | 2014-07-17 | 2014-11-19 | 温岭资发半导体有限公司 | 雪崩光电二极管 |
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| US20100271108A1 (en) * | 2009-04-23 | 2010-10-28 | Stmicroelectronics S.R.L. | Geiger-mode photodiode with integrated and jfet-effect-adjustable quenching resistor, photodiode array, and corresponding manufacturing method |
| CN203950825U (zh) * | 2014-07-17 | 2014-11-19 | 温岭资发半导体有限公司 | 雪崩光电二极管 |
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