CN104519659A - Circuit board and method for forming through layer blind holes of same - Google Patents
Circuit board and method for forming through layer blind holes of same Download PDFInfo
- Publication number
- CN104519659A CN104519659A CN201310461629.1A CN201310461629A CN104519659A CN 104519659 A CN104519659 A CN 104519659A CN 201310461629 A CN201310461629 A CN 201310461629A CN 104519659 A CN104519659 A CN 104519659A
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- Prior art keywords
- layer
- conductive pattern
- window
- blind hole
- pattern layer
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
- H05K2201/09518—Deep blind vias, i.e. blind vias connecting the surface circuit to circuit layers deeper than the first buried circuit layer
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention relates to the technical field of printed circuit boards and discloses a circuit board and a method for forming through layer blind holes of the same. The method includes for multiple electroconductive graph layers needing breakover, in the process of forming each electroconductive graph layer, forming windows at positions corresponding to the through layer blind holes needing to be formed, and arranging the windows of the electroconductive graph layers close to a core board layer in an area where the windows of the electroconductive graph layers away from the core board layer are positioned. Consequently, to-be-connected portions in the electroconductive graph layers needing breakover can be exposed to form the through layer blind holes which are needed by only performing laser punching on the windows of the outermost electroconductive graph layers, so that number of laser punching in the process of forming the through layer blind holes is reduced greatly. In addition, breakover of the electroconductive graph layers can be realized by only electroplating the formed through layer blind holes for one time, so that product producing process is shortened, and product cost and product quality risk are lowered.
Description
Technical field
The present invention relates to printed circuit board technology field, particularly relate to manufacture method and circuit board that a kind of circuit board leads to layer blind hole.
Background technology
Along with the development of electronic communication, electronic product is towards multi-functional, highly dense future development; Wiring board as electronic devices and components carrier is transformed to high density interconnect (HighDensity Interconnect is called for short " HDI ") from traditional PCB.In order to reduce board area, promoting closeness, often needing the mutual conduction realizing adjacent multiple conductive pattern layer.
Circuit board generally comprises a core layer and pressing is formed in the multiple conductive pattern layer of core layer simultaneously or on two opposite faces.Wherein, conductive pattern layer comprises and is pressed together on insulating barrier in core layer and conductive layer pattern successively, and core layer is the special conductive pattern layer a kind of two opposite faces on a plate body being all formed with conductive layer pattern.
In prior art, circuit board is inner adopts logical layer blind hole to realize the mutual conduction of adjacent multiple conductive pattern layer usually.For the manufacture craft of logical layer blind hole, traditional manufacture method first does a laser drilling in core layer to form the first blind hole, and carry out plating to the first blind hole and fill out copper; Increase after layer through pressing, position same on circuit board again after pressing is done a laser drilling and is formed the second blind hole, then plating is carried out to the second blind hole and fill out copper, thus the logical layer blind hole mutual conduction that adjacent two conductive pattern layer consist of the first blind hole and the second blind hole; Repeat pressing and increase layer, the making of the 3rd blind hole is carried out in position same on circuit board again after pressing, then plating is carried out to the 3rd blind hole and fill out copper, thus adjacent three conductive pattern layer are by the logical layer blind hole mutual conduction of the first blind hole, the second blind hole and the 3rd blind hole composition.
As can be seen from above-mentioned technique, when making the logical layer blind hole of adjacent three conductive pattern layer of conducting, except the blind hole making of core layer, need twice laser drilling and twice plating to fill out process for copper and form logical layer blind hole, production procedure is long, and production cost is high, it is long to produce the delivery time, and the bad risk of quality is high.
Summary of the invention
The invention provides manufacture method and circuit board that a kind of circuit board leads to layer blind hole, lead in order to solve available circuit plate in the manufacture craft of layer blind hole, the above-mentioned technical problem of existence.
For solving the problems of the technologies described above, the invention provides the manufacture method that a kind of circuit board leads to layer blind hole, comprising:
Multiple the first conductive pattern layer needing conducting is formed successively in the one side of core layer, wherein, formed in the process of each first conductive pattern layer, form a first window in the position corresponding to the logical layer blind hole needing formation, and the first window of the first conductive pattern layer of close described core layer is positioned at the region at the first window place of the first conductive pattern layer away from described core layer;
In the first window of outermost first conductive pattern layer, carry out laser drilling operation, form logical layer blind hole, expose and need the in the first conductive pattern layer of conducting first part to be connected;
Described logical layer blind hole is electroplated, forms the electrodeposited coating connecting described first part to be connected.
Above-mentioned manufacture method, wherein, is formed with at least one second conductive pattern layer not needing conducting between at least two described first conductive pattern layer;
Formed in the process of each second conductive pattern layer, corresponding to the position formation Second Window needing the logical layer blind hole formed, and the first window of outermost first conductive pattern layer is in the region at described Second Window place, and do not have overlapping between the outline line of the first window of outermost first conductive pattern layer and the outline line of Second Window.
Above-mentioned manufacture method, wherein, described second conductive pattern layer comprises the second conductive layer of the second insulating barrier and patterning; Described second insulating barrier is arranged near described core layer, forms the step of described Second Window, is specially:
Carry out graphically, forming described Second Window to described second conductive layer.
Above-mentioned manufacture method, wherein, described first conductive pattern layer comprises the first conductive layer of the first insulating barrier and patterning, and described first insulating barrier is arranged near described core layer;
Form the step of described first window, be specially:
Carry out graphically, forming described first window to described first conductive layer.
Above-mentioned manufacture method, wherein, described logical layer blind hole is the little shoulder hole in a large the inner, outer end;
The ladder of described shoulder hole is formed by the first conductive layer of the first conductive pattern layer needing conducting.
Above-mentioned manufacture method, wherein, described logical layer blind hole is a cylindrical hole.
Above-mentioned manufacture method, wherein, electroplates described logical layer blind hole, after forming the step of the electrodeposited coating connecting described part to be connected, also comprises:
In described logical layer blind hole, form packed layer, fill and lead up described logical layer blind hole.
For solving the problems of the technologies described above, the circuit board that the present invention also provides a kind of manufacture method utilizing foregoing circuit plate to lead to layer blind hole to make.
The beneficial effect of technique scheme of the present invention is as follows:
In technique scheme, for the multiple conductive pattern layer needing conducting, in the process forming each conductive pattern layer, by corresponding to the position formation window needing the logical layer blind hole formed, and the window arranging the conductive pattern layer of close core layer is positioned at the region at the window place of the conductive pattern layer away from core layer, thus only need carry out laser drilling in the window of outermost layer conductive pattern layer, the part to be connected needed in the conductive pattern layer of conducting can be exposed, logical layer blind hole needed for formation, greatly reduce the number of times forming laser drilling in logical layer blind hole process.And, only need the logical layer blind hole formed once be electroplated, just can realize the conducting of multiple conductive pattern layer, shorten production flow process, reduce the quality risk of production cost and product.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1-Fig. 5 represents that in the embodiment of the present invention one, circuit board leads to the manufacturing process schematic diagram of layer blind hole;
Fig. 6-Fig. 9 represents the process schematic forming logical layer blind hole in the embodiment of the present invention two in core layer;
Figure 10 represents that in the embodiment of the present invention two, circuit board leads to the structural representation one of layer blind hole;
Figure 11 represents that in the embodiment of the present invention two, circuit board leads to the structural representation two of layer blind hole.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
Embodiment one
A kind of circuit board is provided to lead to the manufacture method of layer blind hole in the embodiment of the present invention, multiple conductive pattern layer on turning circuit plate, especially on turning circuit plate, be formed in multiple conductive pattern layer that core layer one side is upper and adjacent, and reduce to form the laser drilling number of times in logical layer blind hole process and plating number of times, to shorten the production procedure of product, reduce the production cost of product.
In the embodiment of the present invention, circuit board leads to the manufacture method of layer blind hole, specifically comprises the following steps:
The first conductive pattern layer needing conducting is formed successively in the one side of core layer, wherein, formed in the process of each first conductive pattern layer, form a first window in the position corresponding to the logical layer blind hole needing formation, and the first window of the first conductive pattern layer of close described core layer is positioned at the region at the first window place of the first conductive pattern layer away from described core layer;
In the first window of outermost first conductive pattern layer, carry out laser drilling operation, form logical layer blind hole, expose the part to be connected needed in the first conductive pattern layer of conducting;
Described logical layer blind hole is electroplated, forms the electrodeposited coating connecting described part to be connected.
Wherein, the part to be connected of the first conductive pattern layer is its conductive structure, thus multiple first conductive pattern layer can realize conducting by the connection of electrodeposited coating and part to be connected.
In technical scheme of the present invention, for the multiple conductive pattern layer needing conducting, in the process forming each conductive pattern layer, corresponding to the position formation window needing the logical layer blind hole formed, and the window arranging the conductive pattern layer of close core layer is positioned at the region at the window place of the conductive pattern layer away from core layer, thus only need carry out laser drilling in the window of outermost layer conductive pattern layer, can guarantee to expose the part to be connected needed in the conductive pattern layer of conducting, logical layer blind hole needed for formation, greatly reduce the number of times forming laser drilling in logical layer blind hole process.And only need once electroplate formation electrodeposited coating to the logical layer blind hole formed, the connection of electrodeposited coating and part to be connected just can realize the conducting of multiple conductive pattern layer, substantially reduces production flow process, reduces production cost.Meanwhile, the minimizing of technique number of times also reduces the quality risk of product.
At this, it should be noted that to be formed successively needs " successively " in the first conductive pattern layer of conducting only for the first conductive pattern layer, does not represent the graph layer not having other between these first conductive pattern layer, this will be described hereinafter, and no further details to be given herein.
Meanwhile, in a particular embodiment of the present invention, the region that a window is positioned at another window place comprises two kinds of implications:
1, the outline line of two windows is completely overlapping in vertical direction; And
2, a window is covered completely by another window, not having overlapping (situation as shown in Figure 5) between the outline line of capped window and the outline line of another window.
Below by need multiple first conductive pattern layer of conducting to be two adjacent the first conductive pattern layer, illustrate the manufacturing process that circuit board in the embodiment of the present invention leads to layer blind hole:
Step one, as shown in Figure 1, forms in the one side of core layer 1 first the first conductive pattern layer needing conducting.This first conductive pattern layer specifically comprises the first conductive layer 10 of the first insulating barrier 11 and patterning, and wherein, the first insulating barrier 11 is arranged near core layer 1, and is pressed together in core layer 1 by copper coin.First conductive layer 10 is generally the Copper Foil be formed in by chemical-copper-plating process on the first insulating barrier 11.
Step 2, as shown in Figure 2, in first the first conductive pattern layer, corresponds to and needs the position of the logical layer blind hole formed to form first window 101.Be specially, carry out graphically to the first conductive layer 10, form first window 101.As an execution mode, mechanical punching operation can be carried out to the first conductive layer 10, form first window 101.
Step 3, shown in composition graphs 3 and Fig. 4, first the first conductive pattern layer forms second the first conductive pattern layer needing conducting.Corresponding to the position formation first window 101 needing the logical layer blind hole formed equally, detailed process is identical with the process forming first window in first the first conductive pattern layer, does not repeat them here.Wherein, the first window 101 of second the first conductive pattern layer is positioned at the region at the first window (not shown) place of first the first conductive pattern layer.
Step 4, as shown in Figure 5, carries out laser drilling operation in the first window 101 of second the first conductive pattern layer, forms logical layer blind hole 100.First window 101 due to second the first conductive pattern layer is positioned at the region at the first window place of first the first conductive pattern layer, thus can ensure that the part to be connected in two the first conductive pattern layer is all exposed.Wherein, the part to be connected of the first conductive pattern layer is the first conductive layer 10.
Step 5, shown in composition graphs 5, carries out electroplating copper to logical layer blind hole 100, forms the electrodeposited coating (not shown) connecting described part to be connected, then two the first conductive pattern layer are by electrodeposited coating conducting.
Step 6, forms packed layer in logical layer blind hole, as epoxy resin, for filling and leading up described logical layer blind hole, to make the surfacing of circuit board.
When being first conductive pattern layer of adjacent more than three or three when needing multiple first conductive pattern layer of conducting, the process forming corresponding logical layer blind hole is same as described above, the repetition just in step.Certainly also need to ensure that the first window near the first conductive pattern layer of core layer is positioned at the region at the first window place of the first conductive pattern layer away from core layer.
The logical layer blind hole 100 formed by manufacture method in the present embodiment can be the little shoulder hole in a large the inner, outer end, and the ladder of logical layer blind hole 100 is formed by needing the first conductive layer 10 of the first conductive pattern layer of conducting, as shown in Figure 5.
Certainly, the logical layer blind hole 100 formed by the manufacture method in the present embodiment also can be a cylindrical hole or reverse taper hole (bellmouth that namely large the inner, outer end is little).
Embodiment two
In the application process of reality, need multiple first conductive pattern layer of conducting also for not exclusively adjacent multiple first conductive pattern layer, namely can be formed with at least one second conductive pattern layer not needing conducting between at least two the first conductive pattern layer.
Concrete, shown in Figure 10 and Figure 11, the second conductive pattern layer comprises the second conductive layer 20 of the second insulating barrier 21 and patterning.Wherein, the second insulating barrier 21 is arranged near core layer 1, and is pressed together in core layer 1 by copper coin.Second conductive layer 20 is generally the Copper Foil be formed in by chemical-copper-plating process on the second insulating barrier 21.
While realizing multiple first conductive pattern layer of conducting, not with the second conductive pattern layer conducting, in the present embodiment in the process of formation second conductive pattern layer, corresponding to the position formation Second Window 102 needing the logical layer blind hole formed, and the first window of outermost first conductive pattern layer is in the region at Second Window 102 place, and do not have overlapping between the outline line of the first window of outermost first conductive pattern layer and the outline line of Second Window 102.
Shown in Figure 10 and Figure 11.Then be formed in electrodeposited coating in logical layer blind hole 100 and the second conductive layer 20 is disconnected by the insulating barrier in Second Window 102, insulation.
A when special, when needing multiple first conductive pattern layer of conducting to be positioned at the both sides of core layer 1, in order to realize the conducting of the first conductive pattern interlayer, the position formation transition connection portion corresponding to the logical layer blind hole that needs are formed in core layer 1 is needed to divide.Because core layer 1 is a kind of special conductive pattern layer being all formed with the 3rd conductive layer pattern 30 on two opposite faces of a plate body 31, therefore, the concrete manufacturing process that the transition connection portion in core layer 1 is divided is:
Step one, as shown in Figure 6, carries out patterning processes to one of them the 3rd conductive layer 30 of core layer 1, forms the pattern 32 that transition connection portion is divided.Wherein, transition connection portion divides 32 to be specially the 3rd conductive layer 30, and corresponding with needing the position of the logical layer blind hole formed.
Step 2, as shown in Figure 7, corresponds to the position needing the logical layer blind hole formed, divides 32 to carry out mechanical punching to transition connection portion, form the 3rd window 103.
Step 3, as shown in Figure 8, carries out laser drilling operation in the 3rd window 103, forms transition blind hole 200.
Step 3, as shown in Figure 9, carries out plating to described transition blind hole and fills out copper, fill and lead up described transition blind hole.
By technique scheme, the first conductive pattern layer of core layer both sides is divided by the transition connection portion in core layer and is realized conducting.
Embodiment three
A kind of circuit board made according to above-mentioned manufacture method is additionally provided in the embodiment of the present invention, lead to the laser drilling number of times in layer blind hole manufacturing process owing to decreasing circuit board and electroplate number of times, thus shorten the production procedure of circuit board, reduce production cost and the quality risk of circuit board.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the technology of the present invention principle; can also make some improvement and replacement, these improve and replace and also should be considered as protection scope of the present invention.
Claims (8)
1. circuit board leads to a manufacture method for layer blind hole, comprising:
Multiple the first conductive pattern layer needing conducting is formed successively in the one side of core layer, wherein, formed in the process of each first conductive pattern layer, form a first window in the position corresponding to the logical layer blind hole needing formation, and the first window of the first conductive pattern layer of close described core layer is positioned at the region at the first window place of the first conductive pattern layer away from described core layer;
In the first window of outermost first conductive pattern layer, carry out laser drilling operation, form logical layer blind hole, expose the part to be connected needed in the first conductive pattern layer of conducting;
Described logical layer blind hole is electroplated, forms the electrodeposited coating connecting described part to be connected.
2. manufacture method according to claim 1, is characterized in that, is formed with at least one second conductive pattern layer not needing conducting between at least two described first conductive pattern layer;
Formed in the process of each second conductive pattern layer, corresponding to the position formation Second Window needing the logical layer blind hole formed, and the first window of outermost first conductive pattern layer is in the region at described Second Window place, and do not have overlapping between the outline line of the first window of outermost first conductive pattern layer and the outline line of Second Window.
3. manufacture method according to claim 2, is characterized in that, described second conductive pattern layer comprises the second conductive layer of the second insulating barrier and patterning; Described second insulating barrier is arranged near described core layer, forms the step of described Second Window, is specially:
Carry out graphically, forming described Second Window to described second conductive layer.
4. manufacture method according to claim 1, is characterized in that, described first conductive pattern layer comprises the first conductive layer of the first insulating barrier and patterning, and described first insulating barrier is arranged near described core layer;
Form the step of described first window, be specially:
Carry out graphically, forming described first window to described first conductive layer.
5. manufacture method according to claim 4, is characterized in that, described logical layer blind hole is the little shoulder hole in a large the inner, outer end;
The ladder of described shoulder hole is formed by the first conductive layer of the first conductive pattern layer needing conducting.
6. manufacture method according to claim 1, is characterized in that, described logical layer blind hole is a cylindrical hole.
7. the manufacture method according to any one of claim 1-6, is characterized in that, electroplates described logical layer blind hole, after forming the step of the electrodeposited coating connecting described part to be connected, also comprises:
In described logical layer blind hole, form packed layer, fill and lead up described logical layer blind hole.
8. the circuit board of the manufacture method making according to any one of claim 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310461629.1A CN104519659B (en) | 2013-09-30 | 2013-09-30 | A kind of circuit board leads to the production method and circuit board of layer blind hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310461629.1A CN104519659B (en) | 2013-09-30 | 2013-09-30 | A kind of circuit board leads to the production method and circuit board of layer blind hole |
Publications (2)
| Publication Number | Publication Date |
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| CN104519659A true CN104519659A (en) | 2015-04-15 |
| CN104519659B CN104519659B (en) | 2018-04-13 |
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| CN201310461629.1A Active CN104519659B (en) | 2013-09-30 | 2013-09-30 | A kind of circuit board leads to the production method and circuit board of layer blind hole |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2021016961A1 (en) * | 2019-07-31 | 2021-02-04 | 深南电路股份有限公司 | Circuit board and manufacturing method therefor |
| CN113556886A (en) * | 2020-04-23 | 2021-10-26 | 深南电路股份有限公司 | Manufacturing method of multi-order blind hole circuit board and multi-order blind hole circuit board |
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| US20070266559A1 (en) * | 2006-05-19 | 2007-11-22 | Foxconn Advanced Technology Inc. | Method for forming stacked via-holes in a multilayer printed circuit board |
| CN101133478A (en) * | 2005-03-04 | 2008-02-27 | 三米拉-惜爱公司 | Simultaneous and selective partitioning of via structures using plating resist |
| CN102686017A (en) * | 2011-03-15 | 2012-09-19 | 富士通株式会社 | Printed wiring board, printed circuit board unit, electronic apparatus and method for manufacturing printed wiring board |
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| CN101133478A (en) * | 2005-03-04 | 2008-02-27 | 三米拉-惜爱公司 | Simultaneous and selective partitioning of via structures using plating resist |
| CN101009972A (en) * | 2006-01-26 | 2007-08-01 | 株式会社日立制作所 | Circuit board provided and transmission device with the same mounted |
| US20070266559A1 (en) * | 2006-05-19 | 2007-11-22 | Foxconn Advanced Technology Inc. | Method for forming stacked via-holes in a multilayer printed circuit board |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2021016961A1 (en) * | 2019-07-31 | 2021-02-04 | 深南电路股份有限公司 | Circuit board and manufacturing method therefor |
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| CN113556886A (en) * | 2020-04-23 | 2021-10-26 | 深南电路股份有限公司 | Manufacturing method of multi-order blind hole circuit board and multi-order blind hole circuit board |
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| Publication number | Publication date |
|---|---|
| CN104519659B (en) | 2018-04-13 |
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Effective date of registration: 20220615 Address after: 3007, Hengqin international financial center building, No. 58, Huajin street, Hengqin new area, Zhuhai, Guangdong 519031 Patentee after: New founder holdings development Co.,Ltd. Patentee after: ZHUHAI FOUNDER TECH. HI-DENSITY ELECTRONIC Co.,Ltd. Address before: 100871 room 808, founder building, Zhongguancun, 298 Chengfu Road, Haidian District, Beijing Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: ZHUHAI FOUNDER TECH. HI-DENSITY ELECTRONIC Co.,Ltd. |
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