CN104483580B - A kind of DC DC transducers zero load detection means based on PFM step-by-step countings - Google Patents
A kind of DC DC transducers zero load detection means based on PFM step-by-step countings Download PDFInfo
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- CN104483580B CN104483580B CN201410828835.6A CN201410828835A CN104483580B CN 104483580 B CN104483580 B CN 104483580B CN 201410828835 A CN201410828835 A CN 201410828835A CN 104483580 B CN104483580 B CN 104483580B
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Abstract
The invention discloses a kind of DC DC transducers zero load detection means based on PFM step-by-step countings，Including PFM control modules、The PFM control modules rear end connects two power tubes，Pulse counter module、Clock source module、Timing module and detection process module，PFM control modules are used to arrange PFM mode of operations，Control described two power tubes to turn in turn，The definite value quantity of electric charge is injected to outfan when the power tube is turned on，Pulse counter module is for counting to the pulse that PFM control modules are exported，When umber of pulse reaches setting number，Pulse counter module exports the first high level signal，Low level signal is exported otherwise，Clock source module is used to produce clock signal，Timing module is used to carry out timing according to the clock signal of clock source module，The second high level signal is exported when timing time reaches setting time，Detection process module for when the second high level signal is received according to the corresponding zero load indication signal of pulse counter module output signal output.
Description
Technical field
The present invention relates to electrical signal detection technical field, and in particular to a kind of dc-dc based on PFM step-by-step countings
Unloaded detection means.
Background technology
In the last few years, the portable type electronic product with mobile phone, flat board and MP3 as representative had obtained extensive popularization.It is portable
Formula electronic product generally adopts lithium battery power supply, more intrepid performance, more intelligent experience to increased the consumption of electricity, then wants
Seek more jumbo battery to maintain the cruising time of product.But, the development of lithium battery technology is slower, it is impossible to meet just
Take the requirement of formula electronic product high speed development.In order to alleviate this contradiction, portable power source arises at the historic moment.
Portable power source is typically made up of the lithium battery and its control management circuit of certain capacity.Its basic function is to rise
Pressure, charging and electricity show.Boosting exports 5V for charging to portable type electronic product typically by dc-dc realization.
Charge function is to give portable power source itself lithium cell charging with external power source.Electricity is shown for indicating portable power source dump energy
Information.
In order to improve managing electric quantity efficiency, reduce the energy loss of portable power source itself, outside manufacture charge terminate or
When person disconnects, dc-dc should be automatically switched off, and make portable power source enter park mode, and this requires to turn DC-DC
The Light Condition of parallel operation is detected.Common unloaded detection method is concatenated on the output path of dc-dc
Whether one high-precision inspection leakage resistance, judge unloaded generation by the pressure reduction at detection inspection leakage resistance two ends.In view of work(
The energy loss of rate path, the resistance for examining leakage resistance can not be too big, typically the scope of 10m Ω to 100m Ω, this detection side
The accuracy of detection of method is at a fairly low, and, typically in more than 30mA, having for unloaded thresholding
Load current be considered as zero load less than 100mA, therefore cannot charge to the less portable type electronic product of some charging currents,
Such as intelligent watch etc..Additionally, there is still some disadvantages remaining, such as BOM costs increase, PCB trace is difficult, circuit design difficulty
Increase etc..
The content of the invention
The technical problem to be solved in the present invention is, for the deficiencies in the prior art, there is provided a kind of to be based on PFM step-by-step countings
Dc-dc zero load detection means, overcome the dc-dc zero load detection method accuracy of detection of prior art low, empty
Carry the high defect of thresholding.
The present invention for the technical scheme that adopts of solution above-mentioned technical problem for：
A kind of dc-dc zero load detection means based on PFM step-by-step countings, including PFM control modules, the PFM
Control module rear end connects two power tubes, pulse counter module, clock source module, timing module and detection process module, institute
State PFM control modules, the pulse counter module and the detection process module to be sequentially connected, it is the clock source module, described
Timing module and the detection process module are sequentially connected, and the PFM control modules are used to arrange PFM mode of operations, control institute
State two power tubes to turn in turn, when the power tube is turned on, the definite value quantity of electric charge, the pulse counter module are injected to outfan
For counting to the pulse that the PFM control modules are exported, when umber of pulse reaches setting number, the pulsimeter digital-to-analogue
Block exports the first high level signal, otherwise exports low level signal, and the clock source module is used to produce clock signal, the meter
When module for carrying out timing according to the clock signal of the clock source module, it is defeated when timing time reaches setting time
Go out the second high level signal, the detection process module for when the second high level signal is received according to the pulsimeter digital-to-analogue
The corresponding zero load indication signal of block output signal output.
Embodiments in accordance with the present invention, output voltage and input of the clock signal period with the dc-dc
The difference of voltage is inversely proportional to.
Embodiments in accordance with the present invention, the detection process module include filter unit, and the filter unit is for institute
State unloaded indication signal and be filtered process.
Embodiments in accordance with the present invention, the pulse counter module are set to the enumerator of d type flip flop composition.
Embodiments in accordance with the present invention, the timing module are set to the enumerator of d type flip flop composition.
A kind of dc-dc zero load detection means based on PFM step-by-step countings, including PFM control modules, the PFM
Control module rear end connects two power tubes, pulse counter module, clock source module, timing module and detection process module, institute
State PFM control modules, the pulse counter module and the detection process module to be sequentially connected, it is the clock source module, described
Timing module and the detection process module are sequentially connected, and the PFM control modules are used to arrange PFM mode of operations, control institute
State two power tubes to turn in turn, when the power tube is turned on, the definite value quantity of electric charge, the pulse counter module are injected to outfan
For counting to the pulse that the PFM control modules are exported, when umber of pulse reaches setting number, the pulsimeter digital-to-analogue
Block exports the first low level signal, otherwise exports high level signal, and the clock source module is used to produce clock signal, the meter
When module for carrying out timing according to the clock signal of the clock source module, it is defeated when timing time reaches setting time
Go out the second low level signal, the detection process module for when the second low level signal is received according to the pulsimeter digital-to-analogue
The corresponding zero load indication signal of block output signal output.
Embodiments in accordance with the present invention, output voltage and input of the clock signal period with the dc-dc
The difference of voltage is inversely proportional to.
Embodiments in accordance with the present invention, the detection process module include filter unit, and the filter unit is for institute
State unloaded indication signal and be filtered process.
Embodiments in accordance with the present invention, the pulse counter module are set to the enumerator of d type flip flop composition.
Embodiments in accordance with the present invention, the timing module are set to the enumerator of d type flip flop composition.
Implement technical scheme, have the advantages that：The present invention provides a kind of simple for portable power source
And effective dc-dc zero load detection means, accuracy of detection and energy efficiency are improve, present invention can also apply to relate to
And the other field of dc-dc underloading detection.
Description of the drawings
The present invention is specifically described below with reference to accompanying drawing and with reference to example, advantages of the present invention and implementation will
Become apparent from, wherein shown in accompanying drawing, content is only used for explanation of the present invention, and does not constitute to the present invention in all senses
On restriction, in the accompanying drawings：
Fig. 1 is current sensing means module map of the present invention；
Fig. 2 is PFM control modules preferred embodiment circuit diagram of the present invention；
Fig. 3 is PFM control modules signal waveforms of the present invention；
Fig. 4 is clock source module preferred embodiment circuit diagram of the present invention；
Fig. 5 is pulse counter module of the present invention, timing module and detection process module preferred embodiment circuit diagram.
Specific embodiment
As shown in Figures 2 and 3, theoretical foundation of the invention is two work(after dc-dc enters PFM mode of operations
Rate pipe can be turned in turn, and it is a definite value that power tube is turned on each time in turn to the quantity of electric charge of outfan injection, and the definite value is with outer
Put inductance inductance value, export related to input voltage difference, and it is unrelated with the size of load current.Therefore, it is interior in a period of time, work(
The number of times of rate pipe conducting is directly directly proportional with the size of load current.Load is bigger, and the number of times of conducting is then more；Conversely, conducting
Number of times it is then fewer.Then, by the number of PFM pulses in statistics a period of time, then for output and input voltage difference
Change is modified, and can obtain the information of dc-dc load.
As shown in figure 1, the present invention includes PFM control modules, pulse counter module, clock source module, timing module and inspection
Survey processing module.PFM control modules control dc-dc enters PFM mode of operations, to improve dc-dc underloading work
The energy conversion efficiency of work.This module in the control circuit of most dc-dcs already equipped with, it is not necessary to because of zero load
Detect and additionally add.Pulse counter module is used for the number for counting the pulse signal pulse that PFM control modules are sent out, and reaches
Count_out export after number as 1 to being set.Clock source module, produces clock signal clock, and its cycle is with exporting and being input into
The difference of voltage is inversely proportional to, for correcting aforementioned quantity of electric charge definite value with output and the negative correlation of input voltage difference.Timing mould
Block carries out timing by reference clock of clock, and it is 1 that time_out is exported after reaching setting time section.It is known that the time period
Length can be inversely proportional to output and the difference of input voltage.Detection process module, understands in time_out when 0 is changed into 1,
Whether detection count_out is 0, then after being filtered to testing result and waiting and process, judges that the load of dc-dc is electric
Whether stream is less than certain thresholding.
As shown in Figures 2 and 3, PFM control modules include hysteresis comparator, pulse period control circuit and peak value current limliting control
Circuit processed.Wherein, hysteresis comparator is compared output voltage vout and reference voltage vref, so as to determine when open and
PFM pulse trains are closed, the amount of hysteresis △ V of comparator determines the ripple of output voltage under PFM patterns.Pulse period control circuit
For setting time interval T between the pulse of each two PFM.Peak value current-limiting control circuit, sets inductance electricity in each PFM pulse
The upper limit of stream is Ilimit, once inductive current reaches the upper limit, then close N power tubes, open P power tubes.When P power tubes are turned on
Between in △ t, inductive current is from Ilimit0 is dropped to, the average current in the time is Ilimit/2.Then, according to formulaCan obtainMeanwhile, can derive that each PFM pulse is injected to outfan
The quantity of electric charge beUnder PFM mode of operations, for a certain load current I0, it is N number of
The corresponding time span of PFM pulses is t0, then have Δ QN=I0t0.According to derivation above, can obtain,Wherein, current limit by inductance value IlimitHave determined that in circuit design with inductance value L.For setting
Fixed I0And N, corresponding t0It is inversely proportional to output and input voltage difference vout-vin.
During unloaded detection, a time period t being inversely proportional to output and input voltage difference vout-vin can be set0,
Then whether N is less than according to the number of PFM pulses in the time period, whether judges the unloaded generation of dc-dc.Therefore,
Need to design the clock signal that a cycle is inversely proportional to output and input voltage difference.
As shown in figure 4, clock source module of the present invention realizes vibration, charging current I by electric capacity C discharge and recharges1And
The size of electric capacity C determines the cycle T of clock signal clock0.Obviously, the expression in cycle can be obtained through simple derivation
Formula isIn embodiment, due to the clamper of amplifier AMP so that the voltage of A points is equal to vin.Thus it is possible to
ArriveAndThe clock cycle is inversely proportional to output and input voltage difference.
The clock number for making timing module statistics is Nt, then t0=NtT0.In conjunction with the formula of above-mentioned derivationCan obtainTherefore, as long as in unloaded inspection
In the design process of examining system, the parameter index of each module meets equationPFM pulses can be caused
Number N corresponds exactly to load current I0, and it is unrelated with output and input voltage difference.
As shown in figure 5, pulse counter module and timing module can be realized with the enumerator that d type flip flop is constituted, count value
Difference N and Nt.In detection process module, with output signal time_out of timing module to control clock, captured with d type flip flop
Output signal count_out of pulse counter module, obtains preliminary result result signal, then carries out at digital filtering
Reason, obtains final testing result no load signals.
Essence and spirit of the those skilled in the art without departing from the present invention, can have various deformation scheme to realize the present invention,
Preferably feasible embodiment of the invention is the foregoing is only, not thereby limits to the interest field of the present invention, it is all with this
The equivalent structure change made by description of the invention and accompanying drawing content, is both contained within the interest field of the present invention.
Claims (10)
1. a kind of dc-dc zero load detection means based on PFM step-by-step countings, it is characterised in that：Mould is controlled including PFM
Block, the PFM control modules rear end connect two power tubes, at pulse counter module, clock source module, timing module and detection
Reason module, the PFM control modules, the pulse counter module and the detection process module are sequentially connected, the clock source
Module, the timing module and the detection process module are sequentially connected, and the PFM control modules are used to arrange PFM Working moulds
Formula, controls described two power tubes and turns in turn, inject the definite value quantity of electric charge, the pulse to outfan when the power tube is turned on
Counting module for counting to the pulse that the PFM control modules are exported, when umber of pulse reach setting number when, the arteries and veins
Rush counting module and export the first high level signal, otherwise export low level signal, the clock source module is used to produce clock letter
Number, the timing module is set when timing time reaches for carrying out timing according to the clock signal of the clock source module
Export the second high level signal when fixing time, the detection process module for when the second high level signal is received according to described
The corresponding zero load indication signal of pulse counter module output signal output.
2. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 1, it is characterised in that：
The clock signal period is inversely proportional to the difference of the output voltage and input voltage of the dc-dc.
3. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 1, it is characterised in that：
The detection process module includes filter unit, and the filter unit is for being filtered process to the unloaded indication signal.
4. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 1, it is characterised in that：
The pulse counter module is set to the enumerator of d type flip flop composition.
5. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 1, it is characterised in that：
The timing module is set to the enumerator of d type flip flop composition.
6. a kind of dc-dc zero load detection means based on PFM step-by-step countings, it is characterised in that：Mould is controlled including PFM
Block, the PFM control modules rear end connect two power tubes, at pulse counter module, clock source module, timing module and detection
Reason module, the PFM control modules, the pulse counter module and the detection process module are sequentially connected, the clock source
Module, the timing module and the detection process module are sequentially connected, and the PFM control modules are used to arrange PFM Working moulds
Formula, controls described two power tubes and turns in turn, inject the definite value quantity of electric charge, the pulse to outfan when the power tube is turned on
Counting module for counting to the pulse that the PFM control modules are exported, when umber of pulse reach setting number when, the arteries and veins
Rush counting module and export the first low level signal, otherwise export high level signal, the clock source module is used to produce clock letter
Number, the timing module is set when timing time reaches for carrying out timing according to the clock signal of the clock source module
Export the second low level signal when fixing time, the detection process module for when the second low level signal is received according to described
The corresponding zero load indication signal of pulse counter module output signal output.
7. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 6, it is characterised in that：
The clock signal period is inversely proportional to the difference of the output voltage and input voltage of the dc-dc.
8. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 6, it is characterised in that：
The detection process module includes filter unit, and the filter unit is for being filtered process to the unloaded indication signal.
9. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 6, it is characterised in that：
The pulse counter module is set to the enumerator of d type flip flop composition.
10. the dc-dc zero load detection means based on PFM step-by-step countings according to claim 6, its feature exist
In：The timing module is set to the enumerator of d type flip flop composition.
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| CN201410828835.6A CN104483580B (en) | 2014-12-25 | 2014-12-25 | A kind of DC DC transducers zero load detection means based on PFM step-by-step countings |
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| CN105467333B (en) * | 2015-12-30 | 2019-05-10 | 上海裕芯电子科技有限公司 | A kind of switch power supply no-load detection circuit and detection method |
| CN112290612B (en) * | 2020-09-18 | 2022-08-23 | 上海芯导电子科技股份有限公司 | Light-load detection circuit |
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