CN112290612B - Light-load detection circuit - Google Patents
Light-load detection circuit Download PDFInfo
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- CN112290612B CN112290612B CN202010988605.1A CN202010988605A CN112290612B CN 112290612 B CN112290612 B CN 112290612B CN 202010988605 A CN202010988605 A CN 202010988605A CN 112290612 B CN112290612 B CN 112290612B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
- Circuit Arrangement For Electric Light Sources In General (AREA)
Abstract
The invention relates to the technical field of circuits, in particular to a light-load detection circuit, which comprises: a power supply voltage terminal; the input end of the delay charging module is connected with the power supply voltage end, and a charging current is formed after a preset first delay time; the input end of the counting reset module is connected with the output end of the delay charging module and used for calculating the pulse number corresponding to the pulse signal after generating the pulse signal according to the charging current; when the number of pulses is small, the counting reset module resets at the input end of the delay charging module so as to enter a low-speed pulse die mode; and the input end of the delay module is connected with the output end of the counting reset module and continues for a preset second delay time according to the low-speed pulse die type to output a light-load exit signal. Has the advantages that: the light-load exit signal can be detected without adding an external device and an additional chip pin, and the method is simple and reliable.
Description
Technical Field
The invention relates to the technical field of circuits, in particular to a light-load detection circuit.
Background
At present, more and more electronic devices are available in the market, which need to be charged by a lithium battery charging bin. In order to improve the use efficiency of the battery compartment after charging the electronic equipment each time, the function of detecting the change of the load current of the boost direct current output end and quitting the charging when the load is light is very practical and necessary.
In the prior art, a differential operational amplifier is usually used to detect a voltage difference of an inductive resistor to detect a load current, so that an accurate external inductive resistor and a pin are required to be used, which may further increase the complexity and cost of a detection circuit. Therefore, the above problems are difficult problems to be solved by those skilled in the art.
Disclosure of Invention
In view of the above problems in the prior art, a light load detection circuit is provided.
The specific technical scheme is as follows:
the invention provides a light load detection circuit, which comprises:
a power supply voltage terminal;
the input end of the delay charging module is connected with the power supply voltage end, and a charging current is formed after a preset first delay time;
the input end of the counting reset module is connected with the output end of the delay charging module and used for calculating the pulse quantity corresponding to a pulse signal after the pulse signal is generated according to the charging current;
when the pulse number is smaller, the counting reset module resets at the input end of the delay charging module so as to enter a low-speed pulse die mode;
and the input end of the delay module is connected with the output end of the counting reset module, and outputs a light-load exit signal according to the low-speed pulse die type lasting for a preset second delay time.
Preferably, the delay charging module includes:
a first current source, one end of the first current source being connected to the supply voltage terminal;
one end of the first switch is connected to the other end of the first current source, which is back to the power supply voltage end;
and the anode of the capacitor is connected to the other end of the first switch, which is far away from the first current source, and the cathode of the capacitor is grounded.
Preferably, the count reset module is an asynchronous counter.
Preferably, the delay module is an asynchronous counter.
Preferably, the power supply further comprises a discharging branch, and the discharging branch is connected in series between the first switch and the ground.
Preferably, the discharge branch comprises:
one end of the second switch is connected to the anode of the capacitor;
and the second current source is connected between the other end of the second switch, which is back to the anode of the capacitor, and the ground in series.
Preferably, when the first switch is closed, the second switch is opened, and the capacitor is in a charging state;
when the first switch is opened, the second switch is closed, and the capacitor is in a discharging state.
Preferably, the switch further comprises a linkage branch, wherein the linkage branch is connected between the first switch and the second switch and used for protecting the first switch and the second switch.
Preferably, the pulse signal is a pulse frequency signal.
The technical scheme has the following advantages or beneficial effects: the counting reset module is used for calculating the pulse number corresponding to the pulse signal according to the pulse signal generated by the charging current, and when the pulse number is small, the counting reset module resets to enter a low-speed pulse die mode and detect a light-load exit signal according to the continuous second delay time of the low-speed pulse die mode, so that an external device and an additional chip pin are not required to be added, and the counting reset module is simple and reliable.
Drawings
Embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings. The drawings are, however, to be regarded as illustrative and explanatory only and are not restrictive of the scope of the invention.
FIG. 1 is a schematic circuit diagram according to an embodiment of the present invention;
FIG. 2 is a waveform diagram of a pulse signal simulation according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
The present invention provides a light load detection circuit, as shown in fig. 1, wherein the light load detection circuit comprises:
a power supply voltage terminal VDD;
the input end of the delay charging module 1 is connected with a power supply voltage end VDD, and a charging current is formed after a preset first delay time;
the input end of the counting reset module 2 is connected with the output end of the delay charging module 1 and is used for calculating the pulse number corresponding to the pulse signal after generating the pulse signal according to the charging current;
when the pulse number is small, the counting reset module 2 resets at the input end of the delay charging module 1 so as to enter a low-speed pulse die mode;
and the input end of the delay module 3 is connected with the output end of the counting reset module 2, and outputs a light-load exit signal according to the low-speed pulse die type continuous second preset delay time.
In this embodiment, the delay charging module 1 charges the counting reset module 2 by a first preset time, when the charging current formed by the delay charging module 1 is large, the correspondingly generated pulse signal is strong, the pulse interval time is short, at this time, the counting reset module 2 is only used for calculating the pulse number corresponding to the pulse signal, and when the calculated pulse number reaches a certain number within a certain time, the detection circuit of the present invention enters a normal load connection mode, as shown in fig. 2, the abscissa is time T (unit: second \ S), and the ordinate is voltage U (unit: volt \ V). In this embodiment, when the number of pulses counted in a certain time reaches 3, the detection circuit is considered to enter the normal load mode.
Further, the delay block 3 does not operate, i.e. does not generate a light exit signal.
When the charging current formed by the delay charging module 1 is small, the correspondingly generated pulse signal is weak, the pulse interval time is long, the counting reset module 2 is reset through the delay charging module 1 at this time, and the number of pulses calculated by the counting reset module 2 is small, the detection circuit of the present invention enters a low-speed pulse die mode, and further, after the low-speed pulse die mode lasts for a certain second delay time, the delay module 3 correspondingly generates a light-load exit signal, that is, no pulse appears at this time, thereby achieving the purpose of detecting light-load exit, as shown in fig. 2.
In this embodiment, the pulse number corresponding to the pulse signal is calculated by the counting reset module 2 according to the pulse signal generated by the charging current, and when the pulse number is small, the counting reset module 2 resets to enter the low-speed pulse die mode, and further outputs the light-load exit signal according to the second delay time of the low-speed pulse die mode, without adding an external device or an additional chip pin, and is simple and reliable.
In a preferred embodiment, as shown in fig. 1, the delay charging module 1 comprises:
a first current source I1, one terminal of the first current source I1 is connected to the power voltage terminal VDD;
a first switch S1, wherein one end of the first switch S1 is connected to the other end of the first current source I1 facing away from the power voltage terminal VDD;
and the anode of the capacitor C is connected to the other end of the first switch S1 away from the first current source I1, and the cathode of the capacitor C is grounded GND.
Specifically, in this embodiment, the first switch S1 is closed, so that the first current source I1 charges the capacitor C, and further inputs a charging current to the count reset module 2 in the above technical solution, thereby generating a pulse signal.
In a preferred embodiment, the count reset module is an asynchronous counter.
Specifically, the asynchronous counter is an asynchronous counter formed by the D-type trigger set. It should be noted that the asynchronous counter in this embodiment is only used to illustrate the feasibility, and the protection scope of this application should not be limited thereby.
In a preferred embodiment, the delay module is an asynchronous counter.
Specifically, the asynchronous counter is an asynchronous counter that takes a reference clock as an input and takes a class D flip-flop as an element. Similarly, it should be noted that the asynchronous counter in the present embodiment is only used to illustrate the feasibility, and the protection scope of the present application should not be limited thereby.
In a preferred embodiment, the circuit further includes a discharging branch 4, and the discharging branch 4 is connected in series between the first switch S1 and the ground GND.
Specifically, when the detection circuit of the present invention enters the low-speed pulse mode, the delay module 3 of the above-mentioned technical solution outputs a light-load exit signal, and the discharge branch 4 starts to operate to discharge.
In a preferred embodiment, the discharge branch 4 comprises:
a second switch S2, wherein one end of the second switch S2 is connected to the positive pole of the capacitor C;
a second current source I2, connected in series between the other end of the second switch S2 opposite to the anode of the capacitor C and ground GND.
In a preferred embodiment, when the first switch S1 is closed, the second switch S2 is open and the capacitor C is in a charged state;
when the first switch S1 is open, the second switch S2 is closed and the capacitor C is in a discharged state.
Specifically, in the present embodiment, the first switch S1 and the second switch S2 cannot be closed simultaneously, i.e., when the first switch S1 is closed, the second switch S2 is open, and the capacitor C is in a charging state, and when the first switch S1 is open, the second switch S2 is closed, and the capacitor C is in a discharging state.
In a preferred embodiment, the switch further comprises a linkage branch 5, and the linkage branch 5 is connected between the first switch S1 and the second switch S2 and is used for protecting the first switch S1 and the second switch S2.
In this embodiment, a single wire is connected between the first switch S1 and the second switch S2 to form the linked branch 5, thereby protecting the first switch S1 and the second switch S2.
In a preferred embodiment, the pulse signal is a pulse frequency signal PFM.
The technical scheme has the following advantages or beneficial effects: the counting reset module is used for calculating the pulse number corresponding to the pulse signal according to the pulse signal generated by the charging current, and when the pulse number is small, the counting reset module resets to enter a low-speed pulse die mode and detect a light-load exit signal according to the continuous second delay time of the low-speed pulse die mode, so that an external device and an additional chip pin are not required to be added, and the counting reset module is simple and reliable.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (5)
1. A light load detection circuit, comprising:
a power supply voltage terminal;
the input end of the delay charging module is connected with the power supply voltage end, and a charging current is formed after a preset first delay time;
the input end of the counting reset module is connected with the output end of the delay charging module and used for calculating the pulse quantity corresponding to a pulse signal after the pulse signal is generated according to the charging current;
when the pulse number is smaller than a certain threshold value, the counting reset module resets at the input end of the delay charging module so as to enter a low-speed pulse die mode;
the input end of the delay module is connected with the output end of the counting reset module, and a light-load exit signal is output according to the low-speed pulse die type lasting for a preset second delay time;
the delay charging module includes:
a first current source, one end of the first current source is connected to the power voltage end;
one end of the first switch is connected to the other end of the first current source, which is back to the power supply voltage end;
the anode of the capacitor is connected to the other end of the first switch, which is far away from the first current source, and the cathode of the capacitor is grounded;
the discharging branch circuit is connected between the first switch and the ground in series;
the discharge branch includes:
one end of the second switch is connected to the anode of the capacitor;
the second current source is connected between the other end of the second switch, which is back to the anode of the capacitor, and the ground in series;
when the first switch is closed, the second switch is opened, and the capacitor is in a charging state;
when the first switch is opened, the second switch is closed, and the capacitor is in a discharging state.
2. The detection circuit of claim 1, wherein the count reset module is an asynchronous counter.
3. The detection circuit of claim 1, wherein the delay module is an asynchronous counter.
4. The detection circuit of claim 1, further comprising a linkage branch connected between the first switch and the second switch for protecting the first switch and the second switch.
5. The detection circuit of claim 1, wherein the pulse signal is a pulse frequency signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010988605.1A CN112290612B (en) | 2020-09-18 | 2020-09-18 | Light-load detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010988605.1A CN112290612B (en) | 2020-09-18 | 2020-09-18 | Light-load detection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN112290612A CN112290612A (en) | 2021-01-29 |
| CN112290612B true CN112290612B (en) | 2022-08-23 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010988605.1A Active CN112290612B (en) | 2020-09-18 | 2020-09-18 | Light-load detection circuit |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102810974A (en) * | 2012-08-09 | 2012-12-05 | 上海新进半导体制造有限公司 | Detection pulse generator, control chip and switching power source |
| CN104483580A (en) * | 2014-12-25 | 2015-04-01 | 珠海全志科技股份有限公司 | DC-DC converter no-load detection device based on PFM pulse counting |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI464414B (en) * | 2013-05-17 | 2014-12-11 | Feeling Technology Corp | A light load current detection system |
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2020
- 2020-09-18 CN CN202010988605.1A patent/CN112290612B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102810974A (en) * | 2012-08-09 | 2012-12-05 | 上海新进半导体制造有限公司 | Detection pulse generator, control chip and switching power source |
| CN104483580A (en) * | 2014-12-25 | 2015-04-01 | 珠海全志科技股份有限公司 | DC-DC converter no-load detection device based on PFM pulse counting |
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| Publication number | Publication date |
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| CN112290612A (en) | 2021-01-29 |
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