CN104468082B - The construction method of the Lorenz type hyperchaotic system containing y side based on memristor - Google Patents

Abstract

The invention relates to a construction method and circuit of a Lorenz-type hyperchaotic system containing y-square based on a memristor, using operational amplifiers U1, operational amplifiers U2, operational amplifiers U3 and resistors and capacitors to realize addition, phase inversion and integral operations, Utilize multiplier U4 and multiplier U5 to realize the multiplication operation in the system, utilize operational amplifier U6 and multiplier U7 and multiplier U8 to realize the memristor model among the present invention, operational amplifier U1 connects operational amplifier U2, operational amplifier U6 and Multiplier U4, multiplier U5, multiplier U8, operational amplifier U2 is connected to operational amplifier U3 and multiplier U4, operational amplifier U3 is connected to multiplier U5, operational amplifier U6 is connected to multiplier U7 and multiplier U8, multiplier U7 is connected to multiplier U8, on the basis of the Lorenz type chaotic system containing y square, the present invention uses a memristor element to add one dimension to form a four-dimensional hyperchaotic system, and proposes a new method for memristors to be applied to hyperchaotic systems.

Description

Construction method of Lorenz-type hyperchaotic system with y-square based on memristor

technical field

The invention relates to a chaotic system and circuit realization, in particular to a construction method of a Lorenz-type hyperchaotic system containing y-square based on a memristor.

Background technique

At present, the method of constructing four-dimensional hyperchaotic is mainly based on the three-dimensional chaotic system, adding one dimension to form a four-dimensional hyperchaotic system. Memristor, as a new physical component discovered by Hewlett-Packard Laboratory in 2008, can replace Chua's diode in Chua's circuit To form a four-dimensional chaotic system, two memristive elements are needed to form hyperchaos in Chua's circuit, so a five-dimensional or more system is required, and there are relatively few system circuits that realize hyperchaos in a four-dimensional system with memristive elements , the method of memristor applied to the four-dimensional hyperchaotic system has not been proposed, which is the deficiency of the existing technology.

Contents of the invention

The technical problem to be solved in the present invention is to provide a method for constructing a Lorenz-type hyperchaotic system based on memristors containing y-square:

The construction method of the Lorenz type hyperchaotic system containing y square based on the memristor comprises the following steps:

(1) The Lorenz type chaotic system i with y square is:

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \begin{array}{cc}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; z</span>}& \mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 30</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}\end{array}\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; z</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>$

where x, y, z are state variables;

(2) The memristor used in the present invention is a magnetron memristor model ii is:

in Denotes the magnetron memristor, Indicates the magnetic flux, m, n are parameters greater than zero;

(3) Deriving the magnetron memristor model ii of ii, the memristor model iii is:

Represents magnetron memristor, m, n are parameters greater than zero;

(4) Using the magnetron memristor model iii as a one-dimensional system variable, add it to the second equation of the Lorenz type chaotic system containing the y square, and obtain a Lorenz type hyperchaotic system containing the y square based on the memristor iv:

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; k</span>}\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; W</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; z</span>}\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; v</span>}$

In the formula, x, y, z, u are state variables, parameter values a=10, b=30, c=8/3, m=8, n=0.004, k=3;

(5) Based on the circuit constructed by system iv, operational amplifier U1, operational amplifier U2, operational amplifier U3 and resistors and capacitors are used to realize addition, phase inversion and integral operations, and multiplier U4 and multiplier U5 are used to realize multiplication in the system, Utilize operational amplifier U6 and multiplier U7, multiplier U8 and capacitance to realize memristor model in the present invention, described operational amplifier U1, U2 and U3 adopt LF347BN, described multiplier U4, U5, U7 and U8 adopt AD633JN, The operational amplifier U6 adopts LF353N;

The first pin of the operational amplifier U1 is connected to the second pin through the resistor Cx, connected to the sixth pin through the resistor R2, connected to the thirteenth pin, the third pin, and the fifth pin of the operational amplifier U2 through the resistor Ry1 , the 10th and 12th pins are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 8th and 9th pins are suspended, and the 6th pin is connected to the 7th pin through the resistor R3. The 7th pin is connected to the 13th pin through the resistor Rx1, the 13th pin of the operational amplifier U2 is connected to the memristor Ry4, the 7th pin is directly connected to the 1st pin of the multiplier U4, and the 13th pin is connected to the resistor Rx Connect to the 14th pin, and the 14th pin is connected to the 2nd pin through the resistor R1;

The 1st pin, the 2nd pin, the 6th pin, and the 7th pin of the operational amplifier U2 are suspended, the 3rd pin, the 5th pin, the 10th pin, and the 12th pin are grounded, and the 4th pin is grounded. The pin is connected to VCC, the 11th pin is connected to VEE, the 8th pin is connected to the 13th pin through the resistor Ry2, the 13th pin of the operational amplifier U1 is connected through the resistor Rx2, the 9th pin is connected to the capacitor Cy, and the 8th pin is The pin is directly connected to the first pin and the third pin of the multiplier U5, the 13th pin is connected to the 14th pin through the resistor Ry, and the 14th pin is connected to the 9th pin through the resistor R4;

The first pin of the operational amplifier U3 is connected to the second pin through the capacitor Cz, connected to the sixth pin through the resistor R6, and the first pin is directly connected to the third pin of the multiplier U4, the third pin, the fifth pin Pin, pin 10, pin 12 are grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 8 and pin 9 are suspended, pin 6 is connected to pin 7 through resistor R7 The 7th pin is connected to the 13th pin through the resistor Rz2, the 13th pin is connected to the 14th pin through the resistor Rz, and the 14th pin is connected to the 2nd pin through the resistor R5;

The first pin of the multiplier U4 is connected to the seventh pin of the operational amplifier U1, the second pin, the fourth pin, and the sixth pin are grounded, and the third pin is connected to the first pin of the operational amplifier U3, The 5th pin is connected to VEE, the 8th pin is connected to VCC, and the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor Ry3;

The first pin and the third pin of the multiplier U5 are connected to the eighth pin of the operational amplifier U2, the second pin, the fourth pin, and the sixth pin are grounded, the fifth pin is connected to VEE, and the eighth pin is connected to VEE. The pin is connected to VCC, and the 7th pin is connected to the 13th pin of the operational amplifier U3 through the resistor Rz1.

Described magnetron memristor is realized by operational amplifier U6 and multiplier U7 and multiplier U8, and described operational amplifier U6 connects operational amplifier U1 and multiplier U7 and multiplier U8, and multiplier U7 connects multiplier U8, and multiplier U8 Connect the operational amplifier U2;

The first pin, the second pin, and the third pin of the operational amplifier U6 are suspended, the fourth pin is connected to VEE, the fifth pin is grounded, the sixth pin is connected to the seventh pin through the capacitor C4, and the resistor R8 is connected to the 7th pin of the operational amplifier U1, the 7th pin is directly connected to the 1st and 3rd pins of the multiplier U7, and the 8th pin is connected to VCC;

The first pin and the third pin of the multiplier U7 are connected to the seventh pin of the operational amplifier U6, the second pin, the fourth pin, and the sixth pin are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to VEE. The pin is connected to the third pin of the multiplier U8, and the eighth pin is connected to VCC;

The first pin of the multiplier U8 is connected to the sixth pin of the operational amplifier U6 through a resistor R8, connected to the seventh pin through the series connection of the resistor R10 and the resistor R9, and the first pin is directly connected to the seventh pin of the operational amplifier U1 pin, the 2nd pin, the 4th pin, and the 6th pin are grounded, the 5th pin is connected to VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R9, and the 8th pin is connected to VCC.

Beneficial effects: on the basis of the Lorenz type chaotic system containing y square, the present invention uses a memristor element to add one dimension to form a four-dimensional hyperchaotic system, and proposes a new method for memristors to be applied to hyperchaotic systems.

Description of drawings

FIG. 1 is a schematic diagram of a circuit connection structure of a preferred embodiment of the present invention.

Fig. 2 is the actual connection diagram of the circuit realizing the memristor in the present invention.

Fig. 3 is the actual connection diagram of the circuit of the operational amplifier U1.

FIG. 4 is a circuit actual connection diagram of the multiplier U4 and the operational amplifier U2.

FIG. 5 is a circuit actual connection diagram of the multiplier U5 and the operational amplifier U3.

detailed description

The present invention will be further described in detail below with reference to the accompanying drawings and preferred embodiments, see Fig. 1-Fig. 5 .

The construction method of the Lorenz type hyperchaotic system containing y square based on the memristor comprises the following steps:

(1) The Lorenz type chaotic system i with y square is:

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \begin{array}{cc}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; z</span>}& \mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 30</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 3</span>}\end{array}\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; z</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>$

where x, y, z are state variables;

(2) The memristor used in the present invention is a magnetron memristor model ii is:

in Denotes the magnetron memristor, Indicates the magnetic flux, m, n are parameters greater than zero;

(3) Deriving the magnetron memristor model ii of ii, the memristor model iii is:

Represents magnetron memristor, m, n are parameters greater than zero;

(4) Using the magnetron memristor model iii as a one-dimensional system variable, add it to the second equation of the Lorenz type chaotic system containing the y square, and obtain a Lorenz type hyperchaotic system containing the y square based on the memristor iv:

$\left\{\begin{array}{c}\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; k</span>}\mathrm{<span\; class="notranslate">\; x</span>}\mathrm{<span\; class="notranslate">\; W</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; z</span>}\\ \mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; d</span>}\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; v</span>}$

In the formula, x, y, z, u are state variables, parameter values a=10, b=30, c=8/3, m=8, n=0.004, k=3;

(5) Based on the circuit constructed by system iv, operational amplifier U1, operational amplifier U2, operational amplifier U3 and resistors and capacitors are used to realize addition, phase inversion and integral operations, and multiplier U4 and multiplier U5 are used to realize multiplication in the system, Utilize operational amplifier U6 and multiplier U7, multiplier U8 and capacitance to realize memristor model in the present invention, described operational amplifier U1, U2 and U3 adopt LF347BN, described multiplier U4, U5, U7 and U8 adopt AD633JN, The operational amplifier U6 adopts LF353N;

The first pin of the operational amplifier U1 is connected to the second pin through the resistor Cx, connected to the sixth pin through the resistor R2, and connected to the thirteenth pin, the third pin, and the fifth pin of the operational amplifier U2 through the resistor Ry1 , the 10th and 12th pins are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 8th and 9th pins are suspended, and the 6th pin is connected to the 7th pin through the resistor R3. The 7th pin is connected to the 13th pin through the resistor Rx1, the 13th pin of the operational amplifier U2 is connected to the memristor Ry4, the 7th pin is directly connected to the 1st pin of the multiplier U4, and the 13th pin is connected to the resistor Rx Connect to the 14th pin, and the 14th pin is connected to the 2nd pin through the resistor R1;

The 1st pin, the 2nd pin, the 6th pin, and the 7th pin of the operational amplifier U2 are suspended, the 3rd pin, the 5th pin, the 10th pin, and the 12th pin are grounded, and the 4th pin is grounded. The pin is connected to VCC, the 11th pin is connected to VEE, the 8th pin is connected to the 13th pin through the resistor Ry2, the 13th pin of the operational amplifier U1 is connected through the resistor Rx2, the 9th pin is connected to the capacitor Cy, and the 8th pin is The pin is directly connected to the first pin and the third pin of the multiplier U5, the 13th pin is connected to the 14th pin through the resistor Ry, and the 14th pin is connected to the 9th pin through the resistor R4;

The first pin of the operational amplifier U3 is connected to the second pin through the capacitor Cz, connected to the sixth pin through the resistor R6, and the first pin is directly connected to the third pin of the multiplier U4, the third pin, the fifth pin Pin, pin 10, pin 12 are grounded, pin 4 is connected to VCC, pin 11 is connected to VEE, pin 8 and pin 9 are suspended, pin 6 is connected to pin 7 through resistor R7 The 7th pin is connected to the 13th pin through the resistor Rz2, the 13th pin is connected to the 14th pin through the resistor Rz, and the 14th pin is connected to the 2nd pin through the resistor R5;

The first pin of the multiplier U4 is connected to the seventh pin of the operational amplifier U1, the second pin, the fourth pin, and the sixth pin are grounded, and the third pin is connected to the first pin of the operational amplifier U3, The 5th pin is connected to VEE, the 8th pin is connected to VCC, and the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor Ry3;

The first pin and the third pin of the multiplier U5 are connected to the eighth pin of the operational amplifier U2, the second pin, the fourth pin, and the sixth pin are grounded, the fifth pin is connected to VEE, and the eighth pin is connected to VEE. The pin is connected to VCC, and the 7th pin is connected to the 13th pin of the operational amplifier U3 through the resistor Rz1.

Described magnetron memristor is realized by operational amplifier U6 and multiplier U7 and multiplier U8, and described operational amplifier U6 connects operational amplifier U1 and multiplier U7 and multiplier U8, and multiplier U7 connects multiplier U8, and multiplier U8 Connect the operational amplifier U2;

The first pin, the second pin, and the third pin of the operational amplifier U6 are suspended, the fourth pin is connected to VEE, the fifth pin is grounded, the sixth pin is connected to the seventh pin through the capacitor C4, and the resistor R8 is connected to the 7th pin of the operational amplifier U1, the 7th pin is directly connected to the 1st and 3rd pins of the multiplier U7, and the 8th pin is connected to VCC;

The first pin and the third pin of the multiplier U7 are connected to the seventh pin of the operational amplifier U6, the second pin, the fourth pin, and the sixth pin are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to VEE. The pin is connected to the third pin of the multiplier U8, and the eighth pin is connected to VCC;

The first pin of the multiplier U8 is connected to the sixth pin of the operational amplifier U6 through a resistor R8, connected to the seventh pin through the series connection of the resistor R10 and the resistor R9, and the first pin is directly connected to the seventh pin of the operational amplifier U1 pin, the 2nd pin, the 4th pin, and the 6th pin are grounded, the 5th pin is connected to VEE, the 7th pin is connected to the 13th pin of the operational amplifier U2 through the resistor R9, and the 8th pin is connected to VCC.

Of course, the above description is not a limitation to the invention, and the present invention is not limited to the above examples, and the changes, modifications, additions or replacements made by those skilled in the art within the scope of the present invention also belong to the scope of the present invention. protected range.

Claims (2)

1. the construction method of the Lorenz type hyperchaotic system containing y side based on memristor, it is characterised in that comprise the following steps:

(1) the Lorenz type chaos system i containing y side is:

$\left\{\begin{array}{cc}\begin{array}{c}dx/dt=a\left(y-x\right)\\ dy/dt=bx-y-xz\\ dz/dt=y^2-cz\end{array}& a=10,b=30,c=8/3\end{array}\right.---i$

X in formula, y, z are state variable；

(2) memristor that the present invention uses is that magnetic control memristor model ii is:

WhereinRepresent magnetic control memristor,Representing magnetic flux, m, n are greater than the parameter of zero；

(3) the magnetic control memristor model derivation to ii must be recalled and leads device model iii and be:

Representing that magnetic control is recalled to lead, m, n are greater than the parameter of zero；

(4) magnetic control is recalled lead device model iii as unidimensional system variable, be added in the second equation of Lorenz type chaos system containing y side On, it is thus achieved that a kind of Lorenz type hyperchaotic system iv containing y side based on memristor:

$\left\{\begin{array}{c}dx/dt=a\left(y-x\right)\\ dy/dt=bx-y-xz-kxW\left(u\right)\\ dz/dt=y^2-cz\\ du/dt=-x\end{array}\right.---iv$

X in formula, y, z, u are state variable, parameter value a=10, b=30, c=8/3, m=8, n=0.004, k=3；

(5) circuit based on system iv structure, utilizes operational amplifier U1, operational amplifier U2, operational amplifier U3 and electricity Resistance, electric capacity realize addition, anti-phase and integral operation, utilize the multiplication fortune that multiplier U4 and multiplier U5 realizes in system Calculate, utilize operational amplifier U6 and multiplier U7, multiplier U8 and electric capacity to realize the memristor model in the present invention, described Operational amplifier U1, U2 and U3 use LF347BN, and described multiplier U4, U5, U7 and U8 use AD633JN, described operational amplifier U6 use LF353N；

1st pin of described operational amplifier U1 connects the 2nd pin by resistance Cx, connects the 6th by resistance R2 and draws Foot, connects the 13rd pin of operational amplifier U2 by resistance Ry1, the 3rd pin, the 5th pin, the 10th pin, the 12nd Pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 8th pin, the 9th pin are unsettled, and the 6th pin passes through Resistance R3 connects the 7th pin, and the 7th pin connects the 13rd pin by resistance Rx1, connects computing by memristor Ry4 and puts 13rd pin of big device U2, the 7th pin is directly connected to the 1st pin of multiplier U4, and the 13rd pin is by resistance Rx even Connecing the 14th pin, the 14th pin connects the 2nd pin by resistance R1；

1st pin of described operational amplifier U2, the 2nd pin, the 6th pin, the 7th pin are unsettled, the 3rd pin, 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 8th pin leads to Cross resistance Ry2 and connect the 13rd pin, connect the 13rd pin of operational amplifier U1 by resistance Rx2, connect by electric capacity Cy 9 pins, the 8th pin is directly connected to the 1st pin and the 3rd pin of multiplier U5, and the 13rd pin connects by resistance Ry 14 pins, the 14th pin connects the 9th pin by resistance R4；

1st pin of described operational amplifier U3 connects the 2nd pin by electric capacity Cz, connects the 6th pin by resistance R6, 1st pin is directly connected to the 3rd pin of multiplier U4, and the 3rd pin, the 5th pin, the 10th pin, the 12nd pin connect Ground, the 4th pin meets VCC, and the 11st pin meets VEE, and the 8th pin, the 9th pin are unsettled, and the 6th pin passes through resistance R7 connects the 7th pin, and the 7th pin connects the 13rd pin by resistance Rz2, and the 13rd pin connects the 14th by resistance Rz and draws Foot, the 14th pin connects the 2nd pin by resistance R5；

7th pin of the 1st pin concatenation operation amplifier U1 of described multiplier U4, the 2nd pin, the 4th pin, 6 pin ground connection, the 1st pin of the 3rd pin concatenation operation amplifier U3, the 5th pin meets VEE, and the 8th pin connects VCC, the 7th pin connects the 13rd pin of operational amplifier U2 by resistance Ry3；

1st pin of described multiplier U5 and the 8th pin of the 3rd pin concatenation operation amplifier U2, the 2nd pin, 4 pins, the 6th pin ground connection, the 5th pin meets VEE, and the 8th pin meets VCC, and the 7th pin connects fortune by resistance Rz1 Calculate the 13rd pin of amplifier U3.

The construction method of the Lorenz type hyperchaotic system containing y side based on memristor the most according to claim 1, wherein magnetic Control is recalled and is led device and realized by operational amplifier U6 and multiplier U7 and multiplier U8, and described operational amplifier U6 concatenation operation is put Big device U1 and multiplier U7 and multiplier U8, multiplier U7 connect multiplier U8, multiplier U8 concatenation operation amplifier U2；

1st pin of described operational amplifier U6, the 2nd pin, the 3rd pin are unsettled, and the 4th pin meets VEE, and the 5th Pin ground connection, the 6th pin connects the 7th pin by electric capacity C4, draws by the 7th of resistance R8 concatenation operation amplifier U1 the Foot, the 7th pin is directly connected to the 1st pin and the 3rd pin of multiplier U7, and the 8th pin meets VCC；

1st pin of described multiplier U7 and the 7th pin of the 3rd pin concatenation operation amplifier U6, the 2nd pin, 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin connects the 3rd pin of multiplier U8, the 8th pin Meet VCC；

1st pin of described multiplier U8 connects the 6th pin of operational amplifier U6 by resistance R8, by resistance R10 With series connection the 7th pin of resistance R9, the 1st pin is directly connected to the 7th pin of operational amplifier U1, the 2nd pin, 4th pin, the 6th pin ground connection, the 5th pin meets VEE, and the 7th pin meets the of operational amplifier U2 by resistance R9 13 pins, the 8th pin meets VCC.