CN104465873A - Selective emitting electrode solar cell and manufacturing method thereof - Google Patents
Selective emitting electrode solar cell and manufacturing method thereof Download PDFInfo
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- CN104465873A CN104465873A CN201410727318.XA CN201410727318A CN104465873A CN 104465873 A CN104465873 A CN 104465873A CN 201410727318 A CN201410727318 A CN 201410727318A CN 104465873 A CN104465873 A CN 104465873A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 238000009792 diffusion process Methods 0.000 claims abstract description 76
- 238000000034 method Methods 0.000 claims abstract description 53
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 40
- 239000010703 silicon Substances 0.000 claims abstract description 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 35
- 239000012535 impurity Substances 0.000 claims abstract description 11
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 3
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 3
- 239000002002 slurry Substances 0.000 claims description 29
- 229910052698 phosphorus Inorganic materials 0.000 claims description 10
- 239000011574 phosphorus Substances 0.000 claims description 10
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 9
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 239000003795 chemical substances by application Substances 0.000 abstract 3
- 238000004513 sizing Methods 0.000 abstract 3
- 239000010410 layer Substances 0.000 abstract 2
- 239000012528 membrane Substances 0.000 abstract 1
- 239000002356 single layer Substances 0.000 abstract 1
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 14
- 229910019213 POCl3 Inorganic materials 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- 238000002161 passivation Methods 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000006117 anti-reflective coating Substances 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 210000002268 wool Anatomy 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 235000008216 herbs Nutrition 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 229910001635 magnesium fluoride Inorganic materials 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000013082 photovoltaic technology Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a manufacturing method of a selective emitting electrode solar cell. The method includes the steps that the predetermined region on the surface of a silicon slice is covered with diffusion sizing agents; the diffusion sizing agents are dried; the silicon slice is placed in a diffusion furnace, diffusion is conducted on the silicon slice, diffusion impurities of a diffusion source in the diffusion furnace and diffusion impurities of the diffusion sizing agents are homogeneous impurities; electrodes are formed on the predetermined region, a cathode electrode layer is formed on the back and is formed by a single layer or double layers or multiple layers of graphene membranes. Accordingly, the invention further provides the solar cell manufactured through the method. By means of the method, the problem that in the prior art, damage, brought by secondary high temperature processing, to the silicon slice, is avoided, meanwhile, the process is simplified, and the cost is saved.
Description
Technical field
The invention belongs to field of photovoltaic technology, relate to the making of solar cell, particularly relate to a kind of selective emitter solar battery and preparation method thereof.
Background technology
Conventional crystal-silicon solar cell preparation process generally includes Wafer Cleaning, surface wool manufacturing, diffusion, etching edge, deposition antireflection layer, prints electrode, is total to the steps such as burning.Wherein, the silicon chip after effects on surface making herbs into wool carries out diffusion, thus forms P-N junction, and the close surface of this P-N junction is commonly called front or emitter.The back side is called as with the other one side corresponding to front.At present, crystal-silicon solar cell main thermal diffusion method used is liquid source diffusion, and diffusion impurity is brought in diffusion furnace by the method that this technique carries diffuse source by gas.In order to make silicon chip become solar cell, also grid electrode front and back electrode must be made respectively at front and back.The effect of grid electrode front and back electrode is the electric energy that collection and derivation solar cell produce after being subject to light radiation.
In the manufacturing process of reality, higher surface dopant concentration (or weigh doping or diffusion deeply) can reduce the contact resistance between electrode and silicon chip, lower doping content (or claiming light dope or shallow diffusion) can carry out good surface passivation, reduce the recombination probability of few son, thus improve open circuit voltage and the short circuit current of battery.And the closer to the surface of battery, the generation rate of photo-generated carrier is higher, and the collection rate the closer to P-N junction photo-generated carrier is higher, and therefore shallow diffusion can obtain high collection rate in the region of high carrier generation rate, improve the short circuit current of battery.But shallow diffusion can make battery and silicon chip form high contact resistance, and lateral resistance also can increase thereupon, cause the series resistance of battery to increase, fill factor, curve factor reduces.Therefore, for the crystal-silicon solar cell manufacturing process of routine, the concentration requirement of diffusion adapts to the needs printed electrode.Usual use controls the high-concentration dopant that the rear sheet resistance of diffusion is 40-80 about Ω/sq, but can bring the high compound of top layer thus, thus the conversion efficiency of restriction battery.
Selective emitter technology is hopeful one of solution to the problems described above in crystal-silicon solar cell production technology.Selective emitter is the heavy doping carrying out low square resistance at the part or all of predeterminable area of corresponding grid electrode front, and carry out the light dope of high square resistance in other regions, such structure has taken into account open circuit voltage simultaneously, the needs of short circuit current and fill factor, curve factor.
The key realizing selective emitting electrode structure how to form said two different doped regions above.Common way carries out twice thermal diffusion to form this structure.A kind of concrete technological process comprises: first at silicon chip surface high-temperature thermal oxidation growth silicon dioxide layer, then the window that photoetching predeterminable area is corresponding on silicon dioxide layer, then deeply spread in the diffusion furnace taking POCl3 as diffuse source, remove silicon dioxide layer subsequently and in the diffusion furnace taking POCl3 as diffuse source, carry out shallow diffusion again.Use this technique, on 100cm2 polysilicon, realize the conversion efficiency of 15.9% in conjunction with SiN4/MgF2 double layer antireflection coating.But carry out twice thermal diffusion and form silicon chip in the method for selective emitter due to this and have twice high-temperature hot process, comparatively large and hear rate is also very large to the infringement of silicon chip, cause the control of the quality of P-N junction and process costs all not ideal.
As can be seen here, on large-scale production, very large demand is had to method that is efficient and the making solar cell emitter of low cost.
Summary of the invention
The object of the invention is to provide a kind of solar cell emitter and preparation method thereof, this battery and preparation method thereof can improve the conversion efficiency of solar cell, and technique is simple, with low cost, is suitable for large-scale industrial production.
For achieving the above object, the invention provides a kind of manufacture method of selective emitter solar battery, described method comprises: the presumptive area on silicon chip surface covers diffusion slurry; Dry described diffusion slurry; Inserted in diffusion furnace by described silicon chip and carry out diffusion, in described diffusion furnace, the diffusion impurity of diffuse source is impurity of the same clan with the diffusion impurity of diffusion slurry; And electrode is formed in described presumptive area, form negative electrode layer overleaf, described negative electrode layer is formed by individual layer, bilayer or multi-layer graphene film.
Preferably, described diffusion slurry is covered by silk screen printing or ink-jet.
Preferably, described diffusion slurry contains one or more pentels.
Preferably, described diffusion slurry comprises phosphorus slurry.
Preferably, in described presumptive area, electrode is formed by silk screen printing.
Preferably, utilize technique of alignment to be formed in described presumptive area to make electrode, described technique of alignment comprises light source irradiation and CCD technology.
Preferably, the shape of described presumptive area and the figure of electrode match.
Preferably, the live width of described presumptive area 5%-100% wider than the grid line of electrode.
Preferably, described electrode is the main gate line of front electrode and secondary grid line; Described electrode is the secondary grid line of front electrode.
Correspondingly, present invention also offers a kind of solar cell prepared by the manufacture method of above-mentioned solar cell emitter.
Method provided by the invention adds the operation covering doping slurry and oven dry before the diffusion of the solar cell manufacture process of routine, thus in diffusion furnace, selective emitting electrode structure can be formed by One Diffusion Process, avoid the infringement in prior art, the secondary high-temperature process of silicon chip brought, simplify technique simultaneously, save cost.The open circuit voltage of the selective emitting electrode structure solar cell made by this method, short circuit current and fill factor, curve factor are obtained for raising, thus make battery obtain higher photoelectric conversion efficiency.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the front view with the silicon chip of emitter prepared by solar cell emitter manufacture method of the present invention;
Fig. 2 shows process of adulterating according to an embodiment of the invention;
Fig. 3 is the flow chart of the method making solar cell emitter according to embodiments of the invention.
In figure: 20-silicon chip, 21-main gate line, the secondary grid line of 22-, 25-presumptive area, 26-phosphorus is starched.
Embodiment
For making above-mentioned purpose of the present invention, feature and advantage become apparent more, below in conjunction with the drawings and specific embodiments, further describe the present invention.It should be noted that, each structure in accompanying drawing just schematically illustrates, and in order to make those of ordinary skill in the art understand principle of the present invention best, it is not necessarily drawn in proportion.
Fig. 1 is the vertical view of the emitter of silicon chip according to an embodiment of the invention, which illustrates the presumptive area how selecting to cover diffusion slurry.Typically, in the one side by solar light irradiation of the silicon chip 20 for making solar cell, form grid electrode front, grid electrode front comprises main gate line 21 and secondary grid line 22.In the embodiment shown in fig. 1, many secondary grid line 22 left and right directions are arranged in parallel and engage with main gate line 21 square crossing.The concrete quantity of secondary grid line 22 and main gate line 21 and the arrangement mode of main gate line 21 and secondary grid line 22 be not by the restriction of the embodiment of the present invention.The object of the invention is the solar cell that will form selective emitting electrode structure, namely the doping of high concentration will be carried out in grid electrode front region, and the doping of low concentration is carried out at non-frontal area of grid, therefore generally speaking described presumptive area is exactly region corresponding to grid electrode front.Usually, presumptive area is chosen as shape identical substantially with the figure of desired grid electrode front, but on the emitter of silicon chip, occupies the area more bigger than electrode zone.In the present embodiment, the live width of described presumptive area 5%-100% wider than the grid line of grid electrode front.
According to the electricity generating principle of solar cell, the secondary grid line of electrode mainly plays collected current, and the electric current that main gate line mainly plays a part secondary grid line is collected collects, also be used as the connection matrix of interconnector when multiple solar cell is connected to form solar module by interconnector, interconnector is by welding or the series connection being otherwise connected and then realizing multiple battery with main gate line simultaneously.Therefore, in practice relative to the main gate line of electrode, there is higher requirement to the doping content of secondary grid region, that is only can carry out high-concentration dopant to the secondary grid region of electrode.As shown in Figure 1, illustrate presumptive area 25 with dotted line frame, the secondary grid line 22 of itself and electrode is all elongated rectangular shape, but live width is slightly larger than the width of secondary grid line.In this embodiment, the live width of described presumptive area 5%-100% wider than the grid line of electrode.
Figure 2 illustrates process of adulterating according to an embodiment of the invention, wherein make diffusion phosphorus slurry using P2O5 as diffuse source.It will be understood by those of skill in the art that described diffusion slurry can contain any optional diffuse source.Preferably, highly purified slurry should be used, can not metal impurities be contained, to avoid the metal when high-temperature heating to enter silicon chip, particularly P-N junction district, thus form the complex centre of photo-generated carrier, and cause the efficiency of solar cell made lower.As shown in Figure 2, phosphorus slurry 26 is printed in the presumptive area 25 on silicon chip 20 surface, fix by drying, then silicon chip 20 is placed into diffusion furnace, that carries out in diffusion furnace is diffused as the diffusion using liquid source to carry out, the liquid state diffusion source that existing industry is commonly used is POCl3, nitrogen to be passed in POCl3 liquid source and the steam carrying this source in diffusion furnace tube, POCl3 is decomposed to form P2O5 and is deposited on silicon chip surface, POCl3 decomposes the P2O5 that formed to carry out diffuseing to form light doping section on other regions except presumptive area 25 of front side of silicon wafer, P2O5 and POCl3 contained by phosphorus slurry decomposes the P2O5 formed common (mainly contained in phosphorus slurry P2O5) to carry out diffuseing to form heavily doped region to front side of silicon wafer presumptive area 25, so namely define selective emitter at front side of silicon wafer, the part do not covered by rear-face contact part at the basalis back side of solar cell and rear-face contact part form passivation layer, the refractive index of the passivating film of described passivation layer is more than 2.6.
Fig. 3 is the flow chart of the method making solar cell emitter according to embodiments of the invention.It should be noted that in order to sake of clarity, omit some necessary processes in conventional solar cell manufacturing process wherein, such as Wafer Cleaning, etching edge, dephosphorization silex glass, prepare the steps such as antireflective coating.First, in step S31, select the presumptive area that will cover diffusion slurry according to electrode pattern, described electrode comprises the main gate line of front electrode and secondary grid line or only comprises the secondary grid line of front electrode.In step s 32, at the silicon chip surface through cleaning and texturing, by silk-screen printing technique or ink-jet, diffusion slurry is covered in described presumptive area.In order to make diffusion slurry be fixed on silicon chip surface, in step S33, carry out prebake to diffusion slurry, general bake out temperature is 40 DEG C ~ 400 DEG C, and be preferably 200 ~ 300 DEG C, drying time is 15 ~ 240 seconds.After fixing diffusion slurry, silicon chip is placed in diffusion furnace, in the temperature range of 800 DEG C ~ 950 DEG C and in the time range of 10 ~ 60 minutes, carry out diffusion, in diffusion furnace, complete the high-concentration dopant of presumptive area and the low concentration doping in other regions, as shown at step s 34 simultaneously.At the silicon chip completing diffusion through etching edge, dephosphorization silex glass and after preparing the normal process steps such as antireflective coating, in step s 35, electrode is formed over a predetermined area by silk screen printing, usual utilization comprises the technique of alignment such as light source irradiation and CCD technology to guarantee that electrode is formed in presumptive area accurately, electrode is formed also to be included in part and rear-face contact part that the basalis back side do not cover by rear-face contact part and forms passivation layer, and the refractive index of the passivating film of described passivation layer is more than 2.6.
Method provided by the invention adds the operation covering doping slurry and oven dry before the diffusion of the solar cell manufacture process of routine, thus in diffusion furnace, selective emitting electrode structure can be formed by One Diffusion Process, avoid the infringement in prior art, the secondary high-temperature process of silicon chip brought, simplify technique simultaneously, save cost.The open circuit voltage of the selective emitting electrode structure solar cell made by this method, short circuit current and fill factor, curve factor are obtained for raising, thus make battery obtain higher photoelectric conversion efficiency.
Should be noted that, in another embodiment of solar cell emitter manufacture method of the present invention, after completing steps S31, S32 and S33, first in diffusion furnace, pass into oxygen, silicon chip is carried out that temperature is 900 DEG C, the time is that the oxidation of 30 minutes is to generate barrier oxide layer at silicon chip surface, phosphorus during barrier oxide layer can stop phosphorus to be starched diffuses out thus forms doping in other regions, generates phosphorus slurry in the process of barrier oxide layer simultaneously and carries out heavy doping to silicon chip; Afterwards under the effect of described barrier oxide layer, in diffusion furnace, pass into POCL3 and carry out diffusion in the time range of the temperature range of 800 DEG C ~ 950 DEG C and 10 ~ 60 minutes, in diffusion furnace, completing the high-concentration dopant of presumptive area and the low concentration doping in other regions simultaneously.The present embodiment make use of the even manageable advantage of liquid source diffusion and carries out shallow doping to unintended areas, avoids the unmanageable shortcoming of Solid Source.
It should be noted that above embodiment only in order to technical scheme of the present invention to be described but not to be limited.Although with reference to above-mentioned embodiment to invention has been detailed description; those of ordinary skill in the art is to be understood that; still can modify to the specific embodiment of the present invention or carry out equivalent replacement to portion of techniques feature and do not depart from essence of the present invention, it is all encompassed in the scope of request of the present invention protection.
Claims (10)
1. a manufacture method for selective emitter solar battery, is characterized in that, described method comprises:
Presumptive area on silicon chip surface covers diffusion slurry;
Dry described diffusion slurry;
Inserted in diffusion furnace by described silicon chip and carry out diffusion, in described diffusion furnace, the diffusion impurity of diffuse source is impurity of the same clan with the diffusion impurity of diffusion slurry; And
Described presumptive area forms electrode, forms negative electrode layer overleaf, described negative electrode layer is formed by individual layer, bilayer or multi-layer graphene film.
2. the manufacture method of solar cell emitter as claimed in claim 1, is characterized in that, cover described diffusion slurry by silk screen printing or ink-jet.
3. the manufacture method of solar cell emitter as claimed in claim 1, it is characterized in that, described diffusion slurry contains one or more pentels.
4. method as claimed in claim 3, is characterized in that, described diffusion slurry comprises phosphorus slurry.
5. the manufacture method of solar cell emitter as claimed in claim 1, is characterized in that, form electrode by silk screen printing in described presumptive area.
6. the manufacture method of solar cell emitter as claimed in claim 5, it is characterized in that, utilize technique of alignment to be formed in described presumptive area to make electrode, described technique of alignment comprises light source irradiation and CCD technology.
7. the manufacture method of solar cell emitter as claimed in claim 1, it is characterized in that, the shape of described presumptive area and the figure of electrode match.
8. the manufacture method of solar cell emitter as claimed in claim 7, is characterized in that, the live width 5%-100% wider than the grid line of electrode of described presumptive area.
9. the manufacture method of solar cell emitter as claimed in claim 7 or 8, it is characterized in that, described electrode is the main gate line of front electrode and secondary grid line; Described electrode is the secondary grid line of front electrode.
10. the solar cell prepared by the manufacture method of solar cell emitter in any one of the preceding claims wherein.
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| CN201410727318.XA CN104465873A (en) | 2014-12-03 | 2014-12-03 | Selective emitting electrode solar cell and manufacturing method thereof |
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| WO2006097189A1 (en) * | 2005-03-14 | 2006-09-21 | Q-Cells Ag | Solar cell |
| CN102468364A (en) * | 2010-11-05 | 2012-05-23 | 无锡尚德太阳能电力有限公司 | Selective emitting electrode solar cell and manufacturing method thereof |
| CN102723401A (en) * | 2012-05-10 | 2012-10-10 | 山东天信光伏新能源有限公司 | Method for manufacturing selective emitter crystalline silicon solar cells |
| CN102842354A (en) * | 2011-06-20 | 2012-12-26 | 中国科学院上海硅酸盐研究所 | Graphene-based back electrode material with three-dimensional network structure and preparation method thereof |
-
2014
- 2014-12-03 CN CN201410727318.XA patent/CN104465873A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006097189A1 (en) * | 2005-03-14 | 2006-09-21 | Q-Cells Ag | Solar cell |
| CN102468364A (en) * | 2010-11-05 | 2012-05-23 | 无锡尚德太阳能电力有限公司 | Selective emitting electrode solar cell and manufacturing method thereof |
| CN102842354A (en) * | 2011-06-20 | 2012-12-26 | 中国科学院上海硅酸盐研究所 | Graphene-based back electrode material with three-dimensional network structure and preparation method thereof |
| CN102723401A (en) * | 2012-05-10 | 2012-10-10 | 山东天信光伏新能源有限公司 | Method for manufacturing selective emitter crystalline silicon solar cells |
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Application publication date: 20150325 |