CN104426651A - Data processing method and device - Google Patents
Data processing method and device Download PDFInfo
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- CN104426651A CN104426651A CN201310391141.6A CN201310391141A CN104426651A CN 104426651 A CN104426651 A CN 104426651A CN 201310391141 A CN201310391141 A CN 201310391141A CN 104426651 A CN104426651 A CN 104426651A
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Abstract
The invention provides a data processing method and a data processing device, wherein the data processing method comprises the following steps of initializing a value of a counter as x, wherein x is more than or equal to i and is smaller than n; outputting an initial value of the counter; after adding one to the value of the counter every time, outputting the value of the counter if the value of the counter is smaller than n and is unequal to x, and setting the value of the counter as i and outputting the value of the counter if the value of the counter is equal to n. By employment of the data processing method and the data processing device, the randomness of a traversal sequence and the security of an encryption system can be both improved.
Description
Technical field
The present invention relates to data encryption technology field, particularly relate to data processing method and device.
Background technology
Encryption system generally all can use ergodic sequence, and therefore the use of ergodic sequence will have influence on the fail safe of encryption system.But in the prior art, generally directly export a string orderly ergodic sequence by counter, this orderly ergodic sequence is unfavorable for the fail safe improving encryption system.
Therefore, need to propose a kind of new data processing method and device, to increase the randomness of ergodic sequence and to improve the fail safe of encryption system.
Summary of the invention
The technical problem that the present invention solves is to provide a kind of new data processing method and device, to increase the randomness of ergodic sequence and to improve the fail safe of encryption system.
The embodiment provides a kind of data processing method, described method comprises: the value of initialization counter is x, i≤x < n; Export the initial value of described counter; After the value of described counter adds 1, if the value of described counter is less than n and is not equal to x, then export the value of described counter at every turn, if the value of described counter equals n, then the value of described counter is set to i, and exports the value of described counter.
Alternatively, described method also comprises: by the value XOR random number mask m of described output, i≤m < n.
The embodiment provides a kind of data processing method, described method comprises: the value of initialization counter is x, i≤x < n; Export the initial value of described counter; After the value of described counter adds y, if the value of described counter is less than x+ (n-i-1) y+1 at every turn, export the value of described counter to the value after n-i delivery, y is odd number, i≤y < n.
Alternatively, described method also comprises: by the value XOR random number mask m of described output, i≤m < n.
The embodiment provides a kind of data processing equipment, described device comprises: the first counter, and initial value is x, wherein i≤x < n; First processor, for exporting the initial value of described counter, after the value of described counter adds 1 at every turn, if the value of described counter is less than n and is not equal to x, then export the value of described counter, if the value of described counter equals n, then the value of described counter is set to i, and exports the value of described counter.
Alternatively, described first processor is also at the value XOR random number mask m by described output, i≤m < n.
Embodiments of the invention additionally provide a kind of data processing equipment, and described device comprises: the second counter, and initial value is x, wherein i≤x < n; Second processor, for exporting the initial value of described counter, after the value of described counter adds y at every turn, if the value of described counter is less than x+ (n-i-1) y+1, export the value of described counter to the value after n-i delivery, y is odd number, i≤y < n.
Alternatively, described second processor is also at the value XOR random number mask m by described output, i≤m < n.
Compared with prior art, by in technique scheme, the initial value x due to counter can be the arbitrary value between i to n, so along with the change of x value, the ergodic sequence of each generation also can be different, thus improve the randomness of ergodic sequence and the fail safe of encryption system significantly.
Accompanying drawing explanation
Fig. 1 is the flow chart of data processing method in the embodiment of the present invention one;
Fig. 2 is the flow chart of data processing method in the embodiment of the present invention two;
Fig. 3 is the structural representation of data processing equipment in the embodiment of the present invention three;
Fig. 4 is the structural representation of data processing equipment in the embodiment of the present invention four.
Embodiment
For making those skilled in the art understand better and realize the present invention, referring to accompanying drawing, be described in detail by specific embodiment.
Embodiment one
Fig. 1 is the data processing method flow chart in embodiment one.
Please refer to Fig. 1, described data processing method comprises: step S100 to S106.
Step S100, the value of initialization counter is x.
In an embodiment of the present invention, the value of described x can be from i to n-1 in optional value, that is: i≤x < n, so along with the change of x value, the ergodic sequence of each generation also can be different, thus improve the randomness of ergodic sequence and the fail safe of encryption system significantly.
Step S101, exports the initial value of described counter;
As mentioned above, along with the change of x value, the initial value of each ergodic sequence exported is different, and therefore each ergodic sequence exported is not identical.
Step S102, adds 1 by the value of counter.
In an embodiment of the present invention, need the ergodic sequence of output one from i to n-1 in scope, the value of so described counter adds 1 gradually from initial value x, in order to ensure the scope of value at i to n-1 of described counter, needs to perform step S103 and step S104.
Step S103, judges whether the value of described counter equals x.
In an embodiment of the present invention, what require output is ergodic sequence, so require that in sequence, each output valve only occurs once, the output valve that namely can not duplicate, initial value due to described counter is x, the value of described counter is so just necessarily required not return x, to avoid the value repeating to export x and be greater than x.
Step S103, judges whether the value of described counter is less than n.
It should be noted that, judging whether the value of described counter is less than n is to make the value of the n-i number exported in the scope of i to n-1, to guarantee the final ergodic sequence the comprising n-i number value in i to n-1 scope exported.
If the value of described counter is less than n, then perform step S105.
Step S105, exports the value of described counter.
After the value exporting described counter, return described step S102, make counter add 1, and continue to perform subsequent operation.
If the value of described counter is not less than n, such as, equal n, so then perform step S106 and step S105.
Step S106, is set to i by the value of described counter.
As previously mentioned, judging whether the value of described counter is less than n is to make the ergodic sequence value in the scope of i to n-1 exported, if the value of described counter is not less than n, so illustrate, the value of described counter has exceeded described scope, just need counter to be set to i, and after the value i outputing described counter, return step S102.
The ergodic sequence exported according to above-mentioned steps S100 to S106 is (x, x+1, x+2, x+3 ... ..n-1, i, i+1, i+2 ... x-1).
The principle of step S100-S106 will be illustrated below.
When need output one group in the scope of 0 to 63 value comprise the ergodic sequence of 64 numbers time, can in step S100, counter described in initialization and described counter, make the value of described counter initial value x be 40,0≤x < 64.
Described initial value 40 is exported by step S101, after described counter first time being added 1 by step S102, at this moment the value of described counter is 41, then, by step S103, can judge that the value of described counter is not equal to 40, so step S104 can be performed, can judge that the value 41 of counter is now less than 64 by step S104, so directly can export 41 in step S105, and return step S102 after output 41.
After described counter being added 1 the 24th time by step S102, at this moment the value of described counter is 64, then, by step S103, can judge that the value of described counter is not equal to 40, so can perform step S104, the value 40+24 of the counter can judged now by step S104 equals 64, so then need in step S106, the value of described counter to be set to 0, then directly export 0 in step S105, and return step S102 after output 0.
Finally, the ergodic sequence exported according to above-mentioned steps is (40,41,42,43 ... ..63,0,1,2 ... 39).
In an embodiment of the present invention, can also by the output valve XOR random number mask m of step S105, i≤m < n, to improve the randomness of the ergodic sequence of output further.
Embodiment two
Fig. 2 is the data processing method flow chart in embodiment two.
Please refer to Fig. 2, described data processing method comprises: step S200 to S204.
Step S200, the value of initialization counter is x.
In an embodiment of the present invention, the value of described x can be from i to n-1 in optional value, namely, i≤x < n, so along with the change of x value, each ergodic sequence produced also can be different, thus improve the randomness of ergodic sequence and the fail safe of encryption system significantly.
Step S201, exports the initial value x of described counter.
Step S202, adds y by the value of counter.
In an embodiment of the present invention, the value of described counter adds y gradually from initial value x, and y is odd number, and i≤y < n.
Step S203, judges whether the value of described counter is less than x+ (n-i-1) y+1.
In an embodiment of the present invention, in order to output packet is containing the ergodic sequence of n-i number, by judging whether the value of described counter is less than x+ (n-i-1) y+1, judge whether described counter has performed the operation adding y for n-i-1 time, namely can judge whether to output n-i number.
Step S204, exports the value of described counter to the value of n-i delivery.
It should be noted that, the value of value to n-i delivery exporting described counter is to make the value of the n-i number exported in the scope of i to n-1, to guarantee the final ergodic sequence the comprising n-i number value in i to n-1 scope exported.Such as, the value being 64, i when the value of n is 0, if counter is 65, obviously more than 64, so just can by by the value 65 of described counter to 64 deliverys, to make the value of described counter equal 1, fall in the scope of 0 to 63.That is, if the value of counter equals 64k+h, wherein k >=1,0≤h < 63 can, by 64k+h to 64 deliverys, be so just the h value fallen in the scope of 0 to 63 to make the value of described counter.
After the value outputing described counter is to the value of n delivery, step S201 can be returned.
By above-mentioned steps S200 to S204 can obtain comprise n-i number and in i to n-1 scope the ergodic sequence of value.
In an embodiment of the present invention, can also by the output valve XOR random number mask m of step S204, i≤m < n, to improve the randomness of the ergodic sequence of output further.
Embodiment three
Fig. 3 is the structural representation of data processing equipment in the embodiment of the present invention three.
Please refer to Fig. 3, described data processing equipment 300 comprises: the first counter 310, and initial value is x, wherein i≤x < n; First processor 320, for exporting the initial value of described counter, after the value of described counter adds 1 at every turn, if the value of described counter is less than n and is not equal to x, then export the value of described counter, if the value of described counter equals n, then the value of described counter is set to i, and exports the value of described counter.
In an embodiment of the present invention, described second processor 320 can also be used at the value XOR random number mask m by described output, i≤m < n.
Embodiment four
Fig. 4 is the structural representation of data processing equipment in the embodiment of the present invention four.
Please refer to Fig. 4, described data processing equipment 400 comprises: the second counter 410, and initial value is x, wherein i≤x < n; Second processor 420, for exporting the initial value of described counter, after the value of described counter adds y at every turn, if the value of described counter is less than x+ (n-i-1) y+1, export the value of described counter to the value after n delivery, y is odd number, i≤y < n.
In an embodiment of the present invention, described second processor 420 can also be used at the value XOR random number mask m by described output, i≤m < n.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment is that the hardware that can carry out instruction relevant by program has come, this program can be stored in a computer-readable recording medium, and storage medium can comprise: ROM, RAM, disk or CD etc.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (8)
1. a data processing method, is characterized in that, comprising:
The value of initialization counter is x, i≤x < n;
Export the initial value of described counter;
After the value of described counter adds 1, if the value of described counter is less than n and is not equal to x, then export the value of described counter at every turn, if the value of described counter equals n, then the value of described counter is set to i, and exports the value of described counter.
2. the method for claim 1, is characterized in that, also comprises: by the value XOR random number mask m of described output, i≤m < n.
3. a data processing method, is characterized in that, comprising:
The value of initialization counter is x, i≤x < n;
Export the initial value of described counter;
After the value of described counter adds y, if the value of described counter is less than x+ (n-i-1) y+1 at every turn, export the value of described counter to the value after n-i delivery, y is odd number, i≤y < n.
4. method as claimed in claim 3, is characterized in that, also comprise: by the value XOR random number mask m of described output, i≤m < n.
5. a data processing equipment, is characterized in that, comprising:
First counter, initial value is x, wherein i≤x < n;
First processor, for exporting the initial value of described counter, after the value of described counter adds 1 at every turn, if the value of described counter is less than n and is not equal to x, then export the value of described counter, if the value of described counter equals n, then the value of described counter is set to i, and exports the value of described counter.
6. device as claimed in claim 5, is characterized in that, described first processor is also at the value XOR random number mask m by described output, i≤m < n.
7. a data processing equipment, is characterized in that, comprising:
Second counter, initial value is x, wherein i≤x < n;
Second processor, for exporting the initial value of described counter, after the value of described counter adds y at every turn, if the value of described counter is less than x+ (n-i-1) y+1, export the value of described counter to the value after n-i delivery, y is odd number, i≤y < n.
8. device as claimed in claim 7, is characterized in that, described second processor is also at the value XOR random number mask m by described output, i≤m < n.
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| CN201310391141.6A CN104426651A (en) | 2013-08-30 | 2013-08-30 | Data processing method and device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107090691A (en) * | 2017-04-25 | 2017-08-25 | 青岛海尔洗衣机有限公司 | A kind of control method for washing machine and washing machine |
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