CN105988942B - Address date conversion method and device in address bus - Google Patents
Address date conversion method and device in address bus Download PDFInfo
- Publication number
- CN105988942B CN105988942B CN201510078896.XA CN201510078896A CN105988942B CN 105988942 B CN105988942 B CN 105988942B CN 201510078896 A CN201510078896 A CN 201510078896A CN 105988942 B CN105988942 B CN 105988942B
- Authority
- CN
- China
- Prior art keywords
- address
- data sequence
- address data
- function
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Storage Device Security (AREA)
Abstract
Address date conversion method and device in a kind of address bus, which comprises obtain the corresponding address date of all address bus, the address date is divided into N parts from a high position to low level, obtains N number of address data sequence;By present address data sequence BiWith corresponding key KiThe first operation is carried out, the first operation result is obtained;In present address data sequence BiWhen for highest addresses data sequence, first operation result is input to corresponding address conversion function Fi, obtain present address data sequence BiCorresponding output address data;In present address data sequence BiWhen for non-highest addresses data sequence, by the first operation result and adjacent high address data sequence Bi+1Corresponding output data carries out the second operation, and the second operation result is input to address conversion function Fi, obtain present address data sequence BiCorresponding output address data.Using the method and device, the power consumption during address is upset can be reduced.
Description
Technical field
The present invention relates to address date conversion method and devices in data security arts more particularly to a kind of address bus.
Background technique
With the development of digital technology, data safety increasingly obtains the attention of people.In actual application, handling
If access address is directly mapped to memory when accessing memory by device, attacker may easier be obtained in the address
Data, thus the case where obtaining the sensitive data in memory, leading to information leakage generation.
Therefore, in the prior art, when processor maps the address into memory, generally use address random ordering or add
Close algorithm handles address, it may be assumed that the address that will be mapped to memory becomes unordered address.Even if the number of one of address
According to being acquired, user can not also obtain address associated with the address, not will cause the generation of information leakage, to improve
Information Security.
Address random ordering, which refers to, upsets address according to certain P displacement rule, however, address random ordering does not have key participation,
When being mapped, there are still exact rules, are still easier under attack.To the higher occasion of security performance demand, ground
Location is out-of-order and is not suitable for.
Address is handled using Encryption Algorithm, Information Security can be improved.However, the input of Encryption Algorithm 1bit
Many bit that address change will lead to output upset address change, and bus is shown as in bus and overturns more, power consumption
It is larger.
Summary of the invention
The embodiment of the present invention solves the problems, such as it is on the basis of ensuring Information Security, during reduction address is upset
Power consumption.
To solve the above problems, the embodiment of the present invention provides address date conversion method in a kind of address bus, comprising:
The corresponding address date of all address bus is obtained, the address date is divided into N parts from a high position to low level, is obtained
To N number of address data sequence, there are one-to-one address conversion functions for N number of address data sequence;
By present address data sequence BiWith corresponding key KiThe first operation is carried out, the first operation result is obtained;
In present address data sequence BiWhen for highest addresses data sequence, first operation result is input to pair
The address conversion function F answeredi, obtain present address data sequence BiCorresponding output address data;
In present address data sequence BiWhen for non-highest addresses data sequence, by the first operation result and an adjacent high position
Address data sequence Bi+1Corresponding output data carries out the second operation, and the second operation result is input to address conversion function Fi,
Obtain present address data sequence BiCorresponding output address data.
Optionally, the equal length of N number of address data sequence.
Optionally, described that first operation result output data corresponding with adjacent high address data sequence is carried out second
Operation, comprising: by the input number of first operation result address conversion function corresponding with adjacent high address data sequence
According to or output data carry out the second operation.
Optionally, the address conversion function comprises at least one of the following: linear mapping function, nonlinear mapping function.
Optionally, the linear mapping function is P permutation function, and the nonlinear mapping function is Sbox function.
Optionally, the address conversion function includes non-linear Sbox function and linear P permutation function, the linear P
Permutation function is suitable for the output to the non-linear Sbox function and carries out linear transformation.
Optionally, the corresponding address conversion function F of the adjacent high address data sequencei+1Including non-linear Sbox letter
Number Si+1And linear P permutation function Pi+1, the linear P permutation function Pi+1Suitable for the non-linear Sbox function Si+1It is defeated
Linear transformation is carried out out, it is described that first operation result output data corresponding with adjacent high address data sequence is carried out second
Operation, comprising: by first operation result and the address conversion function Fi+1In non-linear Sbox function Si+1Output
Data carry out the second operation.
Optionally, second operation includes: that XOR operation or mould add operation.
Optionally, first operation includes: that XOR operation or mould add operation.
Optionally, address date conversion method in the address bus further include: in BiLength and Bi+1Length differ
When, the shorter address data sequence of length is extended into the equal length with the longer address data sequence of length.
To solve the above problems, the embodiment of the invention also provides address date conversion equipment in a kind of address bus, packet
It includes:
First acquisition unit, for obtaining the corresponding address date of all address bus, by the address date from a high position
N parts are divided into low level, obtains N number of address data sequence, there are one-to-one address conversions for N number of address data sequence
Function;
First computing unit is used for present address data sequence BiWith corresponding key KiThe first operation is carried out, obtains
One operation result;
Second computing unit is used for the first operation result and adjacent high address data sequence Bi+1Corresponding output number
According to carrying out the second operation;
Address conversioning unit, in present address data sequence BiWhen for highest addresses data sequence, by described
One operation result is input to corresponding address conversion function Fi, obtain present address data sequence BiCorresponding output address data;
In present address data sequence BiWhen for non-highest addresses data sequence, the second operation result is input to address conversion function
Fi, obtain present address data sequence BiCorresponding output address data.
Optionally, second computing unit is used for: by first operation result and adjacent high address data sequence
The input data or output data of corresponding address conversion function carry out the second operation.
Optionally, second computing unit is used for: in the corresponding address conversion function of the adjacent high position data sequence
Fi+1Including non-linear Sbox function Si+1And linear P permutation function Pi+1When, first operation result and the address are turned
Exchange the letters number Fi+1In non-linear Sbox function Si+1Output data carry out the second operation.
Optionally, address date conversion equipment in the address bus further include: expanding element, in current address number
According to sequence BiLength and adjacent high address data sequence Bi+1Length it is not equal whens, by the shorter address data sequence of length
Extend to the equal length with the longer address data sequence of length.
Compared with prior art, the technical solution of the embodiment of the present invention has the advantage that
When present address data is non-highest addresses data sequence, by the first operation result and adjacent high address number
According to sequence Bi+1After corresponding output data carries out the second operation, the second operation result is input to address conversion function, acquisition pair
The output address data answered.That is, BiCorresponding output address data and Bi+1Corresponding output data is related, in Bi+1It is right
When the output data answered changes, BiCorresponding output address data accordingly changes.And in BiCorresponding output data hair
It, will not be to B when raw changei+1Output data have an impact, it may be assumed that the variations of high address data can be transmitted to low level step by step, low
The corresponding output address data of bit address data is influenced by high address data.Since high address data are not by low order address
The influence of data, therefore when carrying out address conversion, bus overturning is less, so as to reduce the function in address translation process
Consumption.
Detailed description of the invention
Fig. 1 is the flow chart of address date conversion method in one of embodiment of the present invention address bus;
Fig. 2 is address date transition diagram in one of embodiment of the present invention address bus;
Fig. 3 is address date transition diagram in another address bus in the embodiment of the present invention;
Fig. 4 is address date transition diagram in another address bus in the embodiment of the present invention;
Fig. 5 is the structural schematic diagram of address date conversion equipment in one of embodiment of the present invention address bus.
Specific embodiment
In the prior art, in processor by the corresponding address of cache of all data of information into memory when, usually adopt
Address is handled with address random ordering or Encryption Algorithm.However, address random ordering does not have key participation, still when being mapped
There are exact rules, are still easier under attack.To the higher occasion of security performance demand, address is out-of-order and uncomfortable
With.Address is handled using Encryption Algorithm, Information Security can be improved.However, the input address of Encryption Algorithm 1bit
Variation will lead to output upset address many bit all change, shown as in bus bus overturning it is more, power consumption compared with
Greatly.
In embodiments of the present invention, when present address data is non-highest addresses data sequence, by the first operation knot
Fruit and adjacent high address data sequence Bi+1After corresponding output data carries out the second operation, the second operation result is input to
Address conversion function obtains corresponding output address data.That is, BiCorresponding output address data and Bi+1It is corresponding
Output data is related, in Bi+1When corresponding output data changes, BiCorresponding output address data accordingly changes.
And in BiIt, will not be to B when corresponding output data changesi+1Output data have an impact, it may be assumed that high address data
Variation can be transmitted to low level step by step, and the corresponding output address data of low order address data is influenced by high address data.By
It not being influenced by low order address data in high address data, therefore when carrying out address conversion, bus overturning is less, so as to
To reduce the power consumption in address translation process.
It is understandable to enable the above objects, features, and advantages of the embodiment of the present invention to become apparent, it is right with reference to the accompanying drawing
Specific embodiments of the present invention are described in detail.
Step S101 obtains the corresponding address date of all address bus, and the address date is drawn from a high position to low level
It is divided into N parts, obtains N number of address data sequence.
In practical applications, the corresponding address date of all address bus in address bus can be obtained in advance.For example, right
It should be 16 in the address bus that memory address is 64K, bit wide, i.e., the number of address bus is 16.It is directed to each
, there is corresponding address date in address bus, the value of address date is " 0 " or " 1 ".I.e. memory address be 64K ground
Bus corresponding address date in location is 16, and 16 bit address data can be with A15~A0It indicates, A15It is total to be expressed as highest addresses
The corresponding address date of line, A0It is expressed as the corresponding address date of lowest order address bus.
In embodiments of the present invention, 16 address dates N parts be can be divided into, N number of address data sequence, N obtained
The length of a address data sequence is identical, i.e., the quantity for the address date for including in N number of data sequence is identical.
For example, 16 address dates are divided into 4 parts from a high position to low level, 4 address data sequences are obtained.4 ground
Location data sequence is followed successively by B4、B3、B2、B1, wherein address data sequence B4In include address date are as follows: A15、A14、A13、
A12;Address data sequence B3In include address date are as follows: A11、A10、A9、A8;Address data sequence B2In include number of addresses
According to are as follows: A7、A6、A5、A4;Address data sequence B1In include address date are as follows: A3、A2、A1、A0。
In other embodiments of the present invention, 16 address dates can also be divided into 8 parts, the ground that can also be by 16
Location data are divided into 2 parts, 16 address dates can also be divided into 16 parts etc..
In embodiments of the present invention, correspond to each address data sequence, can be preset with one-to-one with it
Address conversion function.For example, corresponding to address data sequence B4, there are corresponding address conversion function F4.For another example, correspond to ground
Location data sequence B3, there are corresponding address conversion function F3.In practical applications, the corresponding address of different address data sequence
Transfer function may be the same or different.It can be selected according to actual application scenarios for different address data sequences
Corresponding address conversion function, is not repeated herein.
In embodiments of the present invention, address conversion function can there are many implementations to select.For example, address conversion function
It can be linear mapping function, or nonlinear mapping function (such as Sbox), address conversion function can also be to include
The function of Nonlinear Mapping and Linear Mapping.For example, address conversion function may include: nonlinear Sbox function and line
The P permutation function of property.In other embodiments of the present invention, address conversion function can also be other kinds of function.
Step S102, by present address data sequence BiWith corresponding key KiThe first operation is carried out, the first operation knot is obtained
Fruit.
In specific implementation, current data sequence B can be presetiCorresponding key Ki.First operation can be mould and add
Operation is also possible to XOR operation, can also be other kinds of operation.For example, in an embodiment of the present invention, by current number
According to sequence B3In address date and corresponding key K3It carries out mould and adds operation.
In embodiments of the present invention, the corresponding key of each data sequence may be the same or different, i.e. current number
According to sequence B3Corresponding key K3It can be with data sequence B2Corresponding key K2It is identical, it can also be different.It can be according to actual
Application scenarios select key corresponding with data sequence, are not repeated herein.
In embodiments of the present invention, after the completion of step S102 is executed, it can first judge present address data sequence BiIt is
No is highest addresses data sequence.In present address data sequence BiFor highest addresses data sequence BNWhen, execute step
S103;In present address data sequence BiWhen for non-highest addresses data sequence, step S104 is executed.
For example, the corresponding address data sequence of address bus is B4、B3、B2、B1.It is then B in present address data sequence4
When, determine that current data sequence is highest addresses data sequence, executes step S103.It is B in current data sequence3When, sentence
Determining current data sequence is non-highest addresses data sequence, executes step S104.
Step S103, in present address data sequence BiWhen for highest addresses data sequence, by the first operation knot
Fruit is input to corresponding address conversion function Fi, obtains present address data sequence BiCorresponding output address data.
In specific implementation, present address data sequence BiFor highest addresses data sequence BNWhen, it can be by the first operation
Result as BNCorresponding address conversion function FNInput.
In an embodiment of the present invention, address conversion function FNFor Sbox function.By using the result of the first operation as
The input quantity of Sbox function can obtain corresponding mapping value, as present address data sequence BNCorresponding output address number
According to BN’。
For example, present address data sequence is highest addresses data sequence B4, by address data sequence B4In number of addresses
According to corresponding key K4XOR operation is carried out, obtained operation result is input to B4In corresponding Sbox function, by what is obtained
As a result it is used as address data sequence B4Corresponding output address data B4’。
Step S104, in present address data sequence BiWhen for non-highest addresses data sequence, by the first operation result
With adjacent high address data sequence Bi+1Corresponding output data carries out the second operation.
In specific implementation, the second operation can be mould and add operation, is also possible to XOR operation, can also be other types
Operation, be not repeated herein.
In specific implementation, for example, address data sequence is followed successively by B from a high position to low level4、B3、B2、B1.In current address
Data sequence is B2When, i.e., when present address data sequence is non-highest addresses data sequence, by the first operation result and phase
Adjacent high address data sequence B3Corresponding output data carries out the second operation.
In embodiments of the present invention, adjacent high address data sequence Bi+1Corresponding output data may is that address date
Sequence Bi+1Corresponding address conversion function Fi+1Input data namely address data sequence Bi+1In data with it is corresponding close
Key Ki+1Carry out the result R after operationi+1.Address data sequence Bi+1Corresponding output data is also possible to: address data sequence
Bi+1The output data of corresponding address conversion function Fi+1.
Fig. 2 and Fig. 3 are respectively referred to, the first operation and the second operation are XOR operation.In Fig. 2, B3Corresponding output number
According to for address data sequence B3In data and corresponding key K3Carry out the result R after operation3.In Fig. 3, B3It is corresponding defeated
Data are address conversion function F out3Output data.
In embodiments of the present invention, in address data sequence Bi+1Corresponding address conversion function Fi+1Including nonlinear
Sbox function Si+1And linear P permutation function Pi+1When, P permutation function Pi+1Suitable for nonlinear Sbox function Si+1It is defeated
Linear transformation is carried out out.Address data sequence Bi+1Corresponding output data may also is that nonlinear Sbox function Pi+1It is defeated
Out.
Referring to Fig. 4, one of embodiment of the present invention address date transition diagram is given, the second operation is exclusive or fortune
It calculates, address conversion function F3Including nonlinear Sbox function S3And P permutation function P3。B3Corresponding output data are as follows: F3In
Nonlinear Sbox function S3Corresponding output data S3’。
Second operation result is input to address conversion function F by step S105i, obtain present address data sequence BiIt is corresponding
Output address data.
In embodiments of the present invention, after getting the second operation result, the second operation result can be input to and is worked as
Preceding address data sequence BiCorresponding address conversion function FiIn, pass through address conversion function FiIt is available to arrive and the second operation
As a result corresponding mapping value, the corresponding output address data of address date as in present address data sequence.
In an embodiment of the present invention, Fig. 2, Fig. 3 and Fig. 4 are respectively referred to.In Fig. 2, B3Corresponding B3'=F3(B3⊕K3),
B2Corresponding B2'=F2(B2⊕K2⊕B3⊕K3).In Fig. 3, B3Corresponding B3'=F3(B3⊕K3), the corresponding B of B22'=F2(B2⊕
K2⊕B3').In Fig. 4, B3Corresponding B3'=F3(B3⊕K3), B2Corresponding B2 '=F2(B2⊕K2⊕ S3 '), wherein S3' indicate
For S3The output data of function, Fi(X) it is expressed as address conversion function F when input variable is XiValue.
In embodiments of the present invention, the corresponding address date of all address bus can also be divided into N number of length etc.
Address data sequence.For example, address data sequence B5In include address date: A15、A14、A13;Address data sequence B4Middle packet
Include address date: A12、A11、A10、A9;Address data sequence B3In include address date: A8、A7、A6、A5;Address data sequence B2
In include: A4、A3、A2;Address data sequence B1In include address date are as follows: A1、A0。
In the above case said, due to adjacent high-order or low order address data sequence length and present address data sequence
Length etc., therefore, the operation output of adjacent high address data sequence can not be directly as present address data Sequence Operation Theory
Input.To solve the above problems, the shorter address data sequence of length can be extended to and the longer address date of length
The equal length of sequence.
For example, address data sequence B5In include address date: A15、A14、A13;Address data sequence B4In include number of addresses
According to: A12、A11、A10、A9, i.e. address data sequence B5Data sequence length be 3, address data sequence B4Data sequence length
It is 4, then by address data sequence B5In Data expansion to 4.For example, can be in address data sequence B5Highest order mend 0 or
1 is mended, it can also be in address data sequence B5Lowest order mend 0 or mend 1, or using other extended modes, be not repeated herein.
It can be seen that present address data be non-highest addresses data sequence when, by the first operation result with it is adjacent
High address data sequence Bi+1After corresponding output data carries out the second operation, the second operation result is input to address conversion
Function obtains corresponding output address data.That is, BiCorresponding output address data and Bi+1Corresponding output data
Correlation, in Bi+1When corresponding output data changes, BiCorresponding output address data accordingly changes.And in BiIt is corresponding
Output data when changing, will not be to Bi+1Output data have an impact, it may be assumed that the variations of high address data can step by step
Transmitted to low level, the corresponding output address data of low order address data influenced by high address data.Due to high address
Data are not influenced by low order address data, therefore when carrying out address conversion, and bus overturning is less, so as to reduce address
Power consumption in conversion process.
Referring to Fig. 5, the embodiment of the invention also provides address date conversion equipments 50 in a kind of address bus, comprising: the
One acquiring unit 501, the first computing unit 502, the second computing unit 503 and address conversioning unit 504, in which:
First acquisition unit 501, for obtaining the corresponding address date of all address bus, by the address date from height
Position is divided into N parts to low level, obtains N number of address data sequence, there are one-to-one addresses to turn for N number of address data sequence
Exchange the letters number;
First computing unit 502 is used for present address data sequence BiWith corresponding key KiThe first operation is carried out, is obtained
To the first operation result;
Second computing unit 503 is used for the first operation result and adjacent high address data sequence Bi+1Corresponding output
Data carry out the second operation;
Second acquisition unit 504, in present address data sequence BiIt, will be described when for highest addresses data sequence
First operation result is input to corresponding address conversion function Fi, obtain present address data sequence BiCorresponding output address number
According to;In present address data sequence BiWhen for non-highest addresses data sequence, the second operation result is input to address conversion
Function Fi, obtain present address data sequence BiCorresponding output address data.
In specific implementation, second computing unit 503 can be used for: by first operation result and an adjacent high position
The input data or output data of the corresponding address conversion function of address data sequence carry out the second operation.
In specific implementation, second computing unit 503 can be used for: corresponding in the adjacent high position data sequence
Address conversion function Fi+1Including non-linear Sbox function Si+1And linear P permutation function Pi+1When, by first operation result
With the address conversion function Fi+1In non-linear Sbox function Si+1Output data carry out the second operation.
In specific implementation, address date conversion equipment 50 can also include: expanding element in the address bus, can be with
For in present address data sequence BiLength and adjacent high address data sequence Bi+1Length it is not equal whens, by length compared with
Short address data sequence extends to the equal length with the longer address data sequence of length.
Those of ordinary skill in the art will appreciate that all or part of the steps in the various methods of above-described embodiment is can
To be completed through hardware.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (12)
1. address date conversion method in a kind of address bus characterized by comprising
The corresponding address date of all address bus is obtained, the address date is divided into N parts from a high position to low level, obtains N
A address data sequence, N number of address data sequence is there are one-to-one address conversion function, and N number of number of addresses
According to the equal length of sequence;
By present address data sequence BiWith corresponding key KiThe first operation is carried out, the first operation result is obtained;
In present address data sequence BiWhen for highest addresses data sequence, first operation result is input to corresponding
Address conversion function Fi, obtain present address data sequence BiCorresponding output address data;
In present address data sequence BiWhen for non-highest addresses data sequence, by the first operation result and adjacent high address
Data sequence Bi+1Corresponding output data carries out the second operation, and the second operation result is input to address conversion function Fi, obtain
Present address data sequence BiCorresponding output address data;It is described by first operation result and adjacent high address data
Sequence Bi+1Corresponding output data carries out the second operation, comprising: by first operation result and adjacent high address data sequence
Arrange Bi+1The input data of corresponding address conversion function carries out the second operation.
2. address date conversion method in address bus as described in claim 1, which is characterized in that described by the first operation knot
Corresponding with the adjacent high address data sequence output data of fruit carries out the second operation, comprising: will first operation result and
The output data of the corresponding address conversion function of adjacent high address data sequence carries out the second operation.
3. address date conversion method in address bus as claimed in claim 2, which is characterized in that the address conversion function
It comprises at least one of the following: linear mapping function, nonlinear mapping function.
4. address date conversion method in address bus as claimed in claim 3, which is characterized in that the linear mapping function
For P permutation function, the nonlinear mapping function is Sbox function.
5. address date conversion method in address bus as claimed in claim 4, which is characterized in that the adjacent high address
The corresponding address conversion function F of data sequencei+1Including non-linear Sbox function Si+1And linear P permutation function Pi+1, the line
Property P permutation function Pi+1Suitable for the non-linear Sbox function Si+1Output carry out linear transformation, it is described by the first operation knot
Corresponding with the adjacent high address data sequence output data of fruit carries out the second operation, comprising: will first operation result and
The address conversion function Fi+1In non-linear Sbox function Si+1Output data carry out the second operation.
6. address date conversion method in address bus as described in claim 1, which is characterized in that the second operation packet
Include: XOR operation or mould add operation.
7. address date conversion method in address bus as described in claim 1, which is characterized in that the first operation packet
Include: XOR operation or mould add operation.
8. address date conversion method in address bus as described in claim 1, which is characterized in that further include: in BiLength
With Bi+1Length it is not equal whens, the shorter address data sequence of length is extended into the length with the longer address data sequence of length
It spends equal.
9. address date conversion equipment in a kind of address bus characterized by comprising
First acquisition unit, for obtaining the corresponding address date of all address bus, by the address date from a high position to low
Position is divided into N parts, obtains N number of address data sequence, there are one-to-one address conversion letters for N number of address data sequence
Number, and the equal length of N number of address data sequence;
First computing unit is used for present address data sequence BiWith corresponding key KiThe first operation is carried out, the first fortune is obtained
Calculate result;
Second computing unit is used for first operation result and adjacent high address data sequence Bi+1Corresponding address turns
The input data of exchange the letters number carries out the second operation;
Address conversioning unit, in present address data sequence BiWhen for highest addresses data sequence, by first operation
As a result it is input to corresponding address conversion function Fi, obtain present address data sequence BiCorresponding output address data;Current
Address data sequence BiWhen for non-highest addresses data sequence, the second operation result is input to address conversion function Fi, obtain
Present address data sequence BiCorresponding output address data.
10. address date conversion equipment in address bus as claimed in claim 9, which is characterized in that described second calculates list
Member is used for: by the output data of first operation result address conversion function corresponding with adjacent high address data sequence into
The second operation of row.
11. address date conversion equipment in address bus as claimed in claim 9, which is characterized in that described second calculates list
Member is used for: in the corresponding address conversion function F of the adjacent high position data sequencei+1Including non-linear Sbox function Si+1And line
Property P permutation function Pi+1When, by first operation result and the address conversion function Fi+1In non-linear Sbox function Si+1
Output data carry out the second operation.
12. address date conversion equipment in address bus as claimed in claim 9, which is characterized in that further include: extension is single
Member, in present address data sequence BiLength and adjacent high address data sequence Bi+1Length it is not equal whens, by length
Shorter address data sequence extends to the equal length with the longer address data sequence of length.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510078896.XA CN105988942B (en) | 2015-02-13 | 2015-02-13 | Address date conversion method and device in address bus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510078896.XA CN105988942B (en) | 2015-02-13 | 2015-02-13 | Address date conversion method and device in address bus |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105988942A CN105988942A (en) | 2016-10-05 |
CN105988942B true CN105988942B (en) | 2018-12-04 |
Family
ID=57041338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510078896.XA Active CN105988942B (en) | 2015-02-13 | 2015-02-13 | Address date conversion method and device in address bus |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105988942B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107608913A (en) * | 2017-09-25 | 2018-01-19 | 郑州云海信息技术有限公司 | A kind of CPU addressing methods, device and its CPU addressing equipment used |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW508494B (en) * | 2001-03-28 | 2002-11-01 | Shansun Technology Company | Data protection device capable of self-defining address arrangement sequence in protection area of storage device |
JP2003134192A (en) * | 2001-10-23 | 2003-05-09 | Funai Electric Co Ltd | Telephone set |
CN1674492A (en) * | 2003-11-04 | 2005-09-28 | 索尼株式会社 | Information-processing apparatus, control method, program and recording medium |
CN101042682A (en) * | 2006-03-22 | 2007-09-26 | 株式会社东芝 | Access control apparatus, access control system, processor |
CN103765395A (en) * | 2011-08-29 | 2014-04-30 | 国际商业机器公司 | Device and method for converting logical address to physical address |
-
2015
- 2015-02-13 CN CN201510078896.XA patent/CN105988942B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW508494B (en) * | 2001-03-28 | 2002-11-01 | Shansun Technology Company | Data protection device capable of self-defining address arrangement sequence in protection area of storage device |
JP2003134192A (en) * | 2001-10-23 | 2003-05-09 | Funai Electric Co Ltd | Telephone set |
CN1674492A (en) * | 2003-11-04 | 2005-09-28 | 索尼株式会社 | Information-processing apparatus, control method, program and recording medium |
CN101042682A (en) * | 2006-03-22 | 2007-09-26 | 株式会社东芝 | Access control apparatus, access control system, processor |
CN103765395A (en) * | 2011-08-29 | 2014-04-30 | 国际商业机器公司 | Device and method for converting logical address to physical address |
Also Published As
Publication number | Publication date |
---|---|
CN105988942A (en) | 2016-10-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108352981B (en) | Cryptographic device arranged for computing a target block encryption | |
CN106850221B (en) | Information encryption and decryption method and device | |
US10699030B2 (en) | Determining cryptographic operation masks for improving resistance to external monitoring attacks | |
CN105940439A (en) | Countermeasures against side-channel attacks on cryptographic algorithms using permutations | |
CN101009554A (en) | A byte replacement circuit for power consumption attack prevention | |
CN105245343B (en) | A kind of online static signature system and method based on multivariable cryptographic technique | |
CN109450632B (en) | Key recovery method based on white-box block cipher CLEFIA analysis | |
CN107124264B (en) | Lightweight hash method based on affine transformation byte substitution box | |
CN108155984B (en) | Reverse engineering analysis method for cryptographic algorithm cluster based on energy analysis | |
CN105988942B (en) | Address date conversion method and device in address bus | |
Luo et al. | Cryptanalysis of a chaotic block cryptographic system against template attacks | |
Zenner | A cache timing analysis of HC-256 | |
CN107835070B (en) | Simple embedded encryption method | |
RU2708439C1 (en) | Computing device and method | |
CN109951275A (en) | Key generation method, device, computer equipment and storage medium | |
US9832014B2 (en) | Symmetrical iterated block encryption method and corresponding apparatus | |
CN105099654A (en) | Encryption and decryption method based on coupling and self-triggering cellular automata | |
CN105577362B (en) | A kind of byte replacement method and system applied to aes algorithm | |
CN201039199Y (en) | A byte replacement circuit for resisting power consumption attack | |
Wadi et al. | A low cost implementation of modified advanced encryption standard algorithm using 8085A microprocessor | |
Wang et al. | Differential power analysis attack and countermeasures on MCrypton | |
Li et al. | Digital encryption method based on lorenz continuous chaotic system | |
JP2021141458A (en) | Information processing device, information processing method, and program | |
US20150127953A1 (en) | Encoding apparatus and method | |
Yoshikawa et al. | Secret key reconstruction method using round addition DFA on lightweight block cipher LBlock |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |