CN104425457B - Testing structure and testing method for monitoring nitrogen doping quantity drifting of gate oxide layer - Google Patents
Testing structure and testing method for monitoring nitrogen doping quantity drifting of gate oxide layer Download PDFInfo
- Publication number
- CN104425457B CN104425457B CN201310413057.XA CN201310413057A CN104425457B CN 104425457 B CN104425457 B CN 104425457B CN 201310413057 A CN201310413057 A CN 201310413057A CN 104425457 B CN104425457 B CN 104425457B
- Authority
- CN
- China
- Prior art keywords
- pmos
- gate oxide
- nmos tube
- voltage
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The application discloses a testing structure and a testing method for monitoring nitrogen doping quantity drifting of a gate oxide layer. The testing structure is positioned in a wafer cutting path and comprises an amplifier, a PMOS (P-channel Metal Oxide Semiconductor) pipe with a nitrogen doped gate oxide layer, an NMOS (N-channel metal oxide semiconductor) pipe with a nitrogen doped gate oxide layer, a first resistor and a second resistor. Current/voltage difference between the PMOS pipe and the NMOS pipe is amplified and the nitrogen doping quantity drifting of the gate oxide layer on an MOS (Metal Oxide Semiconductor) pipe can be monitored in real time.
Description
Technical field
The application is related to IC manufacturing field, more particularly to a kind of test knot of monitoring gate oxide itrogen content of getter with nitrogen doped drift
Structure and method.
Background technology
At present, in the manufacturing process of semiconductor device, P-type mos（PMOS）Pipe, NMOS tube or
The CMOS complementary metal-oxide-semiconductor collectively formed by PMOS and NMOS tube（Complementary Metal-Oxide-
Semiconductor, CMOS）Pipe becomes the basic device for constituting chip.
The manufacture method of metal-oxide-semiconductor, comprises the following steps in prior art：
Step 11, in the Semiconductor substrate 100 with trap 101 sequentially form gate oxide 102 and polysilicon gate
103；
Specifically, trap injection is carried out to Semiconductor substrate 100, trap 101 is formed；Grow successively on a semiconductor substrate 100
Gate oxide and deposit polycrystalline silicon layer, subsequently in the surface coating photoresist layer of polysilicon layer（Do not show in figure）, exposure imaging
Patterning photoresist layer, defines the position of grid, with photoetching offset plate figure as mask, is sequentially etched polysilicon layer and gate oxidation
Layer, forms gate oxide 102 and polysilicon gate 103.
For PMOS transistor, trap is injected to N-type element boron fluoride（BF2）Or boron（B）If what is made is NMOS crystal
Pipe, trap is injected to p-type element phosphor（P）Or arsenic（As）.
Step 12, the polysilicon gate 103 both sides formed side wall layer 104；
Step 13, with polysilicon gate 103 and side wall layer 104 Semiconductor substrate 100 with trap 101 is carried out as mask
Ion implanting, forms source-drain electrode 105；
Wherein, because PMOS hole is used as majority carrier, so the source electrode of PMOS and drain electrode are p-type；Due to
NMOS tube electronics is used as majority carrier, so the source electrode of NMOS tube and drain electrode are N-type.
Step 14, the annealing for carrying out source-drain electrode 105.
According to foregoing description, Fig. 1 is the structural representation that prior art forms metal-oxide-semiconductor.
In order to control short-channel effect, smaller szie requirement on devices further improves gate electrode electric capacity.This can be by not
Break thinning gate oxide thickness and realize, but the thing followed is the lifting of gate electrode leakage current.Research finds, in gate oxidation
Nitrating formation silicon oxynitride in layer, i.e., the nitrating in silicon oxide layer, compared with simple silicon oxide layer, its equivalent oxide thickness
（EOT）Less, this point can improve gate electrode electric capacity just.But, according to prior art, nitrating forms nitrogen in silicon oxide
Silicon oxide, the bad control of the content of nitrogen in silicon oxynitride, and the control of the content of nitrogen bad is easy to cause semiconductor device to open
Voltage Vt changes, and the serious problems such as mobility change.
Prior art is to monitor the drift of nitrogen content, can only be online weekly（inline）Monitor once, if nitrogen content is super
Permissible range is crossed, illustrates that this batch of product falls short of specifications, but the method for this monitoring nitrogen content drift, it is impossible to and reflection in time is asked
Topic, production efficiency is than relatively low.
The content of the invention
This application discloses the test structure and method of a kind of monitoring gate oxide itrogen content of getter with nitrogen doped drift, with monitor in real time MOS
The drift of gate oxide itrogen content of getter with nitrogen doped on pipe.
The technical scheme of the application is as follows：
This application discloses a kind of test structure of monitoring gate oxide itrogen content of getter with nitrogen doped drift, the test structure is positioned at wafer
In Cutting Road, the test structure includes：Amplifier, the PMOS with nitrating gate oxide, with nitrating gate oxide
NMOS tube, first resistor and second resistance；
The amplifier, it is poor for amplifying the current/voltage between PMOS and NMOS tube, with first input end, the
Two inputs, the first outfan and the second outfan；Its first input end and the first outfan connect respectively the two of first resistor
End；Its second input and the second outfan connect respectively the two ends of second resistance；First input end connects with the source electrode of PMOS
Connect；Second input is connected with the drain electrode of NMOS tube；
The PMOS, for being input into the current/voltage of the PMOS, the PMOS in the first input end of amplifier
The drain electrode of pipe connects supply voltage；
The NMOS tube, for being input into the current/voltage of the NMOS tube, the NMOS in the second input of amplifier
The source ground of pipe.
Disclosed herein as well is a kind of method of structure control gate oxide itrogen content of getter with nitrogen doped drift tested as described above, the method
Including：
The current/voltage of PMOS and NMOS tube is input into respectively in the first input end and the second input of amplifier；
After amplified device signal amplifies, the current/voltage of PMOS and NMOS tube after being amplified is poor；
Whether permissible range is exceeded according to the current/voltage difference after the amplification, judges whether gate oxide itrogen content of getter with nitrogen doped floats
Move.
With the change of the gate oxide itrogen content of getter with nitrogen doped, the current/voltage between the PMOS and NMOS tube has phase
Anti- variation tendency.
When gate oxide itrogen content of getter with nitrogen doped is raised, the current reduction of PMOS, the electric current of NMOS tube is raised；
When gate oxide itrogen content of getter with nitrogen doped is reduced, the electric current of PMOS is raised, the current reduction of NMOS tube.
When gate oxide itrogen content of getter with nitrogen doped is raised, the voltage of PMOS is raised, and the voltage of NMOS tube is reduced；
When gate oxide itrogen content of getter with nitrogen doped is reduced, the voltage of PMOS is reduced, and the voltage of NMOS tube is raised.
By the technical scheme of the application, the PMOS with nitrating gate oxide and the NMOS with nitrating gate oxide
The current/voltage of pipe allows model after amplifier amplification, according to whether the current/voltage difference after amplification between the two exceedes
Enclose, judge whether gate oxide itrogen content of getter with nitrogen doped drifts about.This is because, with the change of gate oxide itrogen content of getter with nitrogen doped, PMOS and NMOS
Current/voltage between pipe has a contrary variation tendency, and itrogen content of getter with nitrogen doped change is bigger, and current/voltage difference is bigger, therefore just can be with
Current/voltage after monitoring is amplified between PMOS and NMOS tube is poor, and then monitors whether gate oxide itrogen content of getter with nitrogen doped drifts about.
With prior art, the method that weekly whether on-line measurement gate oxide itrogen content of getter with nitrogen doped drifts about compares, and the solution of the present invention can be real-time
Reflect the drift of gate oxide itrogen content of getter with nitrogen doped exactly, better control over the content of nitrogen in silicon oxynitride.
Description of the drawings
Fig. 1 is the structural representation that prior art forms metal-oxide-semiconductor.
Fig. 2 is the test structure schematic diagram that the embodiment of the present invention monitors the drift of gate oxide itrogen content of getter with nitrogen doped.
Specific embodiment
To make the purpose of the present invention, technical scheme and advantage become more apparent, develop simultaneously referring to the drawings embodiment,
The present invention is described in more detail.
Fig. 2 is the test structure schematic diagram that the embodiment of the present invention monitors the drift of gate oxide itrogen content of getter with nitrogen doped.The test structure position
In wafer Cutting Road, the test structure includes：Amplifier 201, the PMOS 202 with nitrating gate oxide, with nitrating
The NMOS tube 203 of gate oxide, first resistor 204 and second resistance 205；
Wherein, amplifier 201, it is poor for amplifying the current/voltage between PMOS 202 and NMOS tube 203, with first
Input, the second input, the first outfan and the second outfan；Its first input end and the first outfan connect respectively first
The two ends of resistance 204；Its second input and the second outfan connect respectively the two ends of second resistance 205；First input end with
The source electrode connection of PMOS 202；Second input is connected with the drain electrode of NMOS tube 203；
The PMOS 202, it is described for being input into the current/voltage of the PMOS in the first input end of amplifier
The drain electrode of PMOS meets supply voltage Vdd；
The NMOS tube 203, it is described for being input into the current/voltage of the NMOS tube in the second input of amplifier
The source ground Vss of NMOS tube.
Research shows, with the change of gate oxide itrogen content of getter with nitrogen doped, the current/voltage tool between the PMOS and NMOS tube
There is contrary variation tendency.Specifically, when gate oxide itrogen content of getter with nitrogen doped is raised, the current reduction of PMOS, the electric current of NMOS tube
Raise；When gate oxide itrogen content of getter with nitrogen doped is reduced, the electric current of PMOS is raised, the current reduction of NMOS tube.When gate oxide nitrating
When amount is raised, the voltage of PMOS is raised, and the voltage of NMOS tube is reduced；When gate oxide itrogen content of getter with nitrogen doped is reduced, the electricity of PMOS
Pressure drop is low, and the voltage of NMOS tube is raised.Therefore itrogen content of getter with nitrogen doped change is bigger, and current/voltage difference is bigger.So, when gate oxide is mixed
When nitrogen quantity exceedes certain limit, the current/voltage between the PMOS and NMOS tube of amplified device amplification is poor, also beyond certain model
Enclose, it is poor by electrical measurement current/voltage to therefore, it can, whether the drift of monitor in real time gate oxide itrogen content of getter with nitrogen doped exceedes is allowed
Scope.
Test structure according to Fig. 2, the method for present invention monitoring gate oxide itrogen content of getter with nitrogen doped drift, including following step
Suddenly：
Step 21, amplifier first input end and the second input be input into respectively the electric current of PMOS and NMOS tube/
Voltage；
After step 22, amplified device signal amplify, the current/voltage of PMOS and NMOS tube after being amplified is poor；
Step 23, whether permissible range is exceeded according to the current/voltage difference after the amplification, judge gate oxide itrogen content of getter with nitrogen doped
Whether drift about.
Concrete scene is set forth below, the method for the present invention is described in detail.In the embodiment of the present invention, amplifier is put
Big rate is 10, and the resistance of first resistor and second resistance is respectively 1K ohms, and supply voltage Vdd is 1.2 volts, the grid of PMOS
External voltage is 0 volt, and the grid external voltage of NMOS tube is identical with supply voltage, is 1.2 volts.
PMOS and NMOS tube are 600 milliamperes per micron through the difference between current that amplifier amplifies（mA/um）When, gate oxide
The drift of itrogen content of getter with nitrogen doped, i.e. Δ N=1.2 atoms/cubic centimetre.
Show through research, under the conditions of above-mentioned parameter, PMOS and NMOS tube are big through the difference between current that amplifier amplifies
When 200mA/um, the drift of gate oxide itrogen content of getter with nitrogen doped just exceedes permissible range, now, Δ N=0.5 atoms/cubic centimetre, and just
Need to readjust the itrogen content of getter with nitrogen doped of gate oxide, to return in permissible range.Because 600mA/um is more than 200mA/
Um, the drift for illustrating gate oxide itrogen content of getter with nitrogen doped alreadys exceed permissible range.It should be noted that different amplifiers, amplification
Difference, the magnitude for amplifying the difference between current for obtaining is also different, and this needs the amplifier according to different amplifications, arranges different electric currents
Difference permissible range.
In addition, out amplifier can be electric current, or voltage.So can directly by PMOS and NMOS tube
Through the difference between current that amplifier amplifies, or voltage difference, it is compared with permissible range.Can also according to voltage be equal to electric current with
The product of resistance, calculates respectively the voltage of PMOS and NMOS tube after amplification, and then calculates between PMOS and NMOS tube
Voltage difference after amplification.
In the above-described embodiments, the voltage difference between PMOS and NMOS tube after amplification：
The electric current * that the resistance-NMOS tube of the electric current * first resistors that PMOS is amplified through amplifier is amplified through amplifier
The resistance of second resistance.
To sum up, with the change of gate oxide itrogen content of getter with nitrogen doped, the current/voltage between PMOS and NMOS tube has contrary
Variation tendency, itrogen content of getter with nitrogen doped change is bigger, and current/voltage difference is bigger.The present invention utilizes this variation relation, is amplified by amplifier
Current/voltage between PMOS and NMOS tube is poor, carrys out the drift of gate oxide itrogen content of getter with nitrogen doped on monitor in real time metal-oxide-semiconductor.The present invention
Electric measurement method, compared to prior art, can real-time and accurately reflect the drift of gate oxide itrogen content of getter with nitrogen doped, preferably control
The content of nitrogen in silicon oxynitride processed.
The preferred embodiment of the application is the foregoing is only, not to limit the application, all essences in the application
Within god and principle, any modification, equivalent substitution and improvements done etc. should be included within the scope of the application protection.
Claims (5)
1. a kind of test structure that monitoring gate oxide itrogen content of getter with nitrogen doped drifts about, the test structure is located in wafer Cutting Road, and it is special
Levy and be, the test structure includes：Amplifier, the PMOS with nitrating gate oxide, with nitrating gate oxide
NMOS tube, first resistor and second resistance；
The amplifier, poor for amplifying the current/voltage between PMOS and NMOS tube, with first input end, second is defeated
Enter end, the first outfan and the second outfan；Its first input end and the first outfan connect respectively the two ends of first resistor；Its
Second input and the second outfan connect respectively the two ends of second resistance；First input end is connected with the source electrode of PMOS；The
Two inputs are connected with the drain electrode of NMOS tube；
The PMOS, for being input into the current/voltage of the PMOS in the first input end of amplifier, the PMOS
Drain electrode connects supply voltage；
The NMOS tube, for being input into the current/voltage of the NMOS tube in the second input of amplifier, the NMOS tube
Source ground.
2. a kind of method that the monitoring gate oxide of test structure according to claim 1 itrogen content of getter with nitrogen doped drifts about, the method includes：
The current/voltage of PMOS and NMOS tube is input into respectively in the first input end and the second input of amplifier；
After amplified device signal amplifies, the current/voltage of PMOS and NMOS tube after being amplified is poor；
Whether permissible range is exceeded according to the current/voltage difference after the amplification, judges whether gate oxide itrogen content of getter with nitrogen doped drifts about.
3. method as claimed in claim 2, it is characterised in that with the change of the gate oxide itrogen content of getter with nitrogen doped, the PMOS
Current/voltage between pipe and NMOS tube has contrary variation tendency.
4. method as claimed in claim 3, it is characterised in that when gate oxide itrogen content of getter with nitrogen doped is raised, the electric current drop of PMOS
Low, the electric current of NMOS tube is raised；
When gate oxide itrogen content of getter with nitrogen doped is reduced, the electric current of PMOS is raised, the current reduction of NMOS tube.
5. method as claimed in claim 3, it is characterised in that when gate oxide itrogen content of getter with nitrogen doped is raised, the voltage liter of PMOS
Height, the voltage of NMOS tube is reduced；
When gate oxide itrogen content of getter with nitrogen doped is reduced, the voltage of PMOS is reduced, and the voltage of NMOS tube is raised.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310413057.XA CN104425457B (en) | 2013-09-11 | 2013-09-11 | Testing structure and testing method for monitoring nitrogen doping quantity drifting of gate oxide layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310413057.XA CN104425457B (en) | 2013-09-11 | 2013-09-11 | Testing structure and testing method for monitoring nitrogen doping quantity drifting of gate oxide layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104425457A CN104425457A (en) | 2015-03-18 |
| CN104425457B true CN104425457B (en) | 2017-05-10 |
Family
ID=52974044
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310413057.XA Active CN104425457B (en) | 2013-09-11 | 2013-09-11 | Testing structure and testing method for monitoring nitrogen doping quantity drifting of gate oxide layer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104425457B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7675134B2 (en) * | 2008-04-07 | 2010-03-09 | Microchip Technology Incorporated | Temperature compensated work function based voltage reference |
| CN102024499A (en) * | 2009-09-18 | 2011-04-20 | 杭州士兰集成电路有限公司 | Readout structure and method for gate oxide breakdown type disposable programmable unit |
-
2013
- 2013-09-11 CN CN201310413057.XA patent/CN104425457B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7675134B2 (en) * | 2008-04-07 | 2010-03-09 | Microchip Technology Incorporated | Temperature compensated work function based voltage reference |
| CN102024499A (en) * | 2009-09-18 | 2011-04-20 | 杭州士兰集成电路有限公司 | Readout structure and method for gate oxide breakdown type disposable programmable unit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104425457A (en) | 2015-03-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105609541B (en) | Device and method for transceiver interface over-voltage clamping | |
| CN102301484B (en) | Asymmetric junction field effect transistor and method of manufacturing same | |
| US6653694B1 (en) | Reference voltage semiconductor | |
| US8293606B2 (en) | Body tie test structure for accurate body effect measurement | |
| CN104701318A (en) | Semiconductor integrated circuit device | |
| Acharya et al. | Drain current saturation in line tunneling-based TFETs: An analog design perspective | |
| CN103515378B (en) | Semiconductor device and structure | |
| EP1858066A2 (en) | Semiconductor devices | |
| CN104576609B (en) | A kind of test structure and method for monitoring shallow doped drain ion implantation angle skew | |
| US9564429B2 (en) | Lateral bipolar sensor with sensing signal amplification | |
| CN104425457B (en) | Testing structure and testing method for monitoring nitrogen doping quantity drifting of gate oxide layer | |
| CN205376538U (en) | Current regulator diode structure | |
| US20220384419A1 (en) | Passive electrostatic-discharge sensor and method for detecting electrostatic discharges | |
| CN205789954U (en) | A kind of semi-conductor test structure | |
| CN102969359A (en) | Independent grid controlled nano line tunneling field effect device and manufacturing method thereof | |
| CN101252131A (en) | Current mirroring circuit | |
| JP2015095525A (en) | Semiconductor circuit device manufacturing method and semiconductor circuit device | |
| CN100431095C (en) | Manufacturing method for semiconductor device | |
| CN108417536B (en) | Semiconductor structure and forming method and working method thereof | |
| US6731130B1 (en) | Method of determining gate oxide thickness of an operational MOSFET | |
| Park et al. | A study on the performance of metal-oxide-semiconductor-field-effect-transistors with asymmetric junction doping structure | |
| Bashir et al. | Charge plasma based partial-ground-plane-MOSFET on selective buried oxide (SELBOX) | |
| US7351595B2 (en) | Method for manufacturing semiconductor device | |
| CN102110652B (en) | Method for manufacturing embedded type semiconductor devices | |
| US20230403949A1 (en) | Hall effect devices integrated with junction transistors |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |