CN102969359A - Independent grid controlled nano line tunneling field effect device and manufacturing method thereof - Google Patents
Independent grid controlled nano line tunneling field effect device and manufacturing method thereof Download PDFInfo
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- CN102969359A CN102969359A CN2012105314523A CN201210531452A CN102969359A CN 102969359 A CN102969359 A CN 102969359A CN 2012105314523 A CN2012105314523 A CN 2012105314523A CN 201210531452 A CN201210531452 A CN 201210531452A CN 102969359 A CN102969359 A CN 102969359A
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Abstract
The invention relates to an independent grid controlled nano line tunneling field effect device, which is formed by a control grid electrode (2), an adjusting grid electrode (1), a source region (6), a drainage region (7), a channel region (5), an adjusting grid medium layer (3) and a control grid medium layer (4), which are in axial symmetry, wherein the adjusting grid electrode is located at the center; the channel region, and the source region and the drainage region at the two sides are separated from the adjusting grid electrode through the adjusting grid medium layer and are coaxially sleeved into the adjusting grid electrode; the total length of the channel region, the source region and the drainage region is equal to the lengths of the adjusting grid electrode and the adjusting grid medium layer; the control grid electrode and the channel region are electrically separated through a control grid medium and are coaxially sleeved into the channel region; and the lengths of the control grid electrode, the control grid medium layer and the channel region are the same. According to a transistor, the adjusting grid electrode is arranged and works under an independent grid controlled manner so that threshold value voltage can be dynamically adjusted and the circuit power consumption is reduced; and the independent grid controlled nano line tunneling field effect device can work under a co-grid condition, and the current switch ratio and the driving capability of the device are improved.
Description
Technical field
The present invention relates to the semiconductor integrated circuit device, relate in particular to a kind of nanowire tunneling fieldtron and manufacture method thereof of independent gate control.
Background technology
Along with the integrated circuit (IC)-components size constantly reduces according to Moore's Law, metal oxide semiconductor field-effect device under the conventional planar bulk silicon technological meets with the development bottlenecks such as short-channel effect and grid leakage current, is difficult to break through its theoretical limit below 32 nm technology node.The new construction device continues to bring out, and wherein, the tunneling field-effect device receives much concern because of its outstanding Sub-Threshold Characteristic and low-down leakage current.Simultaneously, as the ring gate device of non-planar surface process device, because surrounding structure entirely, its grid can provide the good characteristics such as the strongest grid-control ability processed, minimum short-channel effect and high switch current ratio.Therefore, ring gate nano line tunneling field-effect device is considered to have the potentiality of extensive use in following CMOS technology.
The substrate biasing of body silicon device and the back of the body gate bias of double-gated devices can change the threshold voltage of device, this class independent gate biased operation can be controlled threshold voltage by adding offset signal, therefore in the memory circuitry of power managed field such as low-power consumption important application is arranged.The ring gate device is because of the full encirclement structure of grid, and grid electricity is communicated with, and can from the substrate extraction electrode, generally not think and can carry out the independent gate operation.
Summary of the invention
The technical issues that need to address of the present invention are, how a kind of nanowire tunneling fieldtron of independent gate control is provided, can the dynamic adjustments threshold voltage, have simultaneously more high driving ability and lower technological requirement.
Technical problem of the present invention solves like this: makes up a kind of nanowire tunneling fieldtron of independent gate control, formed by control grid electrode, adjusting gate electrode, source region, drain region, channel region, control gate dielectric layer and adjusting gate dielectric layer, become axial symmetry, wherein:
Described adjusting gate electrode is positioned at the center;
The described source region of described channel region and both sides thereof and drain region and described adjusting gate electrode are by the isolation of described adjusting gate dielectric layer electricity, and a coaxial complete set enters described adjusting gate electrode; The total length in described channel region, described source region and drain region all equates with the length of described adjusting gate dielectric layer and adjusting gate electrode;
Described control grid electrode and described channel region are by the isolation of described control gate medium electricity, and a coaxial complete set enters described channel region; The length of described control grid electrode, control gate medium and channel region all equates.
According to nanowire tunneling field-effect transistor provided by the invention, the material of described channel region is for undoping or doping content is 1 * 10
11Cm
-3～5 * 10
17Cm
-3Semi-conducting material; The material in described source region and drain region is that doping content is 5 * 10
18Cm
-3～2 * 10
21Cm
-3Semi-conducting material, the doping type in described source region and drain region is different, all is that the P type mixes or a kind of in mixing of N-type.
According to nanowire tunneling field-effect transistor provided by the invention, the material of described channel region is that phosphorus or arsenic doping concn are 1 * 10
17Cm
-3Silicon materials; The material in described source region is that boron doping concentration is 1 * 10
20Cm
-3Silicon materials, the drain region material is that phosphorus or arsenic doping concn are 5 * 10
18Cm
-3Silicon materials.Material and the work function of regulating gate electrode and control grid electrode are adjustable.The diameter of regulating gate electrode is adjustable, and general control is at ten more than the nanometer.It is adjustable to regulate gate dielectric material and thickness, and as adopting silica material, thickness remains 1.2 to 2 nanometers.The channel region semiconductor material thickness can be according to the channel length regulation of device.Control gate dielectric material and thickness are adjustable, are the silica material of 1.2 to 2 nanometers as adopting thickness.The thickness of control grid electrode is adjustable, generally also is controlled at five more than the nanometer.
According to nanowire tunneling field-effect transistor provided by the invention, the thickness of described source region, drain region and channel region is balanced consistent.
According to nanowire tunneling field-effect transistor provided by the invention, outside thickness increases progressively from the centre for described source region and drain region, the intersection consistency of thickness of the thickness of described source region and drain region and described channel region intersection and described channel region, the thickness away from channel region increases like this, i.e. the lifting source drain region.
According to nanowire tunneling field-effect transistor provided by the invention, described adjusting gate dielectric layer and control gate dielectric area are insulating layer of silicon oxide or high-K material (hafnium hafnium element is the material on basis).
According to nanowire tunneling field-effect transistor provided by the invention, the diameter of described adjusting gate electrode is 8～15 nanometers; As: 8,10,15;
The thickness of described adjusting gate dielectric layer is 1.2～2 nanometers; As: 1.2,1.5,2;
The thickness of described control grid electrode is 5～20 nanometers; As: 5,8,16,20;
The thickness of described control gate dielectric layer is 1.2～2 nanometers; As: 1.2,1.5,2;
The thickness of described channel region is 3～10 nanometers, as: 3,4,5,10.
According to nanowire tunneling field-effect transistor provided by the invention, the length of described adjusting gate electrode is 75～110 nanometers;
The length of described channel region is 15～50 nanometers;
The length in described source region is 30 nanometers;
The length in described drain region is 30 nanometers.
The nanowire tunneling fieldtron of independent gate control provided by the invention has disconnected gate electrode on two electricity: regulate gate electrode and control grid electrode.Compare with the ring grid tunneling device of routine, this structure devices allows to apply different operating voltages with control grid electrode regulating gate electrode, thereby device is operated under the independent grid-control condition, for the circuit application of device facilitates.When this independent gate nanowire tunneling device is operated in independent grid-control condition lower time, do not change device and mix and dimensional parameters, change the current-voltage characteristic that the bias voltage of regulating gate electrode will change device.To improve the threshold voltage of control gate such as bias voltage that reduce to regulate gate electrode, reduce the drive current of whole device.This result provides a kind of selection scheme for circuit design such as the memory cell circuits design of low-power consumption.When the nanowire tunneling device of this independent gate control is operated in common grizzly bar spare lower time, compare with the routine ring gate nano line tunneling device with identical raceway groove radius and the dual-grate tunneling device of identical raceway groove sectional area, can keep effectively improving ON state current in the close situation of off-state current, thereby improve the current on/off ratio of device, the driving force of enhance device.The nanowire tunneling device performance optimization that the present invention controls for the permission independent gate, circuit application etc. provide an alternative.
Description of drawings
Further the present invention is described in detail below in conjunction with the drawings and specific embodiments:
Fig. 1 is the nanowire tunneling fieldtron schematic cross-section of independent gate control provided by the invention.
Fig. 2 is that the nanowire tunneling device of independent gate control shown in Figure 1 is regulated gate electrode to the impact of drain terminal current characteristics.
Fig. 3 is the adjusting relation of nanowire tunneling fieldtron control gate threshold voltage and the modulated gate electrode of sub-threshold slope of independent gate control shown in Figure 1.
Fig. 4 is the adjusting relation of nanowire tunneling fieldtron ON state current, off-state current and the modulated gate electrode of current on/off ratio of independent gate control shown in Figure 1.
Fig. 5 is the nanowire tunneling fieldtron maximum transconductance of independent gate control shown in Figure 1 and leaks the adjusting relation that potential barrier reduces the modulated gate electrode of effect that causes.
Fig. 6 be the nanowire tunneling fieldtron of independent gate shown in Figure 1 control under common grid operation with the comparison of the drain terminal current characteristics of corresponding conventional nanowire tunneling device and dual-grate tunneling device.
Fig. 7 is that the nanowire tunneling fieldtron of independent gate shown in Figure 1 control is in common grid operation threshold voltages and the sub-threshold slope drift relation with channel length.
Fig. 8 be the nanowire tunneling fieldtron of independent gate shown in Figure 1 control under common grid operation ON state current, off-state current and current on/off ratio with the variation relation of channel length.
Fig. 9 is that nanowire tunneling fieldtron maximum transconductance under common grid operation of independent gate control shown in Figure 1 causes potential barrier reduction effect with the variation relation of channel length with leaking.
Embodiment
See also shown in Figure 1ly, in the present embodiment, the nanowire tunneling fieldtron of described independent gate control is by regulating gate electrode 1, control grid electrode 2 is regulated gate medium district 3, control gate dielectric area 4, channel region 5, source region 6 and drain region 7 form, and each parts becomes coaxial-symmetrical.Control grid electrode 2 complete sets are outside the channel region 5 of device.Regulating gate electrode 1 draws by source region 6 and drain region 7.
In the first execution mode, described channel region 5 two ends are source region 6 and the drain region 7 of different materials; Described channel region 5 is low-doped.
In the second execution mode, described channel region 5 two ends are source region 6 and the drain region 7 of same material; Wherein: source region 6 is p-type heavily doped silicon material, and drain region 7 is the N-shaped doped silicon material, and channel region 5 is N-shaped lightly-doped silicon material.
This device can be prepared according to existing method, and preparation flow is summarized as follows:
1) in the circular silicon nitride hard mask of silicon wafer, SF6 etches the polycrystalline silicon post; 1000～1200 ℃ of oxidations of high temperature, with the volume ratio of water be that 1: 25 HF aqueous corrosion dwindles the silicon column dimension and regulates grid diameters (8～15 nanometer) to setting;
2) high-temperature oxydation forms the structure of the adjusting gate medium encirclement polysilicon pillar of setting thickness (1.2～2 nanometer);
3) epitaxy technique is made channel structure, 1000～1200 ℃ of oxidations of high temperature, with the volume ratio of water be that 1: 25 HF aqueous corrosion reduces channel region thickness and reaches set point (3～10 nanometer);
4) heat growth control gate medium oxide layer is to setting thickness (1.2～2 nanometer);
5) depositing technics is finished the preparation (thickness 5～20 nanometers) of control gate structure;
6) 120 °～150 ° boron that inject 1 * 1020cm-2/10keV, and in 900 ℃/10s～1100 ℃/10s annealing preparation source region;
7) 120 °～150 ° phosphorus that inject 5 * 1018cm-2/10keV, and in 900 ℃/10s～1100 ℃/10s annealing preparation drain region;
8) standard CMOS process is finished the metal electrode preparation;
9) make the nanowire tunneling fieldtron that independent gate is controlled.
The present invention is further elaborated below in conjunction with specific embodiment, but the present invention is not limited to following examples.
Nanowire tunneling fieldtron and the Performance Detection thereof of embodiment 1, independent gate control
The structure of the nanowire tunneling fieldtron of this independent gate control as shown in Figure 1, wherein, the work function of regulating gate electrode 1 and control grid electrode 2 materials is made as 4.1 electronvolt; Regulating gate medium 3 and control gate medium 4 is the silicon oxide layer of thickness 1.5 nanometers, and channel region 5 is phosphorus doping density 1 * 10
17Cm
-3Silicon materials, thickness is 5 nanometers; Source region 6 is that boron doping concentration is 1 * 10
20Cm
-3Silicon materials; Drain region 7 is that phosphorus doping density is 5 * 10
18Cm
-3Silicon materials; Regulating the grid radius is 5 nanometers.The source region of device and the length in drain region are 30 nanometers.Source-drain area thickness equals channel region thickness and surrounds and regulate gate electrode.
The performance of nanowire tunneling fieldtron under independent gate control and the grid-control system of being total to the long independent gate control of 40 nanometer grid compares analysis, and gained is shown in Fig. 2-6.
See also shown in Figure 2ly, bias voltage that increase to regulate gate electrode can reduce the threshold voltage of control gate, and the ON state current of device is increased, off-state current increase after the experience definite value, and amplitude of variation is higher than ON state current, and the sub-threshold slope of device is degenerated.Reduce the bias voltage of regulating gate electrode and be biased under the condition of zero-bias and even back bias voltage to regulating gate electrode, can improve the threshold voltage of control gate, when reducing ON state current, also reduced off-state current to minimum value.Be reduced to 0V such as the bias voltage of regulating gate electrode from 0.6V, the device off-state current has reduced by 3 orders of magnitude, and ON state current has only reduced by 2 times.And regulate gate bias voltage when continuing to descend, and off-state current keeps minimum value constant, and threshold voltage increases, and ON state current descends simultaneously, can be used for the low consumption circuit design and carries out the adjusting of drive current.
See also shown in Figure 3ly, can see more significantly, regulate the gate bias voltage bias voltage and be reduced to-2V from 0.8V, the threshold voltage of control gate is brought up to 0.9V from 0.2V, and the change of threshold voltage clearly.Dotted line among the figure is parallel with regulating the gate electrode voltage change curve with threshold voltage, and slope is 0.245.This slope has reflected regulates gate voltage to the adjusting sensitivity of threshold voltage variation, also is directly perceived an embodiment of regulating grid and control grid electrode stiffness of coupling.This factor of the nanowire tunneling fieldtron of the independent gate control that we propose is higher than this parameter under conventional double-gated devices and the operation of conventional ring gate nano line device independent gate, and it is higher to the adjusting sensitivity of its threshold voltage to illustrate that the nanowire tunneling device is regulated grid.As seen from Figure 3, positive adjusting gate bias voltage can make the switching characteristic of device degenerate the very fast rising of the sub-threshold slope of device.Regulate the switching characteristic that gate bias voltage to back bias voltage can be improved device and reduce, so that the sub-threshold slope of device transfer curve point of departure remains on following and lasting reduction of 55mV/dec.
See also shown in Figure 4ly, device is regulated gate bias voltage and is increased to 0.8V from-2V, and ON state current continues to increase, and increases altogether to surpass 2 orders of magnitude; Off-state current reduces first rear increase, and maintains about 10 between-1V to 0.2V
-15The minimum value of A.Therefore, the switch current ratio first increases and then decreases of device, and have comparatively desirable switching characteristic in time between the-1V to 0.2V regulating gate bias voltage.
See also shown in Figure 5ly, device is regulated gate bias voltage and is increased to 0.8V from-2V, and maximum transconductance continues to increase, and increases approximately 2 orders of magnitude; Leakage causes potential barrier and reduces effect along with the adjusting gate voltage reduces and reduces, and is tending towards about 0.2V and often is worth when regulating gate voltage less than 0V.
See also shown in Figure 6, the nanowire tunneling device of independent gate control compares with the current-voltage characteristic of conventional ring gate nano line tunneling device and dual-grate tunneling device, wherein, for guaranteeing the contrast fairness, compare with the former and to have identical raceway groove radius, the former fills the independent gate part of corresponding independent grid-control nanowire tunneling device with dielectric material oxidation silicon; Compare with the latter and to have identical conducting channel sectional area.As can be seen from Figure 6, three kinds of devices have close off-state current, simultaneously, when playing in working order device that stronger tunnelling occurs, regulate the introducing of grid so that in fact there are two tunnelling zones in the raceway groove, tunnelling all occurs near grid and the control gate and produce tunnelling current regulating, so the independent gate drive current of controlling the nanowire tunneling device is about 4 times of common ring grid tunnelling nano wire, also greater than the dual-grate tunneling nano wire ON state current of correspondence.As seen independent gate nanowire tunneling device has further increased current on/off ratio on the basis of ring grid tunneling device, has improved the switching characteristic of device.
Based on the above results, the nanowire tunneling device of independent gate control has been obtained maximum grid-control ability processed, the device performance that obtains is better than common ring gate nano line tunneling device and dual-grate tunneling device, the potentiality that have behind 32 nanometers and the following technology node thereof performance to use in device dimensions shrink.This device works in the device property that dwindles with channel length under the common grizzly bar spare and provides in Fig. 7-9.
See also shown in Figure 7ly, threshold voltage and the sub-threshold slope of the independent grid-control nanowire tunneling device of proposition are drifted about with changes in channel length.Threshold voltage reduces with device channel length and reduces, and the drift value of threshold voltage is 0.25V after channel length narrows down to 15 nanometers from 50 nanometers; Sub-threshold slope reduces with device channel length and subtracts afterwards first and increase, channel length be 20 nanometers when above all in 50mV/dec.
See also shown in Figure 8ly, independent grid-control nanowire tunneling device ON state current reduces with channel length and increases, and has increased from 50 nanometers to 15 nanometer ON state current to surpass an order of magnitude.Off-state current rises during less than 20 nanometer to some extent in device channel length.Therefore, the devices switch current ratio reduces to present with channel length and increases first the trend that subtracts afterwards, all keeps comparatively desirable switching characteristic more than 20 nanometers.
See also shown in Figure 9ly, the maximum transconductance of independent grid-control nanowire tunneling device increases with channel length is less, reaches 3.3 little Siemens when channel length is 15 nanometer.Leakage causes potential barrier and reduces effect and reduce with channel length and be tending towards about 0.2V and often be worth, and drift value is less.
Based on the above results, the threshold voltage shift, sub-threshold slope drift, switch current ratio, the leakage that consider device cause potential barrier and reduce the characteristics such as effect and maximum transconductance, independent grid-control nanowire tunneling device can advance channel length to narrow down to 20 nanometers and keep more satisfactory device performance with 5 nano silicon film thickness, and is expected to further be advanced to 15 nanometers and following.
The nanowire tunneling fieldtron of independent gate control provided by the invention can provide the operation of independent gate, thereby provides a kind of selection scheme for the nanowire tunneling device is used for the low consumption circuit design.Compare with the dual-grate tunneling device with corresponding common ring gate nano line tunneling field-effect device simultaneously, the independent gate device can provide higher drive current in the situation that keeps close off-state current, thereby improves current on/off ratio, improves the devices switch characteristic.Under certain designs nargin required, this independent grid-control nanowire tunneling fieldtron can narrow down to 20 nanometers and following with device grid length with 5 nano silicon film thickness, and keeps more satisfactory device performance.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim scope of the present invention change and modify, and all should belong to the covering scope of claim of the present invention.
Claims (10)
1. the nanowire tunneling fieldtron of independent gate control, it is characterized in that, formed by control grid electrode (2), adjusting gate electrode (1), source region (6), drain region (7), channel region (5), adjusting gate dielectric layer (3) and control gate dielectric layer (4), become axial symmetry, wherein:
Described adjusting gate electrode is positioned at the center;
The described source region (6) of described channel region (5) and both sides thereof and drain region (7) isolate by described adjusting gate dielectric layer (3) electricity with described adjusting gate electrode (1), and a coaxial complete set enters described adjusting gate electrode (1); The total length in described channel region, described source region and drain region all equates with the length of described adjusting gate dielectric layer and adjusting gate electrode;
Described control grid electrode (2) is isolated by described control gate medium (6) electricity with described channel region (5), and a coaxial complete set enters described channel region (5); The length of described control grid electrode, control gate medium and channel region all equates.
2. described nanowire tunneling field-effect transistor according to claim 1 is characterized in that, the material of described channel region is for undoping or doping content is 1 * 10
11Cm
-3～5 * 10
17Cm
-3Semi-conducting material; The material in described source region and drain region is that doping content is 5 * 10
18Cm
-3～2 * 10
21Cm
-3Semi-conducting material, the doping type in described source region and drain region is different, for the P type mixes or a kind of in mixing of N-type.
3. described nanowire tunneling field-effect transistor according to claim 2 is characterized in that the material of described channel region is that phosphorus or arsenic doping concn are 1 * 10
17Cm
-3Silicon materials; The material in described source region is that boron doping concentration is 1 * 10
20Cm
-3Silicon materials, the drain region material is that phosphorus or arsenic doping concn are 5 * 10
18Cm
-3Silicon materials.
4. described nanowire tunneling field-effect transistor according to claim 2 is characterized in that, the thickness of described source region (6), drain region (7) and channel region (5) is balanced consistent.
5. described nanowire tunneling field-effect transistor according to claim 2, it is characterized in that, outside thickness increases progressively from the centre for described source region (6) and drain region (7), described source region (6) and drain region (7) and the thickness of described channel region (5) intersection and the intersection consistency of thickness of described channel region (5).
6. described nanowire tunneling field-effect transistor according to claim 1 is characterized in that, the thickness of described source region (6), drain region (7) and channel region (5) is balanced consistent.
7. described nanowire tunneling field-effect transistor according to claim 1, it is characterized in that, outside thickness increases progressively from the centre for described source region (6) and drain region (7), described source region (6) and drain region (7) and the thickness of described channel region (5) intersection and the intersection consistency of thickness of described channel region (5).
8. described nano-wire field effect transistor according to claim 1 is characterized in that described adjusting gate dielectric layer (3) and control gate dielectric area (6) are insulating layer of silicon oxide or high-K material.
9. arbitrary described nanowire tunneling field-effect transistor is characterized in that according to claim 1-8,
The diameter of described adjusting gate electrode is 8～15 nanometers;
The thickness of described adjusting gate dielectric layer is 1.2～2 nanometers;
The thickness of described control grid electrode is 5～20 nanometers;
The thickness of described control gate dielectric layer is 1.2～2 nanometers;
The thickness of described channel region is 3～10 nanometers.
10. described nanowire tunneling field-effect transistor according to claim 9 is characterized in that,
The length of described adjusting gate electrode (1) is 75～110 nanometers;
The length of described channel region (5) is 15～50 nanometers;
The length in described source region (6) is 30 nanometers;
The length in described drain region (7) is 30 nanometers.
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| CN103474459A (en) * | 2013-09-06 | 2013-12-25 | 北京大学深圳研究生院 | Tunneling field effect transistor |
| CN104576723A (en) * | 2015-01-22 | 2015-04-29 | 湘潭大学 | N type tunneling field effect transistor with high on-state current and manufacturing method of N type tunneling field effect transistor |
| CN108305877A (en) * | 2017-01-13 | 2018-07-20 | 上海新昇半导体科技有限公司 | Grid are without knot NAND gate flash memories and preparation method thereof after a kind of |
| CN110797408A (en) * | 2019-10-28 | 2020-02-14 | 北京大学深圳研究院 | Dynamic threshold tunneling field effect double-gate device |
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| CN101944539A (en) * | 2009-07-09 | 2011-01-12 | 北京大学 | Independent grid-controlled nano line field effect transistor |
| US20110180814A1 (en) * | 2009-04-10 | 2011-07-28 | Sumitomo Electric Industries, Ltd. | Insulated gate field effect transistor |
| US20120223361A1 (en) * | 2011-03-01 | 2012-09-06 | Ru Huang | Low-power consumption tunneling field-effect transistor with finger-shaped gate structure |
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| CN101740619A (en) * | 2008-11-13 | 2010-06-16 | 北京大学 | Nano-wire field effect transistor |
| US20110180814A1 (en) * | 2009-04-10 | 2011-07-28 | Sumitomo Electric Industries, Ltd. | Insulated gate field effect transistor |
| CN101944539A (en) * | 2009-07-09 | 2011-01-12 | 北京大学 | Independent grid-controlled nano line field effect transistor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103474459A (en) * | 2013-09-06 | 2013-12-25 | 北京大学深圳研究生院 | Tunneling field effect transistor |
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| CN104576723A (en) * | 2015-01-22 | 2015-04-29 | 湘潭大学 | N type tunneling field effect transistor with high on-state current and manufacturing method of N type tunneling field effect transistor |
| CN104576723B (en) * | 2015-01-22 | 2017-09-12 | 湘潭大学 | A kind of N-type tunneling field-effect transistor with high ON state current |
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| CN108305877B (en) * | 2017-01-13 | 2020-09-25 | 上海新昇半导体科技有限公司 | Back gate non-junction NAND flash memory and manufacturing method thereof |
| CN110797408A (en) * | 2019-10-28 | 2020-02-14 | 北京大学深圳研究院 | Dynamic threshold tunneling field effect double-gate device |
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Application publication date: 20130313 |