CN102110652B - Method for manufacturing embedded type semiconductor devices - Google Patents

Method for manufacturing embedded type semiconductor devices Download PDF

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Publication number
CN102110652B
CN102110652B CN 200910247207 CN200910247207A CN102110652B CN 102110652 B CN102110652 B CN 102110652B CN 200910247207 CN200910247207 CN 200910247207 CN 200910247207 A CN200910247207 A CN 200910247207A CN 102110652 B CN102110652 B CN 102110652B
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type semiconductor
semiconductor device
low
pipe
power consumption
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CN102110652A (en
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居建华
神兆旭
王文博
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Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Abstract

The invention discloses a method for manufacturing embedded type semiconductor devices. The method is characterized in that: in low-power semiconductor devices, grids of NMOS (N-channel metal oxide semiconductor) transistors and grids of PMOS (P-channel metal oxide semiconductor) transistors are greater than the preset width; the grids of the NMOS transistors and the grids of the PMOS transistors in low-power semiconductor devices are predoped with grids of NMOS transistors and grids of PMOS transistors in conventional semiconductor devices; in the low-power semiconductor devices, the dose of injected LDDs(light-doped drains) of the NMOS transistors and the PMOS transistors is smaller than preset dose; and stress memory process is adopted for generating tensile stress in channels below the grids of the NMOS transistors and the PMOS transistors in both the low-power semiconductor devices and the conventional semiconductor devices. With the method, the manufacture of the conventional semiconductor devices and the low-power semiconductor devices is completed in the same manufacture process and on the same wafer simultaneously, so that the manufacture process of the semiconductor devices is reduced.

Description

The manufacture method of embedded type semiconductor devices
Technical field
The present invention relates to semiconductor technology, particularly a kind of manufacture method of embedded type semiconductor devices.
Background technology
Semiconductor device generally includes two types, and a kind of is low-power consumption (low power) type semiconductor device, and another kind is conventional (generic) type semiconductor device.Wherein, low-power consumption type semiconductor device needs larger driving voltage, for example 1.1 volts to 1.3 volts, and saturation current is smaller, for example, the saturation current of the P-type mos of low-power consumption type semiconductor device (PMOS) pipe is about 260 to 300 microamperes of every square microns, and the saturation current of N-type metal-oxide semiconductor (MOS) (NMOS) pipe of low-power consumption type semiconductor device is about 550 to 600 microamperes of every square microns.With respect to low-power consumption type semiconductor device, the driving voltage that the needs of conventional type semiconductor device are less, 0.9 to 1.1 volt of volt for example, and saturation current is larger, for example, the saturation current of the PMOS pipe of conventional type semiconductor device is about 350 to 400 microamperes of every square microns, and the saturation current of the NMOS pipe of conventional type semiconductor device is about 750 to 800 microamperes of every square microns.Wherein, need to prove that no matter for low-power consumption type semiconductor device and conventional type semiconductor device, the saturation current of NMOS pipe is all greater than the saturation current of PMOS pipe.In addition, the electric current when saturation current is the work of semiconductor device also claims operating current.
In traditional semiconductor fabrication process, low-power consumption type semiconductor device, is therefore made respectively, and is made on the different wafers because technological requirement is different with the conventional type semiconductor device.The below describes the manufacture method of low-power consumption type semiconductor device of the prior art and conventional type semiconductor device respectively.
Fig. 1 is the flow chart of the manufacture method of low-power consumption type semiconductor device in the prior art, and as shown in Figure 1, the method mainly comprises:
Step 101 provides a wafer, is formed for isolating shallow channel isolation area (STI), N trap and the P trap of active area in the substrate of wafer.
At first, by techniques such as photoetching and etchings, in substrate, be formed for isolating the STI of active area.
Then, adopt two trap ion implantation technologies to define the NMOS pipe of low-power consumption type semiconductor device and the active area of PMOS pipe, thereby obtain P trap and the N trap of low-power consumption type semiconductor device.
Step 102, at substrate surface growth gate oxide, and depositing polysilicon, utilize the techniques such as photoetching and etching above the P trap, to form the polysilicon gate construction of the NMOS pipe of low-power consumption type semiconductor device, above the N trap, form the polysilicon gate construction of the PMOS pipe of low-power consumption type semiconductor device.
At first, carry out the growth of gate oxide, need to prove, in order to reduce grid leakage current, compare with the conventional type semiconductor device, the Thickness Ratio of the gate oxide of low-power consumption type semiconductor device is larger, is generally 14 to 18 dusts.
Then, by chemical vapor deposition (CVD) technique, at crystal column surface deposit one deck polysilicon; Afterwards, by techniques such as photoetching and etchings, produce the NMOS pipe of low-power consumption type semiconductor device and the polysilicon gate construction of PMOS pipe.
Polysilicon gate construction of the present invention comprises the polysilicon gate that is made of polysilicon and is positioned at the gate oxide of polysilicon gate below.
So far, finished the making of polysilicon gate construction of the PMOS pipe of the NMOS pipe of low-power consumption type semiconductor device and low-power consumption type semiconductor device.
Step 103 is mixed in advance to the polysilicon gate of the NMOS pipe of low-power consumption type semiconductor device.
For low-power consumption type semiconductor device, the saturation current of NMOS pipe is larger than the saturation current of PMOS pipe, therefore, usually adopts the method for mixing to reduce the electrical thickness of the grid of NMOS pipe, reaches the purpose of the saturation current that increases the NMOS pipe with this.
Step 104 is at the silicon nitride (Si of substrate surface deposit 6 to 10 nanometers 3N 4), and adopt dry etch process that silicon nitride is carried out etching, in the both sides formation inside wall of the polysilicon gate construction of the NMOS of low-power consumption type semiconductor device pipe and PMOS pipe.
Inside wall can be used for controlling follow-up carry out lightly doped drain (LDD) inject after after the annealed diffusion of ion with the overlapping degree of gate oxide, thereby effectively controlled leakage current between the drain-source utmost point.
Step 105, the substrate in the polysilicon gate construction both sides of the NMOS of low-power consumption type semiconductor device pipe and PMOS pipe carries out the LDD injection respectively.
Before LDD injects, need at first utilize lithographic definition to go out and to carry out the zone that LDD injects; Then, utilize dopant material to carry out LDD and inject, thereby make the upper surface of substrate become amorphous state, large quality materials and surface amorphously help to form shallow junction.
Step 106 is at substrate surface successively deposit silicon dioxide (SiO 2) and silicon nitride, and adopt dry etch process that silicon dioxide and silicon nitride are carried out etching, form the NMOS pipe of low-power consumption type semiconductor device and the external wall of PMOS pipe in the inside wall both sides.
Wherein, external wall comprises the first side wall and the second side wall, and the first side wall is to be silicon dioxide after the etching, and the second side wall is the silicon nitride after the etching.
Step 107, the substrate in the outer routine wall both sides of the NMOS of low-power consumption type semiconductor device pipe carries out Implantation, thereby forms drain electrode and the source electrode of the NMOS pipe of low-power consumption type semiconductor device; Substrate in the external wall both sides of the PMOS of low-power consumption type semiconductor device pipe carries out Implantation, thereby forms drain electrode and the source electrode of the PMOS pipe of low-power consumption type semiconductor device.
So far, the NMOS pipe of low-power consumption type semiconductor device and the drain electrode of PMOS pipe, the making of source electrode have been finished.
This flow process finishes.
Fig. 2 is the flow chart of the manufacture method of conventional type semiconductor device in the prior art.As shown in Figure 2, the method mainly comprises:
Step 201 provides a wafer, is formed for isolating STI, N trap and the P trap of active area in the substrate of wafer.
Step 201 is identical with the content of step 101, but the corresponding contents of refer step 101.
Step 202, at substrate surface growth gate oxide, and depositing polysilicon, utilize the techniques such as photoetching and etching above the P trap, to form the polysilicon gate construction of the NMOS pipe of conventional type semiconductor device, above the N trap, form the polysilicon gate construction of the PMOS pipe of conventional type semiconductor device.
At first, carry out the growth of gate oxide, need to prove, because the conventional type semiconductor device is larger to the tolerance of leakage current, it can bear relatively large leakage current, compare with low-power consumption type semiconductor device, the thickness of the gate oxide of conventional type semiconductor device is smaller, is generally 8 to 12 dusts.
Secondly, the formation method of the polysilicon gate construction of conventional type semiconductor device is identical with the formation method of the polysilicon gate construction of low-power consumption type semiconductor device, but corresponding content in the refer step 102.
So far, finished the making of the polysilicon gate construction of the NMOS pipe of conventional type semiconductor device and PMOS pipe.
Step 203 is mixed respectively in advance to the polysilicon gate of the PMOS pipe of the NMOS of conventional type semiconductor device pipe and conventional type semiconductor device.
Because the NMOS of conventional type semiconductor device pipe and PMOS pipe require to have larger saturation current, therefore, need respectively the polysilicon gate of PMOS pipe and the polysilicon gate of NMOS pipe to be mixed, reduce the electrical thickness of the grid of PMOS pipe and NMOS pipe with this, so that the standby larger saturation current of the NMOS of conventional type semiconductor device pipe and PMOS pipe.
Step 204, the substrate in the polysilicon gate construction both sides of the NMOS of conventional type semiconductor device pipe and PMOS pipe carries out the LDD injection respectively.
Step 204 is identical with the content of step 105, but the corresponding contents of refer step 105.
Step 205 at substrate surface successively deposit silicon dioxide and silicon nitride, and adopts dry etch process that silicon dioxide and silicon nitride are carried out etching, at the external wall of the both sides formation of the polysilicon gate construction of the NMOS of conventional type semiconductor device pipe and PMOS pipe.
Wherein, external wall comprises the first side wall and the second side wall, and the first case wall is to be silicon dioxide after the etching, and the second side wall is the silicon nitride after the etching.
Need to prove, for the conventional type semiconductor device, do not need to carry out the making of inside wall, this is because the conventional type semiconductor device is larger to the tolerance of leakage current, thereby does not need to reduce by the making of inside wall the size of leakage current.
Step 206, the substrate in the external wall both sides of the NMOS of conventional type semiconductor device pipe carries out Implantation, thereby forms drain electrode and the source electrode of the NMOS pipe of conventional type semiconductor device; Substrate in the external wall both sides of the PMOS of conventional type semiconductor device pipe carries out Implantation, thereby forms drain electrode and the source electrode of the PMOS pipe of conventional type semiconductor device.
Step 206 is identical with the content of step 107.
So far, the drain electrode of the PMOS pipe of the NMOS pipe of conventional type semiconductor device and low-power consumption type semiconductor device, the making of source electrode have been finished.
Step 207 adopts stress memory technique to produce tensile stress in raceway groove.
When in the raceway groove in [100] crystal orientation, producing tensile stress, can increase the mobility of electronics, and smaller on the mobility impact in hole; When in raceway groove, producing compression, can increase hole mobility, reduce the mobility of electronics.And the charge carrier of NMOS pipe is electronics, and the charge carrier of PMOS pipe is the hole.For the conventional type semiconductor device, the saturation current requirement of the NMOS pipe of conventional type semiconductor device is far longer than the saturation current of the PMOS pipe of conventional type semiconductor device, therefore, adopt stress memory technique in raceway groove, to form tensile stress, thereby increase the mobility of electronics, increase the saturation current of the NMOS pipe of conventional type semiconductor device.
Because saturation current is directly proportional with the mobility of charge carrier, the concentration of charge carrier, therefore adopt stress memory technique to increase the mobility of charge carrier in the raceway groove of NMOS pipe, increase saturation current, thereby satisfied the larger saturation current of the NMOS pipe of conventional type semiconductor device.
In addition, the principle of stress memory technique is deposit tensile stress film on the polysilicon gate of semiconductor device, silicon nitride film for example, thereby in raceway groove, introduce tensile stress by high annealing, improved the mobility of electronics, simultaneously, the sedimentary condition of tensile stress film is determining the size of the tensile stress that produces, need to prove, because the tensile stress film produces tensile stress only, and do not produce compression, therefore, for [100] crystal orientation raceway groove, in the mobility that has increased electronics, can't reduce the mobility in hole.
This flow process finishes.
To sum up, the manufacture method of low-power consumption type semiconductor device and conventional type semiconductor device is simply summed up.
The making of low-power consumption type semiconductor device has following characteristics: the first, and in order to reduce the leakage current of grid, the Thickness Ratio of the gate oxide of low-power consumption type semiconductor device is larger; Second; Both sides at the polysilicon gate construction of the NMOS of low-power consumption type semiconductor device pipe and PMOS pipe form inside wall, are used for controlling the leakage current between the drain-source utmost point; The 3rd, compare with the saturation current of the PMOS pipe of low-power consumption type semiconductor device, the NMOS pipe of low-power consumption type semiconductor device needs larger saturation current, therefore behind the grid of the NMOS pipe that forms low-power consumption type semiconductor device, polysilicon gate to the NMOS pipe of low-power consumption type semiconductor device mixes in advance, thereby reduce the electrical thickness of grid, increase saturation current.
The making of conventional type semiconductor device has following characteristics: first, the conventional type semiconductor device is larger to the tolerance of leakage current, therefore, compare with the thickness of the gate oxide of low-power consumption type semiconductor device, the thickness of the gate oxide of conventional type semiconductor device is smaller; Second, the NMOS pipe of conventional type semiconductor device and the saturation current of PMOS pipe are larger, therefore the NMOS pipe of conventional type semiconductor device and the polysilicon gate of PMOS pipe are all mixed in advance, thereby reduce the electrical thickness of the grid of NMOS pipe and PMOS pipe, the increase saturation current; The 3rd, adopt stress memory technique to increase the mobility of electronics, thereby increased the saturation current of NMOS pipe.
As seen, in the prior art, because there is difference in the manufacture method of low-power consumption type semiconductor device and conventional type semiconductor device, therefore normally on different wafers, respectively low-power consumption type semiconductor device and conventional type semiconductor device are made, make the flow process more complicated.
Summary of the invention
In view of this, the invention provides a kind of manufacture method of embedded type semiconductor devices, simplified the making flow process of semiconductor device.
For solving the problems of the technologies described above, technical scheme of the present invention is achieved in that
A kind of manufacture method of embedded type semiconductor devices, the method comprises:
One wafer is provided, in the substrate of wafer, be formed for isolating the shallow channel isolation area STI of active area, and in active area, form respectively the gate oxide of P-type mos PMOS pipe of N-type metal-oxide semiconductor (MOS) NMOS pipe, the low-power consumption type semiconductor device of low-power consumption type semiconductor device according to the predetermined thickness of the gate oxide of low-power consumption type semiconductor device, form respectively the gate oxide of PMOS pipe of NMOS pipe, the conventional type semiconductor device of conventional type semiconductor device according to the predetermined thickness of the gate oxide of conventional type semiconductor device;
The NMOS that forms respectively low-power consumption type semiconductor device on gate oxide manages, the PMOS of low-power consumption type semiconductor device manages, the NMOS of conventional type semiconductor device manages and the grid of the PMOS pipe of conventional type semiconductor device, wherein, the gate pmos of the NMOS of low-power consumption type semiconductor device pipe and low-power consumption type semiconductor device is greatly in preset width;
Mixed in advance in the grid of the PMOS pipe of the NMOS pipe of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device, conventional type semiconductor device and conventional type semiconductor device respectively;
Substrate in the grid both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device carries out lightly doped drain LDD and injects respectively, wherein, the dosage of the LDD injection of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe and low-power consumption type semiconductor device is less than predetermined close;
PMOS at the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device manages, the NMOS of conventional type semiconductor device manages and the grid both sides of the PMOS pipe of conventional type semiconductor device form respectively external wall;
Carry out Implantation in the Semiconductor substrate of the external wall both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device respectively, form drain electrode and the source electrode of the PMOS pipe of the NMOS pipe of PMOS pipe, conventional type semiconductor device of NMOS pipe, the low-power consumption type semiconductor device of low-power consumption type semiconductor device and conventional type semiconductor device;
Adopt in the raceway groove of stress memory technique below the grid of the PMOS pipe of the NMOS pipe of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device, conventional type semiconductor device and conventional type semiconductor device and produce tensile stress.
The NMOS pipe of described low-power consumption type semiconductor device and the gate pmos of low-power consumption type semiconductor device are greatly in 10 to 20 nanometers of preset width.
The dosage that the LDD of the NMOS pipe of described low-power consumption type semiconductor device and the PMOS pipe of low-power consumption type semiconductor device injects is less than 5% to 10% of predetermined close.
As seen, in the present invention, adopt same making flow process on same wafer, to finish simultaneously the making of conventional type semiconductor device and low-power consumption type semiconductor device, can simplify the making flow process of semiconductor device.
Description of drawings
Fig. 1 is the flow chart of the manufacture method of low-power consumption type semiconductor device in the prior art.
Fig. 2 is the flow chart of the manufacture method of conventional type semiconductor device in the prior art.
Fig. 3 is the flow chart of the manufacture method of a kind of embedded type semiconductor devices provided by the present invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, referring to the accompanying drawing embodiment that develops simultaneously, scheme of the present invention is described in further detail.
Fig. 3 is the flow chart of the manufacture method of a kind of embedded type semiconductor devices provided by the present invention.As shown in Figure 3, the method may further comprise the steps:
Step 301, one wafer is provided, in the substrate of wafer, be formed for isolating the STI of active area, and in active area, form respectively the gate oxide of PMOS pipe of NMOS pipe, the low-power consumption type semiconductor device of low-power consumption type semiconductor device according to the predetermined thickness of the gate oxide of low-power consumption type semiconductor device, form respectively the gate oxide of PMOS pipe of NMOS pipe, the conventional type semiconductor device of conventional type semiconductor device according to the predetermined thickness of the gate oxide of conventional type semiconductor device.
Because the variable thickness of the gate oxide of low-power consumption type semiconductor device and the gate oxide of conventional type semiconductor device causes, therefore, usually adopt following methods when forming the gate oxide of low-power consumption type semiconductor device and conventional type semiconductor device: at first the predetermined thickness according to the gate oxide of low-power consumption type semiconductor device carries out the growth of gate oxide, the predetermined thickness that might as well suppose the gate oxide of low-power consumption type semiconductor device is a, the predetermined thickness of the gate oxide of conventional type semiconductor device is b, then apply mask, be that the gate oxide of a all etches away with the thickness in conventional type semiconductor device zone, growth thickness is the gate oxide of b in conventional type semiconductor device zone.
Certainly, also can adopt other method respectively at the gate oxide of low-power consumption type semiconductor device zone formation thickness a, form the gate oxide of thickness b in conventional type semiconductor device zone.
Step 302, the NMOS that forms respectively low-power consumption type semiconductor device on gate oxide manages, the PMOS of low-power consumption type semiconductor device manages, the NMOS of conventional type semiconductor device manages and the grid of the PMOS pipe of conventional type semiconductor device, wherein, the gate pmos of the NMOS of low-power consumption type semiconductor device pipe and low-power consumption type semiconductor device is greatly in 10 to 20 nanometers of preset width.
Because the developed width of the grid of low-power consumption type semiconductor device is greater than preset width, therefore, can reach the purpose that reduces leakage current between the drain-source utmost point, like this, in subsequent step, just omitted the step of making inside wall for low-power consumption type semiconductor device, consistent with the making flow process of conventional type semiconductor device.
Grid width increases, be equivalent to increase electric capacity, reduced the response speed of semiconductor device, because low-power consumption type semiconductor device is usually lower to the requirement of response speed, therefore the width that increases the grid of low-power consumption type semiconductor device can not impact the use of device, in addition, and in this step, do not increase the width of the grid of conventional type semiconductor device, satisfied the quick response requirement of conventional type semiconductor device.
Step 303 is mixed in advance to the polysilicon gate of the PMOS pipe of the NMOS pipe of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device, conventional type semiconductor device and conventional type semiconductor device respectively.
In the prior art, the NMOS pipe of low-power consumption type semiconductor device, the NMOS pipe of conventional type semiconductor device and the PMOS pipe of conventional type semiconductor device have been carried out pre-doping, and in this step, be equivalent to the PMOS pipe of low-power consumption type semiconductor device has been carried out extra pre-doping.
The extra pre-doping that the PMOS pipe of low-power consumption type semiconductor device is carried out can reduce the electrical thickness of grid of the PMOS pipe of low-power consumption type semiconductor device, so just increased the saturation current of the PMOS pipe of low-power consumption type semiconductor device, so that the PMOS of low-power consumption type semiconductor device guarantees adequate food and electric current departs from desired value, therefore, in subsequent step, carried out corresponding adjustment, but the respective description in the refer step 304.
Step 304, substrate in the grid both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device carries out LDD and injects respectively, wherein, the dosage of the LDD injection of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe and low-power consumption type semiconductor device is less than predetermined close about 5% to 10%.
Described predetermined close is that the dosage of LDD in the prior art is identical, the dosage of the LDD that namely adopts in the step 105.
The dosage that the LDD of the NMOS pipe of reduction low-power consumption type semiconductor device and the PMOS pipe of low-power consumption type semiconductor device injects, then reduced the concentration of charge carrier of the PMOS pipe of the NMOS pipe of low-power consumption type semiconductor device and low-power consumption type semiconductor device, compared with prior art, the saturation current of the NMOS pipe of low-power consumption type semiconductor device and the PMOS pipe of low-power consumption type semiconductor device reduces to some extent, like this, PMOS pipe for low-power consumption type semiconductor device, compensated the defective of the saturation current of the PMOS pipe that has increased low-power consumption type semiconductor device in the step 303, but the NMOS pipe for low-power consumption type semiconductor device, it is the saturation current that does not need deliberately to reduce the NMOS pipe of low-power consumption type semiconductor device, therefore, in subsequent step, carried out corresponding compensation, but the respective description in the refer step 307.
Step 305 forms respectively external wall in the grid both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device.
In this step, the manufacturing of inside wall need be do not carried out, the manufacturing of external wall can be carried out with reference to method of the prior art.
Step 306, carry out Implantation in the Semiconductor substrate of the external wall both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device respectively, form drain electrode and the source electrode of the PMOS pipe of the NMOS pipe of PMOS pipe, conventional type semiconductor device of NMOS pipe, the low-power consumption type semiconductor device of low-power consumption type semiconductor device and conventional type semiconductor device.
Step 306 is same as the prior art, and it will not go into details herein.
Step 307 adopts in the raceway groove of stress memory technique below the grid of the PMOS pipe of the NMOS pipe of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device, conventional type semiconductor device and conventional type semiconductor device and produces tensile stress.
In this step, in raceway groove, introduce tensile stress, thereby increased the mobility of electronics, increased the saturation current of NMOS pipe, and do not affected the saturation current of PMOS pipe.
So far, this flow process finishes.
As seen, in the present invention, the manufacture method of conventional type semiconductor device of the prior art and low-power consumption type semiconductor device is merged.Specifically, at first, in active area, form respectively the NMOS pipe of low-power consumption type semiconductor device according to the predetermined thickness of the gate oxide of low-power consumption type semiconductor device, the gate oxide of the PMOS pipe of low-power consumption type semiconductor device, form respectively the NMOS pipe of conventional type semiconductor device according to the predetermined thickness of the gate oxide of conventional type semiconductor device, the gate oxide of the PMOS pipe of conventional type semiconductor device, secondly, on gate oxide, form respectively the NMOS pipe of low-power consumption type semiconductor device, the PMOS pipe of low-power consumption type semiconductor device, the grid of the NMOS pipe of conventional type semiconductor device and the PMOS pipe of conventional type semiconductor device, wherein, the NMOS pipe of low-power consumption type semiconductor device and the gate pmos of low-power consumption type semiconductor device are greatly in preset width, then, respectively the NMOS of low-power consumption type semiconductor device managed, the PMOS pipe of low-power consumption type semiconductor device, the polysilicon gate of the NMOS pipe of conventional type semiconductor device and the PMOS pipe of conventional type semiconductor device mixes in advance, then, respectively at the NMOS of low-power consumption type semiconductor device pipe, the PMOS pipe of low-power consumption type semiconductor device, carrying out LDD on the substrate of the grid both sides of the NMOS pipe of conventional type semiconductor device and the PMOS pipe of conventional type semiconductor device injects, wherein, the dosage that the LDD of the NMOS pipe of low-power consumption type semiconductor device and the PMOS pipe of low-power consumption type semiconductor device injects is less than predetermined close, then, at the NMOS of low-power consumption type semiconductor device pipe, the PMOS pipe of low-power consumption type semiconductor device, the grid both sides of the NMOS pipe of conventional type semiconductor device and the PMOS pipe of conventional type semiconductor device form respectively external wall, carry out Implantation in the Semiconductor substrate of the external wall both sides of NMOS pipe and PMOS pipe respectively, form drain electrode and the source electrode of NMOS pipe and PMOS pipe, at last, adopt stress memory technique at the NMOS of low-power consumption type semiconductor device pipe, the PMOS pipe of low-power consumption type semiconductor device, produce tensile stress in the raceway groove of the grid below of the NMOS pipe of conventional type semiconductor device and the PMOS pipe of conventional type semiconductor device.
Like this, adopt same making flow process on same wafer, to finish simultaneously the making of conventional type semiconductor device and low-power consumption type semiconductor device, be equivalent in the making of conventional type semiconductor device, embed the making of low-power consumption type semiconductor device, or in the making of low-power consumption type semiconductor device, embedded the making of conventional type semiconductor device, simplified the making flow process of semiconductor device.
The above is preferred embodiment of the present invention only, is not for limiting protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (1)

1. the manufacture method of an embedded type semiconductor devices, the method comprises:
One wafer is provided, in the substrate of wafer, be formed for isolating the shallow channel isolation area STI of active area, and in active area, form respectively the gate oxide of P-type mos PMOS pipe of N-type metal-oxide semiconductor (MOS) NMOS pipe, the low-power consumption type semiconductor device of low-power consumption type semiconductor device according to the predetermined thickness of the gate oxide of low-power consumption type semiconductor device, form respectively the gate oxide of PMOS pipe of NMOS pipe, the conventional type semiconductor device of conventional type semiconductor device according to the predetermined thickness of the gate oxide of conventional type semiconductor device;
The NMOS that forms respectively low-power consumption type semiconductor device on gate oxide manages, the PMOS of low-power consumption type semiconductor device manages, the NMOS of conventional type semiconductor device manages and the grid of the PMOS pipe of conventional type semiconductor device, wherein, the gate pmos of the NMOS of low-power consumption type semiconductor device pipe and low-power consumption type semiconductor device is greatly in 10 to 20 nanometers of preset width;
Mixed in advance in the grid of the PMOS pipe of the NMOS pipe of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device, conventional type semiconductor device and conventional type semiconductor device respectively;
Substrate in the grid both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device carries out lightly doped drain LDD and injects respectively, wherein, the dosage of the LDD injection of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe and low-power consumption type semiconductor device is less than 5% to 10% of predetermined close;
PMOS at the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device manages, the NMOS of conventional type semiconductor device manages and the grid both sides of the PMOS pipe of conventional type semiconductor device form respectively external wall;
Carry out Implantation in the Semiconductor substrate of the external wall both sides of the PMOS pipe of the NMOS pipe of the PMOS of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device pipe, conventional type semiconductor device and conventional type semiconductor device respectively, form drain electrode and the source electrode of the PMOS pipe of the NMOS pipe of PMOS pipe, conventional type semiconductor device of NMOS pipe, the low-power consumption type semiconductor device of low-power consumption type semiconductor device and conventional type semiconductor device;
Adopt in the raceway groove of stress memory technique below the grid of the PMOS pipe of the NMOS pipe of the PMOS pipe of the NMOS of low-power consumption type semiconductor device pipe, low-power consumption type semiconductor device, conventional type semiconductor device and conventional type semiconductor device and produce tensile stress.
CN 200910247207 2009-12-24 2009-12-24 Method for manufacturing embedded type semiconductor devices Expired - Fee Related CN102110652B (en)

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CN104425383B (en) * 2013-09-09 2017-07-11 中芯国际集成电路制造(上海)有限公司 The preparation method of semiconductor devices

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