CN104408002A - Serial port master-slave communication control system and method - Google Patents
Serial port master-slave communication control system and method Download PDFInfo
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- CN104408002A CN104408002A CN201410738224.2A CN201410738224A CN104408002A CN 104408002 A CN104408002 A CN 104408002A CN 201410738224 A CN201410738224 A CN 201410738224A CN 104408002 A CN104408002 A CN 104408002A
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- 238000004891 communication Methods 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000005540 biological transmission Effects 0.000 claims description 20
- 238000010586 diagram Methods 0.000 description 7
- 230000009471 action Effects 0.000 description 6
- 230000008859 change Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 2
- 230000000875 corresponding effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000013440 design planning Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/3625—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a time dependent access
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
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Abstract
The invention provides a serial port master-slave communication control system and method to be used for solving the problems that, in the prior art, a master-slave communication structure is complex and the number of serial ports is limited. A main control card counts according to the clock period when sends a control signal to an auxiliary card and stops counting when the number achieves a preset coded value, generates into a coded pulse signal according to the clock period of the coded value and the main control card and sends a debugging serial port signal and a control signal after coding in a time-sharing multiplex mode through a serial port, the auxiliary card receives the debugging serial port signal and the control signal after coding sent by the main control card and decodes the control signal after receives the control signal to gate or close the serial port of the corresponding channel.
Description
Technical field
The present invention relates to the communications field, particularly relate to a kind of serial ports master-slave communication control system and method.
Background technology
Serial technology is a very ripe low-speed communication interface, and in current high density High Speed System, it still widely uses in a lot of intelligent ALARA Principle chip, irreplaceable.In the large scale systems such as communication facilities, often can adopt a main control card, how from the design of card, support multiple from card, these are various from Card Type, can add flexibly or remove.Adopt the mode of shared back panel or cable to be connected from card and the connection of main control card more, from card and master control interface signal usually except service signal interface, also can reserve power supply, management, and debugging interface; Along with intelligentized more and more higher, have multiple intelligent chip have serial ports from card, serial ports can provide order and the information displaying of bottom, and these serial ports need to be connected to main control card, for debugging, and the use of diagnosis or communication.
In this case, usual main control card is connected with serial ports between card and has two kinds of modes:
Scheme one, as shown in Figure 1, master control and from the connection adopting point-to-point between card, enters FPGA (the Field-Programmable Gate Array master control borad from clamping, field programmable gate array), wherein communicated on a road by the direct gating of master control borad.
Scheme two, as shown in Figure 2, slave is directly hung on same group of serial bus, and main control card is communicated with slave by extra communication interface, determines whether take or discharge serial bus again from card.
But all there is certain problem in above-mentioned two schemes.
For scheme one, main control card and a lot of from connecting line between card, add the complexity of back plate design, and configure dumb, Liao Ji road serial ports reserved by backboard just can only connect several serial ports, and the serial ports quantity that each block can pick out from card is fixing.
For scheme two, backboard needs planning control bus interface type and budget to draw serial ports quantity from card, main control card and more from control signal between card, back plate design complexity increases, configure dumb, each block is also fixing from the serial ports quantity that card can pick out, intelligent very inconvenient for system.
For above-mentioned several method Problems existing, need that to develop between a kind of principal and subordinate's board multi-serial communication back plate design simple badly, way to manage is flexible, to the low serial ports master-slave communication method applied widely of software dependence.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of serial ports master-slave communication control system and method, complicated for solving serial ports master-slave communication mechanism in prior art, the problem that serial ports quantity is restricted.
For achieving the above object and other relevant objects, the invention provides a kind of serial ports master-slave communication control system, comprising: main control card, for sending debug serial port signal and encoded control signal in a time-multiplexed manner by serial ports;
At least one from card, be connected with described main control card by serial ports, and be with frequency clock with described main control card, for receiving the transmission debug serial port signal of described main control card transmission and encoded control signal, and carried out when receiving described control signal decoding with gating or the serial ports of closing respective channel.
Preferably, described main control card comprises: code registers, for storing at least one encoded radio; Pulse width generator, for described main control card to described transmit control signal from card time according to counting the clock period, until stop counting when reaching described encoded radio, and generate a coded pulse signal according to the clock period of described encoded radio and described main control card; Outlet selector, for exporting described debug serial port signal or coded pulse signal; CPU control module, exports described debug serial port signal or coded pulse signal in a time-multiplexed manner for controlling described outlet selector, and for described transmit control signal from card time described pulse width generator is reset to count it.
Preferably, describedly to comprise from card: pulsewidth counter, starting counting according to the clock period during for coded pulse signal that described main control card exports being detected, until stop counting when receiving the debug serial port signal that described main control card sends, and described count results being exported; Code translator, for receiving described count results and decoding the decode value obtained according to the described clock period; Strobe Controller, for the decode value gating that decodes according to described code translator or the serial ports of closing respective channel.
Preferably, described system also comprises a backboard, for connecting described main control card and at least one serial ports between card.
The present invention also provides a kind of serial ports master-slave communication control method, described control method be applied to comprise main control card and at least one from card composition serial communication framework, described main control card and the described clock from card are with frequency clock, described main control card sends debug serial port signal and control signal to described from card by serial ports, comprising: make described main control card send debug serial port signal and encoded control signal in a time-multiplexed manner by serial ports; Order is described receives the debug serial port signal of described main control card transmission and encoded control signal from clamping, and decodes when receiving described control signal, with gating or the serial ports of closing respective channel.
Preferably, the step that described main control card sends encoded control signal comprises: described main control card to described transmit control signal from card time according to counting the clock period, until reach one preset encoded radio time stop counting, and generate a coded pulse signal according to the clock period of described encoded radio and described main control card.
Preferably, describedly receive encoded control signal and the step of being carried out decoding comprises from clamping: according to counting the clock period during for coded pulse signal that described main control card exports being detected, until stop counting when receiving the debug serial port signal of described main control card transmission, and described count results is exported; Decode according to described count results and according to the described clock period and obtain a decode value.
As mentioned above, serial ports master-slave communication control system of the present invention and method, have following beneficial effect:
1, core bus is extremely simple, and design planning is simple, is easy to upgrading;
2, the serial ports quantity of each line card support is flexible, and configuration intelligence is convenient;
3, do not need CPU to participate in from card, intelligent requirements is low;
4, logic is simple, with low cost.
Accompanying drawing explanation
Fig. 1 is shown as the structural representation of scheme one of the prior art.
Fig. 2 is shown as the structural representation of scheme two of the prior art.
Fig. 3 is shown as the structural representation of serial ports master-slave communication control system of the present invention.
Fig. 4 is shown as the main control card structural representation of serial ports master-slave communication control system of the present invention.
Fig. 5 be shown as serial ports master-slave communication control system of the present invention from card structure schematic diagram.
Fig. 6 is shown as the workflow schematic diagram of serial ports master-slave communication control method of the present invention.
Fig. 7 is shown as the main card workflow schematic diagram of serial ports master-slave communication control method of the present invention.
Fig. 8 be shown as serial ports master-slave communication control method of the present invention from card workflow schematic diagram
Element numbers explanation
2 serial ports master-slave communication control system
21 main control cards
22 backboards
23 from card
211 code registers
212 pulse width generator
213 outlet selectors
214 CPU control modules
215 master control serial ports
216 RS232 transceivers
217 main control card high-frequency clocks
231 pulsewidth counters
232 code translators
233 Strobe Controllers
234 from card high-frequency clock
S1-S2 step
S11-S17 step
S21-S28 step
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this instructions can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this instructions also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.It should be noted that, when not conflicting, the feature in following examples and embodiment can combine mutually.
It should be noted that, the diagram provided in following examples only illustrates basic conception of the present invention in a schematic way, then only the assembly relevant with the present invention is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
Refer to Fig. 3-5, the invention provides a kind of serial ports master-slave communication control system, complicated for solving serial ports master-slave communication mechanism in prior art, the problem that serial ports quantity is restricted.To principle and the embodiment of a kind of serial ports master-slave communication control system of the present invention be elaborated below, and make those skilled in the art not need creative work can understand a kind of serial ports master-slave communication control system of the present invention.
Below in conjunction with embodiment and accompanying drawing, the present invention is described in detail.In specific embodiment, as pulse width detection can be logical one, also can be logical zero.
The present embodiment provides a kind of serial ports master-slave communication control system, refers to Fig. 3, and be shown as serial ports master-slave communication control system configuration diagram of the present invention, described serial ports master-slave communication control system 2 comprises: main control card 21, at least one from card 23.
Described main control card 21, for sending debug serial port signal and encoded control signal in a time-multiplexed manner by serial ports.Refer to Fig. 4, the structure of main control card 21 is comprise: code registers 211, for storing at least one encoded radio; Pulse width generator 212, for described main control card to described transmit control signal from card time according to main control card high-frequency clock 217 clock period counting, until stop counting when reaching described encoded radio, and generate a coded pulse signal according to the clock period of described encoded radio and described main control card; Outlet selector 213, for exporting debug serial port signal that master control serial ports 215 generated by RS232 transceiver 216 or the coded pulse signal that pulse width generator 212 generates; CPU control module 214, export described transmission debug serial port signal or coded pulse signal in a time-multiplexed manner for controlling described outlet selector, and for described transmit control signal from card time described pulse width generator is reset to count it.CPU control module 214 arranges code registers 211 according to action command waiting for transmission, wherein, action command waiting for transmission for gating or can close the serial ports of certain road from card, pulse width generator 212 generates coded pulse signal according to the correlative coding of code registers, and CPU control module 214 controls outlet selector 213 and exports debug serial port signal or coded pulse signal.In the present embodiment, for the serial ports of gating from card m, the course of work of main control card 21 is, first, the value of code registers is set to m, configuration outlet selector 213 makes BP_TXD export from FPGA, value is 0, pulse width generator 212 is reset, again BP_TXD value is set to 1, pulse width generator 212 starts the number of counting high speed clock, and whether compare pulse width generator 212 equal with the value of code registers 211, when the clock number that pulse width generator 212 counts is m, BP_TXD value is set to 0, pulse width generator 212 is made to stop counting, by outlet selector 213 output encoder pulse signal.In the gap of output action instruction, main control card 21 exports debug serial port signal under the instruction of CPU control module 214.
Described from card 23, be connected with described main control card 21 by serial ports, and be with frequency clock with described main control card 21, for receiving the debug serial port signal of described main control card 21 transmission and encoded control signal, and carried out when receiving described control signal decoding with gating or the serial ports of closing respective channel.Refer to Fig. 5, the described structure from card 23 is, comprise: pulsewidth counter 231, for counting according to from the clock period of card high-frequency clock 234 when the coded pulse signal that described main control card 21 exports being detected, until stop counting when receiving the debug serial port signal of described main control card 21 transmission, and described count results is exported; Code translator 232, obtains a decode value for a described count results received and the decoding of described clock period; Strobe Controller 233, for the decode value gating that decodes according to described code translator 232 or the serial ports of closing respective channel.From the signal that card 23 is exported by pulsewidth counter 231 continuous reception main control card 21, decoded to the received signal by code translator 232 afterwards, draw decode value, Strobe Controller 233 is according to decode value gating or the serial ports of closing respective channel, in the present embodiment, from the course of work of card 23 be, first the signal of main control card 21 output is received from card 23, detect the rising edge of BP_TXD along time, pulsewidth counts 231 devices and resets, pulsewidth counter 231 starts counting, detect the trailing edge of BP_TXD along time, pulsewidth counter 231 stops counting, code translator is decoded to the pulse signal that 232 pulsewidth counters 231 receive, obtain pulsewidth count results m, Strobe Controller 233 is according to the serial ports of pulsewidth technical result m gating from card m.Accordingly, if the result decoded is serial data, automatically skip over.
In addition, serial ports master-slave communication control system 2 also comprises a backboard 22, for connecting described main control card 21 and at least one serial ports between card 23, in the present embodiment, backboard serial bus uses LVCMOS logic level signal, all connects together from card transmission signal, and when not being strobed from card, its transmission interface is set to high resistant and exports.
The present invention also provides a kind of serial ports master-slave communication control method, be applied to comprise main control card and at least one from card composition serial communication framework, described main control card and the described clock from card are with frequency clock, and described main control card sends debug serial port signal and control signal to described from card by serial ports.Refer to Fig. 6, be shown as a kind of embodiment process flow diagram of serial ports master-slave communication control method of the present invention, in the present embodiment, for main control card formation logic " 1 " coded pulse, described serial ports master-slave communication control method comprises the following steps:
S1, described main control card is made to send debug serial port signal and encoded control signal in a time-multiplexed manner by serial ports.Described main control card to described transmit control signal from card time according to counting the clock period, until reach one preset encoded radio time stop counting, and generate a coded pulse signal according to the clock period of described encoded radio and described main control card.
The flow process of described main control card work as shown in Figure 7, comprises the following steps:
S11, code registers is set; CPU control module arranges code registers according to action command waiting for transmission, wherein, action command waiting for transmission for gating or can close certain serial ports, in the present embodiment, action command waiting for transmission is set to the serial ports of gating from card m, the value of code registers is set to m;
S12, configuration outlet selector make BP_TXD export from FPGA, and value is 0;
S13, pulse width generator reset;
S14, BP_TXD value is set to 1, pulse width generator starts the number of counting high speed clock;
S15, whether with the value of code registers equal, when equal, enter next step if comparing pulse width generator, time unequal, continue counting; In the present embodiment, when the value of pulse width generator is m, enter next step;
S16, BP_TXD value is set to 0, makes pulse width generator stop counting, suppose that the high-frequency clock cycle is T, then a generation pulsewidth is the coded pulse signal of m*T;
S17, export described coded pulse signal or serial data;
Receive the debug serial port signal of described main control card transmission and encoded control signal from clamping described in S2, order, and carried out when receiving described control signal decoding with gating or the serial ports of closing respective channel.Starting counting when described main control card output encoder pulse signal being detected according to the clock period, until stop counting when receiving the debug serial port signal of described main control card transmission, and described count results being exported; Obtain a decode value according to the described count results received and the decoding of described clock period, and then perform corresponding instruction.
The described flow process from card work as shown in Figure 8, comprises the following steps:
S21, the signal exported from clamping receipts main control card, detect the rising edge edge of BP_TXD
S22, pulsewidth counter O reset;
S23, pulsewidth counter start counting;
S24, detect BP_TXD trailing edge along time;
S25, pulsewidth counter stop counting;
S26, decoding pulsewidth counter, according to the signal decoded, export corresponding action command, gating serial ports proceeds to S27, closes certain serial ports, proceeds to S28, if what decode is AccessPort data, then returns S21; In the present embodiment, the signal decoded is the serial ports of gating from card m;
S27, gating road serial ports;
S28, close certain road serial ports.
Serial ports master-slave communication control system of the present invention and method, back plate design is simple, and way to manage is flexible, low to software dependence, applied widely.
In sum, the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (7)
1. a serial ports master-slave communication control system, is characterized in that, comprising:
Main control card, for sending debug serial port signal and encoded control signal in a time-multiplexed manner by serial ports;
At least one from card, be connected with described main control card by serial ports, and be with frequency clock with described main control card, for receiving the debug serial port signal of described main control card transmission and encoded control signal, and carried out when receiving described control signal decoding with gating or the serial ports of closing respective channel.
2. serial ports master-slave communication control system according to claim 1, it is characterized in that, described main control card comprises:
Code registers, for storing at least one encoded radio;
Pulse width generator, for described main control card to described transmit control signal from card time according to counting the clock period, until stop counting when reaching described encoded radio, and generate a coded pulse signal according to the clock period of described encoded radio and described main control card;
Outlet selector, for exporting described debug serial port signal or coded pulse signal;
CPU control module, exports described debug serial port signal or coded pulse signal in a time-multiplexed manner for controlling described outlet selector, and for described pulse width generator being reset so that it starts counting when transmitting control signal.
3. serial ports master-slave communication control system according to claim 2, is characterized in that, describedly comprises from card:
Pulsewidth counter, for when the coded pulse signal that described main control card exports being detected, starts counting according to the clock period, until stop counting when receiving the debug serial port signal of described main control card transmission, and described count results is exported;
Code translator, for receiving described count results and decoding the decode value obtained according to the described clock period;
Strobe Controller, for the decode value gating that decodes according to described code translator or the serial ports of closing respective channel.
4. serial ports master-slave communication control system according to claim 1, is characterized in that: also comprise a backboard, for connecting described main control card and at least one serial ports between card.
5. a serial ports master-slave communication control method, be applied to comprise main control card and at least one from card composition serial communication framework, described main control card and the described clock from card are with frequency clock, described main control card sends debug serial port signal and control signal to described from card by serial ports, it is characterized in that, described control method comprises:
Described main control card is made to send debug serial port signal and encoded control signal in a time-multiplexed manner by serial ports;
Order is described receives the debug serial port signal of described main control card transmission and encoded control signal from clamping, and is carried out decoding with gating or the serial ports of closing respective channel after receiving described control signal.
6. serial ports master-slave communication control method according to claim 5, it is characterized in that, the step that described main control card sends encoded control signal comprises:
Described main control card to described transmit control signal from card time according to counting the clock period, until reach one preset encoded radio time stop counting, and generate a coded pulse signal according to the clock period of described encoded radio and described main control card.
7. serial ports master-slave communication control method according to claim 6, is characterized in that, describedly receives encoded control signal and the step of being carried out decoding comprises from clamping:
Starting counting when the coded pulse signal that described main control card exports being detected according to the clock period, until stop counting when receiving the debug serial port signal of described main control card transmission, and described count results being exported;
A decode value is obtained according to the described count results received and clock period decoding.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410738224.2A CN104408002B (en) | 2014-12-05 | 2014-12-05 | Serial ports master-slave communication control system and method |
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| CN201410738224.2A CN104408002B (en) | 2014-12-05 | 2014-12-05 | Serial ports master-slave communication control system and method |
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| CN104408002A true CN104408002A (en) | 2015-03-11 |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104993921A (en) * | 2015-07-08 | 2015-10-21 | 上海斐讯数据通信技术有限公司 | Communication channel gating method of serial port master-slave communication control system |
| CN105589818A (en) * | 2015-07-17 | 2016-05-18 | 杭州华三通信技术有限公司 | Electronic device and access control method for same |
| CN106569973A (en) * | 2016-10-25 | 2017-04-19 | 深圳市科陆精密仪器有限公司 | Serial peripheral interface multiplexing method and communication system |
| CN107861903A (en) * | 2017-11-06 | 2018-03-30 | 郑州云海信息技术有限公司 | A kind of embedded board and its serial communication circuit |
| CN110941585A (en) * | 2019-11-26 | 2020-03-31 | 国核自仪系统工程有限公司 | Data processing system based on FPGA |
| CN112416843A (en) * | 2020-11-16 | 2021-02-26 | 北京锐安科技有限公司 | Backboard communication equipment, control method thereof and storage medium |
| CN113641613A (en) * | 2021-08-17 | 2021-11-12 | 西安易朴通讯技术有限公司 | Backboard, hard disk pool, server and communication method |
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| CN101436170A (en) * | 2007-11-12 | 2009-05-20 | 鸿富锦精密工业（深圳）有限公司 | SPI equipment communication circuit |
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| CN2896369Y (en) * | 2005-11-09 | 2007-05-02 | 兆日科技（深圳）有限公司 | Data switch-over circuit between multi-channel IC card and one-channel serial port |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104993921A (en) * | 2015-07-08 | 2015-10-21 | 上海斐讯数据通信技术有限公司 | Communication channel gating method of serial port master-slave communication control system |
| CN104993921B (en) * | 2015-07-08 | 2018-04-10 | 上海斐讯数据通信技术有限公司 | A kind of communication port gating method of serial ports master-slave communication control system |
| CN105589818A (en) * | 2015-07-17 | 2016-05-18 | 杭州华三通信技术有限公司 | Electronic device and access control method for same |
| CN105589818B (en) * | 2015-07-17 | 2018-12-11 | 新华三技术有限公司 | Electronic equipment and access control method for electronic equipment |
| CN106569973A (en) * | 2016-10-25 | 2017-04-19 | 深圳市科陆精密仪器有限公司 | Serial peripheral interface multiplexing method and communication system |
| CN106569973B (en) * | 2016-10-25 | 2019-09-17 | 深圳市科陆精密仪器有限公司 | Serial Peripheral Interface (SPI) multiplexing method and communication system |
| CN107861903A (en) * | 2017-11-06 | 2018-03-30 | 郑州云海信息技术有限公司 | A kind of embedded board and its serial communication circuit |
| CN110941585A (en) * | 2019-11-26 | 2020-03-31 | 国核自仪系统工程有限公司 | Data processing system based on FPGA |
| CN110941585B (en) * | 2019-11-26 | 2023-05-30 | 国核自仪系统工程有限公司 | FPGA-based data processing system |
| CN112416843A (en) * | 2020-11-16 | 2021-02-26 | 北京锐安科技有限公司 | Backboard communication equipment, control method thereof and storage medium |
| CN113641613A (en) * | 2021-08-17 | 2021-11-12 | 西安易朴通讯技术有限公司 | Backboard, hard disk pool, server and communication method |
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| CN104408002B (en) | 2017-08-04 |
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