CN104378912A - Design method of PCB (printed circuit board) controllable impedance through holes - Google Patents

Design method of PCB (printed circuit board) controllable impedance through holes Download PDF

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Publication number
CN104378912A
CN104378912A CN201410729718.4A CN201410729718A CN104378912A CN 104378912 A CN104378912 A CN 104378912A CN 201410729718 A CN201410729718 A CN 201410729718A CN 104378912 A CN104378912 A CN 104378912A
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CN
China
Prior art keywords
hole
signal
holes
impedance
ground connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410729718.4A
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Chinese (zh)
Inventor
柯华英
关盈
崔铭航
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Group Co Ltd
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Inspur Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inspur Group Co Ltd filed Critical Inspur Group Co Ltd
Priority to CN201410729718.4A priority Critical patent/CN104378912A/en
Publication of CN104378912A publication Critical patent/CN104378912A/en
Pending legal-status Critical Current

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Abstract

The invention provides a design method of PCB (printed circuit board) controllable impedance through holes. A PCB is provided with a central signal through hole; ground through holes are arranged around the central signal through hole; the ground through holes function in shielding thus a uniformly distributed impedance is generated; the four ground through holes are arranged around the central signal through hole in a circle replacing a traditional uniformly-distributed shield; capacitance is generated between each ground through hole and the central signal through hole; the calculation of the capacitances is determined by the diameter and dielectric constant of the central signal through hole and distances between the central signal through hole and the ground through holes; the ground through holes around the central signal through hole provide a reflow path for signals; an inductance loop is generated between the central signal through holes and the ground through holes; an adjustable impedance vertical channel is accordingly generated; moderate parameters are calculated and selected, thus allowing transmission line impedance continuity and signal completeness.

Description

A kind of via design method that PCB impedance is controlled
Technical field
The present invention relates to circuit board production techniques field, a kind of via design method that specifically PCB impedance is controlled.
Background technology
Along with the raising of message transmission rate, signal integrity carries out most important for transfer of data smoothly, and each impedance mismatching on high speed signal path may produce signal jitter thus affect signal quality.Due to the raising of the signal density on PCB, just need more signal transmitting layer, and by inter-level interconnects realize transmission be also inevitable, these through holes will cause the discontinuous of transmission line impedance, and a large amount of shakes can be produced according to data rate size, therefore, we need to find a kind of method to control the impedance of through hole, to ensure the continuity of impedance.
Summary of the invention
The object of this invention is to provide a kind of via design method that PCB impedance is controlled.
The object of the invention is to realize in the following manner, pcb board arranges center signal through hole, ground connection via hole is arranged on the surrounding of signal via, ground connection via hole shielding generation equally distributed impedance of surrounding, four grounded via hole is lined up a circle and be instead of traditional even earth shield around center signal via hole, electric capacity is formed between each ground connection via hole and signal via, signal via diameter is depended in the calculating of capacitance, dielectric constant and the distance between signal via and ground connection via hole, the ground connection via hole of signal via periphery provides return flow path for signal, and an inductor loop is formed between signal via and ground connection via hole, so just produce the vertical channel of an impedance adjustable, select suitable parameter to ensure transmission line impedance continuity by calculating, thus ensure that signal integrity.
The invention has the beneficial effects as follows: the via design method that a kind of PCB impedance disclosed by the invention is controlled, a kind of similar coaxial through-hole structure newly can be utilized to the severe impedance mismatch problem avoiding standard through-hole to occur, ground connection via hole is arranged on the surrounding of signal via by this structure with a kind of special configuration.This new method produces the vertical channel of an impedance adjustable, thus it is interconnected that track impedance can be made to obtain the interlayer of accurate match, improves signal integrity.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention.
Embodiment
With reference to Figure of description, method of the present invention is described in detail below.
The via design method that PCB impedance is controlled, concrete steps are as follows:
The present invention utilizes a kind of similar coaxial through-hole structure newly, ground connection via hole is arranged on the surrounding of center signal through hole by this structure with a kind of special configuration, ground connection via hole produces an equally distributed impedance in the surrounding earth shield of center signal through hole, and the ground connection that four grounded via hole lines up a circle around center signal through hole instead of traditional even earth shield mode.Wherein form electric capacity between each ground connection via hole and signal via, the diameter of center signal through hole, dielectric constant and the distance between signal via and ground connection via hole are depended in the calculating of capacitance.The ground connection via hole of center signal bore periphery provides return flow path for signal, and an inductor loop is formed between signal via and ground connection via hole, so just produce the vertical channel of an impedance adjustable, select suitable parameter to ensure transmission line impedance continuity by calculating, thus ensure that signal integrity.
Except the technical characteristic described in specification, be the known technology of those skilled in the art.

Claims (1)

1. the via design method that a PCB impedance is controlled, it is characterized in that on pcb board, arrange center signal through hole, ground connection via hole is arranged on the surrounding of signal via, ground connection via hole shielding generation equally distributed impedance of surrounding, four grounded via hole is lined up a circle and be instead of traditional even earth shield around center signal via hole, electric capacity is formed between each ground connection via hole and signal via, signal via diameter is depended in the calculating of capacitance, dielectric constant and the distance between signal via and ground connection via hole, the ground connection via hole of signal via periphery provides return flow path for signal, and an inductor loop is formed between signal via and ground connection via hole, so just produce the vertical channel of an impedance adjustable, select suitable parameter to ensure transmission line impedance continuity by calculating, thus ensure that signal integrity.
CN201410729718.4A 2014-12-05 2014-12-05 Design method of PCB (printed circuit board) controllable impedance through holes Pending CN104378912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410729718.4A CN104378912A (en) 2014-12-05 2014-12-05 Design method of PCB (printed circuit board) controllable impedance through holes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410729718.4A CN104378912A (en) 2014-12-05 2014-12-05 Design method of PCB (printed circuit board) controllable impedance through holes

Publications (1)

Publication Number Publication Date
CN104378912A true CN104378912A (en) 2015-02-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410729718.4A Pending CN104378912A (en) 2014-12-05 2014-12-05 Design method of PCB (printed circuit board) controllable impedance through holes

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CN (1) CN104378912A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106028642A (en) * 2016-06-22 2016-10-12 安徽天兵电子科技有限公司 TR assembly multilayer circuit board and processing technology thereof
CN106061101A (en) * 2016-06-28 2016-10-26 广东欧珀移动通信有限公司 Signal line protection method and apparatus, printed circuit board, and mobile terminal
CN107072056A (en) * 2017-05-31 2017-08-18 郑州云海信息技术有限公司 A kind of design method of optimization PCIE connector area signal qualitys
CN107135605A (en) * 2017-06-09 2017-09-05 郑州云海信息技术有限公司 A kind of design method of new matched termination impedance
CN108495514A (en) * 2018-03-07 2018-09-04 中国船舶重工集团公司第七二三研究所 A kind of compression joint type connector pore model processing method
CN109089375A (en) * 2018-09-26 2018-12-25 郑州云海信息技术有限公司 A kind of analysis method and system that signal integrity is influenced for pcb board via hole
CN109637808A (en) * 2019-01-11 2019-04-16 广西芯百特微电子有限公司 A kind of novel capacitor and device
WO2021051446A1 (en) * 2019-09-20 2021-03-25 苏州浪潮智能科技有限公司 Printed circuit board and electronic product
CN113170577A (en) * 2018-12-19 2021-07-23 索尼集团公司 Substrate and electronic device
WO2022262335A1 (en) * 2021-06-18 2022-12-22 中兴通讯股份有限公司 Shielding structure and circuit board

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5302923A (en) * 1992-07-16 1994-04-12 Hewlett-Packard Company Interconnection plate having high frequency transmission line through paths
JPH09321501A (en) * 1996-05-30 1997-12-12 Mitsubishi Electric Corp Multilayer high frequency circuit board
JP2001068596A (en) * 1999-08-27 2001-03-16 Sharp Corp Dielectric circuit substrate and mm-wave semiconductor device including the same
CN1799290A (en) * 2003-06-02 2006-07-05 日本电气株式会社 Compact via transmission line for printed circuit board and its designing method
CN102800644A (en) * 2012-09-05 2012-11-28 无锡江南计算技术研究所 Double data rate (DDR) signal wiring encapsulation substrate and DDR signal wiring encapsulation method
CN104093270A (en) * 2014-07-08 2014-10-08 西安电子工程研究所 Interlayer signal transmission structure of microwave mixed printed circuit board

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5302923A (en) * 1992-07-16 1994-04-12 Hewlett-Packard Company Interconnection plate having high frequency transmission line through paths
JPH09321501A (en) * 1996-05-30 1997-12-12 Mitsubishi Electric Corp Multilayer high frequency circuit board
JP2001068596A (en) * 1999-08-27 2001-03-16 Sharp Corp Dielectric circuit substrate and mm-wave semiconductor device including the same
CN1799290A (en) * 2003-06-02 2006-07-05 日本电气株式会社 Compact via transmission line for printed circuit board and its designing method
CN102800644A (en) * 2012-09-05 2012-11-28 无锡江南计算技术研究所 Double data rate (DDR) signal wiring encapsulation substrate and DDR signal wiring encapsulation method
CN104093270A (en) * 2014-07-08 2014-10-08 西安电子工程研究所 Interlayer signal transmission structure of microwave mixed printed circuit board

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106028642A (en) * 2016-06-22 2016-10-12 安徽天兵电子科技有限公司 TR assembly multilayer circuit board and processing technology thereof
CN106061101A (en) * 2016-06-28 2016-10-26 广东欧珀移动通信有限公司 Signal line protection method and apparatus, printed circuit board, and mobile terminal
CN106061101B (en) * 2016-06-28 2018-09-18 广东欧珀移动通信有限公司 Signal wire guard method, device, printed circuit board and terminal device
CN107072056B (en) * 2017-05-31 2019-09-27 郑州云海信息技术有限公司 A kind of design method optimizing PCIE connector area signal quality
CN107072056A (en) * 2017-05-31 2017-08-18 郑州云海信息技术有限公司 A kind of design method of optimization PCIE connector area signal qualitys
CN107135605A (en) * 2017-06-09 2017-09-05 郑州云海信息技术有限公司 A kind of design method of new matched termination impedance
CN108495514A (en) * 2018-03-07 2018-09-04 中国船舶重工集团公司第七二三研究所 A kind of compression joint type connector pore model processing method
CN109089375A (en) * 2018-09-26 2018-12-25 郑州云海信息技术有限公司 A kind of analysis method and system that signal integrity is influenced for pcb board via hole
CN109089375B (en) * 2018-09-26 2021-07-27 郑州云海信息技术有限公司 Analysis method and system for influence of PCB (printed circuit board) via hole on signal integrity
CN113170577A (en) * 2018-12-19 2021-07-23 索尼集团公司 Substrate and electronic device
US12028968B2 (en) 2018-12-19 2024-07-02 Sony Group Corporation Substrate and electronic device
CN109637808A (en) * 2019-01-11 2019-04-16 广西芯百特微电子有限公司 A kind of novel capacitor and device
CN109637808B (en) * 2019-01-11 2024-02-23 芯百特微电子(无锡)有限公司 Novel capacitor and device
WO2021051446A1 (en) * 2019-09-20 2021-03-25 苏州浪潮智能科技有限公司 Printed circuit board and electronic product
WO2022262335A1 (en) * 2021-06-18 2022-12-22 中兴通讯股份有限公司 Shielding structure and circuit board

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Application publication date: 20150225

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