CN104362198B - Transparency electrode grid-control transverse direction PIN royal purple photo-detector and preparation method thereof - Google Patents
Transparency electrode grid-control transverse direction PIN royal purple photo-detector and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a kind of transparency electrode grid-control transverse direction PIN royal purple photo-detector and preparation method thereof, detector includes forming anti-p-well by N trap with deep N-well isolation in P type substrate, sets N in anti-p-well+District and P+District, anti-p-well is positioned at N+District and P+Between district, the surface in region is coated with gate oxide, transparent conductive film, gate electrode G, N successively+District is provided with anode electrode A, P+District is provided with cathode electrode K；Preparation method includes isolating anti-p-well by formation N trap with deep N-well in P type substrate, forms N in the both sides of anti-p-well+District and P+District and respectively generation anode electrode A, cathode electrode K, the upper surface in anti-p-well is sequentially prepared gate oxide, transparent conductive film and gate electrode G.The present invention can effectively solve the problem that the contradiction in photo-detector between quantum efficiency and frequency response, has that dark current is little, quantum efficiency is big, frequency response is fast, input impedance is big, be conducive to integrated advantage.
Description
Technical field
The present invention relates to royal purple optical detector technology field, be specifically related to a kind of transparency electrode grid-control transverse direction PIN royal purple photo-detector and preparation method thereof.
Background technology
Photo-detector (Photo-detector, PD), as optical signal reading device, plays very crucial effect in photonics.Royal purple photo-detector is widely used in fields such as blue-ray storage, health care, environmental monitorings.Along with the development of CMOS technology technology, the high-performance compatible with CMOS technology, a current study hotspot can be become by the royal purple photo-detector that is electrically integrated of light.Royal purple photo-detector prepared by CMOS technology is normally based on the bipolar structure of longitudinal P N knot, mutually restricts between quantum efficiency and frequency response, and input impedance is little, is unfavorable for integrated.It addition, the dark current that P type substrate leakage current causes is big, sensitivity is low.Furthermore, along with the development of CMOS technology, by scaled down principle, device size (p-n junction is deep, depletion region thickness) and running voltage must reduce accordingly.Thus, it being difficult to long wavelength light absorb, the quantum efficiency of photo-detector is very low, and response speed is restricted.But, according to Lambert law, short-wavelength light absorption length in silicon is shorter, it is desirable to silicon film thickness less.Therefore, CMOS technology is adopted to be expected to prepare the royal purple photo-detector of excellent properties.How to realize based on CMOS technology realize excellent performance, can the royal purple photo-detector that is electrically integrated of light, have become as a key technical problem urgently to be resolved hurrily.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of contradiction that can effectively solve the problem that between quantum efficiency and frequency response, and dark current is little, quantum efficiency is big, frequency response is fast, input impedance is big, be conducive to integrated transparency electrode grid-control transverse direction PIN royal purple photo-detector and preparation method thereof.
For solving above-mentioned technical problem, the technical solution used in the present invention is:
A kind of transparency electrode grid-control transverse direction PIN royal purple photo-detector, including P type substrate, described P type substrate is provided with N trap and deep N-well that ion implantation doping mode is formed, the bottom of described N trap contacts with deep N-well and forms anti-p-well in the upper isolation of P type substrate, and the side of described anti-p-well is provided with the N that diffusing, doping mode is formed+District, opposite side are provided with the P that diffusing, doping mode is formed+District, described N+District and P+Transversely gap, district is arranged, described anti-p-well is positioned at N+District and P+Between district, the surface in region is coated with gate oxide, and the surface of described gate oxide is coated with transparent conductive film, and described transparent conductive film is provided with gate electrode G, described N+District is provided with anode electrode A, described P+District is provided with cathode electrode K.
Preferably, described transparent conductive film is the one in ito thin film, AZO thin film, Graphene.
Preferably, described P type substrate adopts low-doped p-type silicon to make.
Preferably, described P type substrate is provided with P type substrate P+District, described P type substrate P+The surface in district is provided with P type substrate electrode.
Preferably, the thickness of described anti-p-well is 80nm～800nm.
Preferably, described gate oxide is the silicon dioxide layer adopting lift-off technology to generate.
Preferably, the thickness of described silicon dioxide layer is 10nm～50nm.
Preferably, the thickness of described transparent conductive film is 80nm～100nm.
Preferably, described anode electrode A, cathode electrode K, gate electrode G, P type substrate electrode are the aluminium lamination adopting aluminum plating process to make.
The preparation method that the present invention also provides for a kind of transparency electrode grid-control transverse direction PIN royal purple photo-detector, comprises the steps:
1) using low-doped p-type silicon as P type substrate, adopting ion implantation doping mode to form N trap and deep N-well in described P type substrate, the bottom of described N trap contacts with deep N-well and forms anti-p-well in the upper isolation of P type substrate；
2) diffusing, doping mode is adopted to form N in the side of described anti-p-well+District, opposite side adopt diffusing, doping mode to form P+District, described N+District and P+Transversely gap, district is arranged, at described N+The aluminium lamination that the surface employing aluminum plating process in district is made is as anode electrode A, at described P+The aluminium lamination that the surface employing aluminum plating process in district is made is as cathode electrode K；Described P type substrate adopt diffusing, doping mode form P type substrate P+District, and at described P type substrate P+Aluminize in district and generate P type substrate electrode；
3) it is positioned at N in described anti-p-well+District and P+Between district, the surface in region covers and adopts lift-off technology to generate silicon dioxide layer as gate oxide；
4) at the superficial growth transparent conductive film of described gate oxide, aluminize generation gate electrode G on the surface of described transparent conductive film.
The transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present invention has an advantage that
1, the present invention is provided with N trap and the deep N-well that ion implantation doping mode is formed in P type substrate, the bottom of N trap contacts with deep N-well and forms anti-p-well in the upper isolation of P type substrate, and the both sides of anti-p-well are provided with diffusing, doping mode and form the N that lateral clearance is arranged+District and P+District, due to N trap (NWELL) with deep N-well (DeepNWELL) by anti-p-well (R-WELL) and P type substrate isolation, P type substrate leakage current is up to the pA order of magnitude, thus being substantially reduced dark current, has the advantage that dark current is little.
2, the present invention is provided with diffusing, doping mode and forms the N that lateral clearance is arranged in the both sides of anti-p-well+District and P+District, the N that lateral clearance is arranged+District and P+District forms horizontal PIN structural, and horizontal PIN structural can not increase output capacitance while increasing light-receiving area, it is thus possible to effectively solve the contradiction between quantum efficiency and frequency response, has the advantage that quantum efficiency is big, frequency response is fast.
3, the present invention is positioned at N in anti-p-well+District and P+Between district, the surface in region is coated with gate oxide, and the surface of described gate oxide is coated with transparent conductive film, and transparent conductive film is provided with gate electrode G, described N+District is provided with anode electrode A, described P+District is provided with cathode electrode K, realizes transparency electrode by transparent conductive film, gate electrode G, and the anti-p-well of transparency electrode grid-control (R-WELL) exhausts and not transoid, at same voltage VAKUnder effect, the having lateral depletion district of bigger width can be formed, increase effective photoelectric conversion region, reducing the transition time of photo-generated carrier, thus eliminating channel length restriction, improving quantum efficiency and the frequency response of device further, quantum efficiency can be obtained simultaneously > 70%, cut-off frequency > 1GHz.
4, the present invention is positioned at N in anti-p-well+District and P+Between district, the surface in region is coated with gate oxide, the surface of described gate oxide is coated with transparent conductive film, transparent conductive film is provided with gate electrode G, forms vertical MOS structure by P type substrate, gate oxide, transparent conductive film, gate electrode G, input impedance big (107～1015Ω), relative to the input impedance (forward: hundreds of Europe is to several kilo-ohms, reversely: tens kilo-ohms are arrived hundreds of kilo-ohm) of bipolar structure, it is more beneficial for integrated.
The preparation method of transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present invention is used for preparing transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present invention, existing standard CMOS process can be utilized to prepare transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present invention, have that technique is simple, implement to be easy to advantage.
Accompanying drawing explanation
Fig. 1 is the sectional structure schematic diagram of embodiment of the present invention device.
Fig. 2 is embodiment of the present invention method step 1) obtain the sectional structure schematic diagram of intermediate products.
Fig. 3 is embodiment of the present invention method step 2) obtain the sectional structure schematic diagram of intermediate products.
Fig. 4 is embodiment of the present invention method step 3) obtain the sectional structure schematic diagram of intermediate products.
Marginal data: 1, P type substrate；11, P type substrate P+District；12, P type substrate electrode；2, N trap；3, deep N-well；4, anti-p-well；41, gate oxide；42, transparent conductive film；5、N+District；6、P+District.
Detailed description of the invention
As shown in Figure 1, the transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present embodiment includes P type substrate 1, P type substrate 1 is provided with N trap 2 and deep N-well 3 that ion implantation doping mode is formed, the bottom of N trap 2 contacts with deep N-well 3 and forms anti-p-well 4 in the upper isolation of P type substrate 1, and the side of anti-p-well 4 is provided with the N that diffusing, doping mode is formed+District 5, opposite side are provided with the P that diffusing, doping mode is formed+District 6, N+District 5 and P+Transversely gap, district 6 is arranged, (N+District 5 and P+The horizontal spacing in district 6 is determined by required light-receiving area), anti-p-well 4 is positioned at N+District 5 and P+Between district 6, the surface in region is coated with gate oxide 41, and the surface of gate oxide 41 is coated with transparent conductive film 42, and transparent conductive film 42 is provided with gate electrode G, N+District 5 is provided with anode electrode A, P+District 6 is provided with cathode electrode K.
In the present embodiment, transparent conductive film 42 is ito thin film (indium tin oxide films), it is possible to reduce the gate electrode absorption to incident illumination, improves external quantum efficiency；In addition AZO thin film (zinc-oxide film of aluminum doping), Graphene can also be adopted as required.
In the present embodiment, the thickness range of transparent conductive film 42 is 80nm～100nm, based on above-mentioned thickness range, it is possible to realize compromising well between film transmission and resistivity.
In the present embodiment, P type substrate 1 adopts low-doped p-type silicon to make, it is possible to integrated with other circuit that CMOS technology realizes, and reduces the recombination rate of photo-generated carrier, improves internal quantum efficiency.
In the present embodiment, P type substrate 1 is provided with P type substrate P+District 11, P type substrate P+The surface in district 11 is provided with P type substrate electrode 12.
In the present embodiment, the thickness of anti-p-well 4 is 80nm～800nm.The present embodiment is according to Lambert law, in conjunction with CMOS technology feature, and ensure anti-p-well surface depletion and during non-transoid, whole anti-p-well longitudinally exhausts, the thickness determining anti-p-well (R-WELL) 4 is 80nm ~ 800nm, it is possible to realize the detection that wavelength is 380 ~ 520nm royal purple light.
In the present embodiment, gate oxide 41 is the silicon dioxide layer adopting lift-off technology to generate；The thickness of silicon dioxide layer is 10nm～50nm, so that relatively low grid voltage can make anti-p-well surface depletion and non-transoid, meets the low-voltage and low-power dissipation development trend of integrated circuit.
In the present embodiment, anode electrode A, cathode electrode K, gate electrode G, P type substrate electrode 12 are the aluminium lamination adopting aluminum plating process to make.
The operation principle of the transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present embodiment is as follows: grid voltage VGKUnder effect, anti-p-well 4 forms longitudinal electric field, anti-p-well 4 surface depletion and non-transoid；Lateral voltage VAKUnder effect, produce transverse electric field, form having lateral depletion district as effective photoelectric conversion region；Due to grid voltage VGKControlling anti-p-well 4 surface depletion and non-transoid, carrier concentration reduces, and therefore can obtain bigger having lateral depletion district.When royal purple light incidence, arriving anti-p-well 4 through transparent conductive film 42, backing material absorbing light produces photo-generated carrier, forms photogenerated current under transverse electric field effect, thus realizing the detection to royal purple light.The preparation method of the transparency electrode grid-control transverse direction PIN royal purple photo-detector of the present embodiment specifically adopts standard CMOS process to complete N trap (NWELL) 2, deep N-well (DeepNWELL) 3, N+District 5, P+The FEOL portion such as district 6, gate oxide 41, anode electrode A, cathode electrode K and P type substrate electrode 12；The backend process such as ito thin film growth and gate electrode G are completed at laboratory.Its preparation method specifically includes following steps:
1) using low-doped p-type silicon as P type substrate 1, adopt the bottom that ion implantation doping mode forms N trap (NWELL) 2 and deep N-well (DeepNWELL) 3, N trap 2 in P type substrate 1 to contact with deep N-well 3 and form anti-p-well (R-WELL) 4 in the upper isolation of P type substrate.This step obtain intermediate products structure as in figure 2 it is shown, wherein the thickness range of anti-p-well 4 be between 100nm～800nm.
2) diffusing, doping mode is adopted to form N in the side of anti-p-well 4+District 5, opposite side adopt diffusing, doping mode to form P+District 6, N+District 5 and P+Transversely gap, district 6 is arranged, at N+The aluminium lamination that the surface employing aluminum plating process in district 5 is made is as anode electrode A, at P+The aluminium lamination that the surface employing aluminum plating process in district 6 is made is as cathode electrode K；P type substrate 1 adopt diffusing, doping mode form P type substrate P+District 11, and at P type substrate P+Aluminize in district 11 and generate P type substrate electrode 12；This step obtains the structure of intermediate products as shown in Figure 3.
3) it is positioned at N in anti-p-well 4+District 5 and P+Between district 6, the surface in region covers and adopts lift-off technology to generate silicon dioxide layer as gate oxide 41；This step obtains the structure of intermediate products as shown in Figure 4, and the thickness range of gate oxide 41 is 10nm～50nm.
4) radio frequency magnetron sputtering method growth transparent conductive film 42(ITO thin film is adopted on the surface of gate oxide 41), the thickness range of ito thin film is 80nm～100nm, and aluminize generation gate electrode G on the surface of ito thin film.The product finally given is as shown in Figure 1.
Above-mentioned steps 1) in～step 4), adopt diffusing, doping mode to form P type substrate P in P type substrate 1+District 11, and at P type substrate P+Aluminize in district 11 and generate P type substrate electrode 12, adopt ion implantation doping mode to form N trap (NWELL) 2 and deep N-well (DeepNWELL) 3 in P type substrate 1, be respectively adopted diffusing, doping mode in the both sides of anti-p-well 4 and form N+District 5 and P+District 6, is positioned at N in anti-p-well 4+District 5 and P+Between district 6, the surface in region covers and adopts lift-off technology to generate silicon dioxide layer as gate oxide 41, at N+The aluminium lamination that the surface employing aluminum plating process in district 5 is made is as anode electrode A, at P+The surface in district 6 adopts the aluminium lamination that aluminum plating process is made to be standard CMOS process as cathode electrode K etc..
The foregoing is only the preferred embodiment of the present invention, protection scope of the present invention is not limited in above-mentioned embodiment, and every technical scheme belonging to the principle of the invention belongs to protection scope of the present invention.For a person skilled in the art, the some improvements and modifications carried out under the premise without departing from principles of the invention, these improvements and modifications also should be regarded as protection scope of the present invention.
Claims (10)
1. a transparency electrode grid-control transverse direction PIN royal purple photo-detector, including P type substrate (1), it is characterized in that: described P type substrate (1) is provided with N trap (2) and deep N-well (3) that ion implantation doping mode is formed, the bottom of described N trap (2) contacts with deep N-well (3) and forms anti-p-well (4) in the upper isolation of P type substrate (1), and the side of described anti-p-well (4) is provided with the N that diffusing, doping mode is formed+District (5), opposite side are provided with the P that diffusing, doping mode is formed+District (6), described N+District (5) and P+District (6) transversely gap is arranged, described anti-p-well (4) is positioned at N+District (5) and P+Between district (6), the surface in region is coated with gate oxide (41), and the surface of described gate oxide (41) is coated with transparent conductive film (42), and described transparent conductive film (42) is provided with gate electrode G, described N+District (5) is provided with anode electrode A, described P+District (6) is provided with cathode electrode K.
2. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 1, it is characterised in that: described transparent conductive film (42) is ito thin film, one in AZO thin film, Graphene.
3. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 2, it is characterised in that: described P type substrate (1) adopts low-doped p-Type silicon is made.
4. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 3, it is characterised in that: described P type substrate (1) is provided with P type substrate P+District (11), described P type substrate P+The surface in district (11) is provided with P type substrate electrode (12).
5. the transparency electrode grid-control transverse direction PIN royal purple photo-detector according to any one in Claims 1 to 4, it is characterised in that: the thickness of described anti-p-well (4) is 80nm～800nm.
6. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 5, it is characterised in that: described gate oxide (41) is the silicon dioxide layer adopting lift-off technology to generate.
7. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 6, it is characterised in that: the thickness of described silicon dioxide layer is 10nm～50nm.
8. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 7, it is characterised in that: the thickness of described transparent conductive film (42) is 80nm～100nm.
9. transparency electrode grid-control transverse direction PIN royal purple photo-detector according to claim 8, it is characterised in that: described anode electrode A, cathode electrode K, gate electrode G, P type substrate electrode (12) are the aluminium lamination adopting aluminum plating process to make.
10. the preparation method of a transparency electrode grid-control transverse direction PIN royal purple photo-detector, it is characterised in that comprise the steps:
1) by low-doped p-Type silicon as P type substrate, adopts ion implantation doping mode to form N trap and deep N-well in described P type substrate, and the bottom of described N trap contacts with deep N-well and forms anti-p-well in the upper isolation of P type substrate；
2) diffusing, doping mode is adopted to form N in the side of described anti-p-well+District, opposite side adopt diffusing, doping mode to form P+District, described N+District and P+Transversely gap, district is arranged, at described N+The aluminium lamination that the surface employing aluminum plating process in district is made is as anode electrode A, at described P+The aluminium lamination that the surface employing aluminum plating process in district is made is as cathode electrode K；Described P type substrate adopt diffusing, doping mode form P type substrate P+District, and at described P type substrate P+Aluminize in district and generate P type substrate electrode；
3) it is positioned at N in described anti-p-well+District and P+Between district, the surface in region covers and adopts lift-off technology to generate silicon dioxide layer as gate oxide；
4) at the superficial growth transparent conductive film of described gate oxide, aluminize generation gate electrode G on the surface of described transparent conductive film.
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| CN107123695B (en) * | 2017-04-21 | 2019-03-05 | 清华大学 | Planar detector transistor device and forming method thereof with door gate control |
| CN107293607B (en) * | 2017-07-05 | 2019-09-27 | 京东方科技集团股份有限公司 | Photodetection structure and preparation method thereof, array substrate, display device |
| CN110504325B (en) * | 2019-08-29 | 2023-06-02 | 上海华力微电子有限公司 | Novel grid-controlled P-i-N diode ESD device and implementation method thereof |
| CN110660882B (en) * | 2019-09-23 | 2021-05-04 | 深圳第三代半导体研究院 | Grid-controlled PIN structure GaN ultraviolet detector and preparation method thereof |
| CN112071874B (en) * | 2020-09-30 | 2024-06-14 | 湖南脉探芯半导体科技有限公司 | Silicon drift detector and metal oxide semiconductor field effect transistor integrated device |
| CN114242827A (en) * | 2021-12-17 | 2022-03-25 | 中国电子科技集团公司第十三研究所 | Transverse photoelectric detector |
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