CN104347687A - Groove type MOSFET grid lead-out end structure and manufacture method thereof - Google Patents

Groove type MOSFET grid lead-out end structure and manufacture method thereof Download PDF

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Publication number
CN104347687A
CN104347687A CN201310330385.3A CN201310330385A CN104347687A CN 104347687 A CN104347687 A CN 104347687A CN 201310330385 A CN201310330385 A CN 201310330385A CN 104347687 A CN104347687 A CN 104347687A
Authority
CN
China
Prior art keywords
groove
contact hole
terminal structure
manufacture method
gate terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201310330385.3A
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Chinese (zh)
Inventor
张楠
邵向荣
缪进征
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN201310330385.3A priority Critical patent/CN104347687A/en
Publication of CN104347687A publication Critical patent/CN104347687A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The invention discloses a groove type MOSFET grid lead-out end structure. A grid lead-out end contact hole avoids an area where a transverse groove and a longitudinal groove are vertically intersected, such that the problem is avoided that the contact hole is punched through when a cavity or a slit is formed due to polysilicon filling of the groove vertically intersected area, and the product yield rate and reliability are improved. The invention further discloses a manufacture method of the groove type MOSFET grid lead-out end.

Description

Trench MOSFET gate terminal structure and manufacture method
Technical field
The present invention relates to the manufacture field of semiconductor device, refer to a kind of trench MOSFET gate terminal structure especially, the invention still further relates to the manufacture method of described trench MOSFET gate terminal structure.
Background technology
Manufacture field at semiconductor integrated circuit, as shown in Figure 1, 2, it is the groove type grid with multiple transverse and longitudinal intersection to the gate contact hole layout design of typical power groove type MOSFET, is then drawn by trench-gate by gate contact hole.Generally the contact hole that groove type grid is drawn is designed in the region (as shown in the dotted line frame in figure) that transverse and longitudinal is intersected, and the position that groove transverse and longitudinal is intersected becomes large due to groove dimensions, easily hole or gap is formed after polysilicon gate deposit, when contact hole is opened in this position, easily there is punchthrough issues in contact hole silicon etching.Fig. 3 is the trench profile figure along the dotted line direction shown in Fig. 1, Fig. 4 is the partial enlarged drawing of Fig. 3, as can be seen from Figure 4, be positioned at the contact hole of transverse and longitudinal trench-gate intersection region, get to channel bottom always, destroy bottom gate oxygen quality, finally cause low yield or device reliability issues.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of trench MOSFET gate terminal structure, improves yield and the reliability of device.
The technical problem that the present invention also will solve is the manufacture method providing described trench MOSFET gate terminal structure.
For solving the problem, trench MOSFET gate terminal structure of the present invention, includes many first grooves and the second groove, and many first grooves all form square crossing with the second groove and are connected; By multiple contact holes that the first groove is drawn, be all arranged in second groove in the square crossing region avoiding first, second groove.
Further, described many first grooves are grids of MOS device, and described is for being drawn by many first grooves with cross-coupled second groove of the first groove vertical; The width of the second groove is greater than the first groove, and its quantity is one or more of.
Further, described multiple contact holes, in the second groove and and distance between square crossing region be greater than zero.
For solving the problem, the manufacture method of trench MOSFET gate terminal structure of the present invention, comprises following several step:
1st step, after first, second etching groove completes, fills polysilicon and returns and carve;
2nd step, etches multiple contact hole in non-groove intersection region, draws trench-gate.
Further, in described 2nd step, described multiple contact holes are arranged in the second groove and are greater than zero with the distance of first, second groove vertical intersection region.
Trench MOSFET gate terminal structure of the present invention and manufacture method, avoid the region that first, second trench-gate intersects, avoid contact hole and form break-through in intersection region, improve product yield and reliability by the contact hole position that grid is drawn.
Accompanying drawing explanation
Fig. 1 is traditional contact hole domain;
Fig. 2 is another traditional contact hole domain;
Fig. 3 is trench profile figure;
Fig. 4 is the partial enlarged drawing of Fig. 3;
Fig. 5 is embodiments of the invention one contact hole domain;
Fig. 6 is embodiments of the invention two contact hole domain;
Fig. 7 is the schematic diagram of present invention process step one;
Fig. 8 is the cutaway view of Fig. 7;
Fig. 9 is another cutaway view of Fig. 7;
Figure 10 is the schematic diagram of present invention process step 2;
Figure 11 is the cutaway view of Figure 10;
Figure 12 is another cutaway view of Figure 10.
Description of reference numerals
101 is first grooves, and 102 is contact holes, and 103 is second grooves.
Embodiment
Trench MOSFET gate terminal structure of the present invention, embodiment one as shown in Figure 5, trench MOSFET has multiple first groove-shaped 101, many the first grooves and 101 second groove 103 square crossings, many the first grooves 101 are groove type grid of MOS device, and the second groove 103 is that its width is generally greater than the first groove 101 for being drawn by the first groove 101, the quantity visual organ part of the second groove 103 and determining, is generally 2 ~ 4.The intersection region of the first groove 101 and the second groove 103 is as shown in dotted line circle in Fig. 5, i.e. the joint portion of first, second groove, the polysilicon of this intersection region easily forms cavity or gap.The contact hole 102 that trench-gate is drawn is designed on the second groove 103 avoiding described intersection region, making contact hole 102 there will not be break-through when etching into beneath trenches like this, affecting yield and the stability of groove MOSFET.
Described contact hole 102, must avoid the intersection region of groove, in order to avoid the cavity blemish that intersection region polysilicon is filled causes contact hole to occur punchthrough issues.In Fig. 5, the position of contact hole 102 and the distance D of intersection region are greater than zero.
Another embodiment of the present invention as shown in Figure 6, the difference of itself and embodiment one is: the intersection region of the first groove 101 and the second groove 103 diminishes, that is, the first groove 101 is not exclusively deep in the second groove 103, the narrowed width of the second groove 103 in intersection region.The contact hole 102 that trench-gate is drawn is designed on the second groove 103 avoiding described intersection region equally.The manufacture method of trench MOSFET gate terminal structure of the present invention comprises following steps:
1st step, after first and second etching groove completes, fills polysilicon and returns and carve, as shown in Figure 7.
Along the y direction in Fig. 7 cutaway view as shown in Figure 8, the second groove fill up and return carve after cutaway view.
Along the x direction in Fig. 7 cutaway view as shown in Figure 9, intersection region exist fill gap.
2nd step, etches multiple contact hole in non-groove intersection region, draws trench-gate.As shown in Figure 10.Along shown in Figure 10 x direction and y direction groove cutaway view respectively as shown in Figure 11,12, at the contact hole that the non-crossing region of groove is formed, bottom it, there is no break-through.
These are only the preferred embodiments of the present invention, be not intended to limit the present invention.For a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (5)

1. a trench MOSFET gate terminal structure, include many first grooves and the second groove, many the first grooves all form square crossing with the second groove and are connected, it is characterized in that: multiple contact holes of being drawn by the first groove, are all arranged in second groove in the square crossing region avoiding first, second groove.
2. trench MOSFET gate terminal structure as claimed in claim 1, it is characterized in that: described many first grooves are grids of MOS device, described is for being drawn by many first grooves with cross-coupled second groove of the first groove vertical; The width of the second groove is greater than the first groove, and its quantity is one or more of.
3. trench MOSFET gate terminal structure as claimed in claim 1, is characterized in that: described multiple contact holes, in the second groove and and distance between square crossing region be greater than zero.
4. the manufacture method of trench MOSFET gate terminal structure as claimed in claim 1, is characterized in that: comprise following several step:
1st step, after first, second etching groove completes, fills polysilicon and returns and carve;
2nd step, etches multiple contact hole in non-groove intersection region, draws trench-gate.
5. the manufacture method of trench MOSFET gate terminal structure as claimed in claim 4, it is characterized in that: in the 2nd step, described multiple contact holes are arranged in the second groove and are greater than zero with the distance of first, second groove vertical intersection region.
CN201310330385.3A 2013-07-31 2013-07-31 Groove type MOSFET grid lead-out end structure and manufacture method thereof Pending CN104347687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310330385.3A CN104347687A (en) 2013-07-31 2013-07-31 Groove type MOSFET grid lead-out end structure and manufacture method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310330385.3A CN104347687A (en) 2013-07-31 2013-07-31 Groove type MOSFET grid lead-out end structure and manufacture method thereof

Publications (1)

Publication Number Publication Date
CN104347687A true CN104347687A (en) 2015-02-11

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CN201310330385.3A Pending CN104347687A (en) 2013-07-31 2013-07-31 Groove type MOSFET grid lead-out end structure and manufacture method thereof

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112310069A (en) * 2020-09-18 2021-02-02 上海华虹宏力半导体制造有限公司 Layout structure of shielded gate trench type device and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060273385A1 (en) * 2005-06-06 2006-12-07 M-Mos Semiconductor Sdn. Bhd. Trenched MOSFET device with contact trenches filled with tungsten plugs
US20080035988A1 (en) * 2006-08-08 2008-02-14 Force-Mos Technology Corp., Ltd. Trenched MOSFET device with trenched contacts
CN101288175A (en) * 2005-08-17 2008-10-15 国际整流器公司 Power semiconductor device with interconnected gate trenches

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060273385A1 (en) * 2005-06-06 2006-12-07 M-Mos Semiconductor Sdn. Bhd. Trenched MOSFET device with contact trenches filled with tungsten plugs
CN101288175A (en) * 2005-08-17 2008-10-15 国际整流器公司 Power semiconductor device with interconnected gate trenches
US20080035988A1 (en) * 2006-08-08 2008-02-14 Force-Mos Technology Corp., Ltd. Trenched MOSFET device with trenched contacts

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112310069A (en) * 2020-09-18 2021-02-02 上海华虹宏力半导体制造有限公司 Layout structure of shielded gate trench type device and manufacturing method thereof

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Application publication date: 20150211