CN104330912B - A kind of motherboard, to the motherboard after box, respective production method and liquid crystal display panel - Google Patents
A kind of motherboard, to the motherboard after box, respective production method and liquid crystal display panel Download PDFInfo
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- CN104330912B CN104330912B CN201410683152.6A CN201410683152A CN104330912B CN 104330912 B CN104330912 B CN 104330912B CN 201410683152 A CN201410683152 A CN 201410683152A CN 104330912 B CN104330912 B CN 104330912B
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- sealant
- alignment mark
- motherboard
- underlay substrate
- coated
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13398—Spacer materials; Spacer properties
Abstract
Include the invention discloses a kind of motherboard, to the motherboard after box, respective production method and liquid crystal display panel, the motherboard:Underlay substrate and multiple base board units with alignment mark arranged in arrays on underlay substrate;Sealant is coated with along the line of cut on underlay substrate, alignment mark is located in sealant region;Because the sealant being coated with least at alignment mark is transparent sealant, the sealant being coated with i.e. at alignment mark is transparent sealant, the sealant of region coating in addition to alignment mark is transparent or opaque sealant, so, even if it is coated with sealant along line of cut, so that alignment mark is covered by sealant, also the problem of being not in None- identified alignment mark, so as to accurately being cut to the motherboard after box, and, there is colour mixture in liquid crystal display panel, when transmitance is relatively low etc. bad, inspection confirmation can also be carried out by alignment mark.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of motherboard, to the motherboard after box, respective production method and liquid
LCD panel.
Background technology
Liquid crystal display panel is mainly made up of opposite substrate, array base palte and the liquid crystal layer between the two substrates.
During the actual fabrication of liquid crystal display panel, first, arranged in arrays multiple of respective production are distinguished on two motherboards
Opposite substrate unit and multiple array base palte units, then, sealant is coated with a motherboard wherein, in an other motherboard
Upper dispenser method molecule, and to box technique, finally, two motherboards are cut respectively along the line of cut on two motherboards
Cut, form multiple liquid crystal display panels.
At present, in order to adapt to the development trend of the narrow frame of liquid crystal display panel, in the actual fabrication of liquid crystal display panel
During, cutting-type sealant typically is coated with along the line of cut on motherboard, i.e., line of cut is positioned at the cutting-type sealant of coating
On center line, and after to box technique, using with glue cutting technique along line of cut to being cut to the motherboard after box, so,
The frame for the liquid crystal display panel produced is narrower, and the area of viewing area is larger.However, the above method is in actual mechanical process
In, the cutting-type sealant being coated with along line of cut can cover the alignment mark near line of cut, due to cutting-type sealant
And it is opaque, alignment mark None- identified can be caused, so, will be difficult to when cutting into liquid crystal display panel to the motherboard after box
Accurately cut, also, liquid crystal display panel occur colour mixture, transmitance it is relatively low etc. bad when, alignment mark can not be passed through
Checked with confirm it is above-mentioned it is bad whether be caused by aligning accuracy difference.
Therefore, the identification of alignment mark how is improved when being coated with sealant along line of cut, be those skilled in the art urgently
The technical problem that need to be solved.
The content of the invention
In view of this, the embodiments of the invention provide a kind of motherboard, to the motherboard after box, respective production method and liquid crystal
Show panel, to improve the identification of alignment mark when being coated with sealant along line of cut.
Therefore, the embodiments of the invention provide a kind of motherboard, including:Underlay substrate and it is on the underlay substrate
Multiple base board units with alignment mark of matrix arrangement;Sealant is coated with along the line of cut on the underlay substrate,
The alignment mark is located in sealant region;
The sealant being coated with least described alignment mark is transparent sealant.
In a kind of possible implementation, in above-mentioned motherboard provided in an embodiment of the present invention, the transparent envelope frame
The material of glue includes:Acrylic acid epoxy resin, N- vinylpyrrolidones, light trigger and photoiniator.
In a kind of possible implementation, in above-mentioned motherboard provided in an embodiment of the present invention, the motherboard is including being in
Multiple array base palte units of matrix arrangement, the alignment mark and the grid line or the same layer of data wire in the array base palte unit
Set;Or,
The motherboard includes multiple opposite substrate units arranged in arrays, the alignment mark and the opposite substrate list
Black matrix in member is set with layer.
The embodiment of the present invention additionally provides a kind of motherboard to after box, including:The first motherboard put and the second mother relatively
Plate;First motherboard includes the first underlay substrate and arranged in arrays on first underlay substrate multiple had
The array base palte unit of first alignment mark;Second motherboard includes the second underlay substrate and positioned at the second substrate base
Multiple opposite substrate units with the second alignment mark arranged in arrays on plate;
Sealant is coated with along the line of cut on first underlay substrate, first alignment mark is located at sealant
In region, the sealant being coated with least described first alignment mark is transparent sealant;And/or
Sealant is coated with along the line of cut on second underlay substrate, second alignment mark is located at sealant
In region, the sealant being coated with least described second alignment mark is transparent sealant.
It is described in the above-mentioned motherboard to after box provided in an embodiment of the present invention in a kind of possible implementation
The material of bright sealant includes:Acrylic acid epoxy resin, N- vinylpyrrolidones, light trigger and photoiniator.
In a kind of possible implementation, in the above-mentioned motherboard to after box provided in an embodiment of the present invention, described
One alignment mark is set with the grid line in the array base palte unit or data wire with layer;
Second alignment mark is set with the black matrix in the opposite substrate unit with layer.
The embodiment of the present invention additionally provides a kind of liquid crystal display panel, and the liquid crystal display panel is by the embodiment of the present invention
Obtained after the above-mentioned motherboard cutting to after box provided.
The embodiment of the present invention additionally provides a kind of preparation method of motherboard, including:
The figure of multiple base board units with alignment mark arranged in arrays is formed on underlay substrate;
Sealant is coated with along the line of cut on the underlay substrate;Wherein, the alignment mark is located at where sealant
In region, the sealant being coated with least described alignment mark is transparent sealant.
In a kind of possible implementation, in the above method provided in an embodiment of the present invention, the transparent envelope frame
The material of glue includes:Acrylic acid epoxy resin, N- vinylpyrrolidones, light trigger and photoiniator.
In a kind of possible implementation, in the above method provided in an embodiment of the present invention, the motherboard is including being in
Multiple array base palte units of matrix arrangement, the figure that alignment mark is formed on underlay substrate, are specifically included:
Using a patterning processes, grid line or data line graph in the figure for forming each array base palte unit
The figure of the alignment mark is formed simultaneously;Or,
The motherboard includes multiple opposite substrate units arranged in arrays, described that alignment mark is formed on underlay substrate
Figure, specifically include:
Using a patterning processes, shape while black matrix figure in the figure for forming each opposite substrate unit
Into the figure of the alignment mark.
The embodiment of the present invention additionally provides a kind of preparation method of the motherboard to after box, including:
Multiple array base palte units with the first alignment mark arranged in arrays are formed on the first underlay substrate
Figure, multiple opposite substrate units with the second alignment mark arranged in arrays are correspondingly formed on the second underlay substrate
Figure;
Sealant is coated with along the line of cut on first underlay substrate;Wherein, first alignment mark is positioned at envelope
In frame glue region, the sealant being coated with least described first alignment mark is transparent sealant;And/or along institute
State the line of cut coating sealant on the second underlay substrate;Wherein, second alignment mark is located in sealant region,
The sealant being coated with least described second alignment mark is transparent sealant;
First underlay substrate and second underlay substrate are carried out to box processing.
In a kind of possible implementation, in the above method provided in an embodiment of the present invention, the transparent envelope frame
The material of glue includes:Acrylic acid epoxy resin, N- vinylpyrrolidones, light trigger and photoiniator.
It is described in the first substrate in the above method provided in an embodiment of the present invention in a kind of possible implementation
The figure of the first alignment mark is formed on substrate, is specifically included:
Using a patterning processes, grid line or data line graph in the figure for forming each array base palte unit
The figure of first alignment mark is formed simultaneously;
The figure that the second alignment mark is formed on the second underlay substrate, is specifically included:
Using a patterning processes, shape while black matrix figure in the figure for forming each opposite substrate unit
Into the figure of second alignment mark.
Above-mentioned motherboard provided in an embodiment of the present invention, to the motherboard after box, respective production method and liquid crystal display panel, should
Motherboard includes:Underlay substrate and multiple base board units with alignment mark arranged in arrays on underlay substrate;Edge
The line of cut on underlay substrate and be coated with sealant, alignment mark is located in sealant region;Due at least register guide
The sealant being coated with note is transparent sealant, i.e., the sealant being coated with alignment mark is transparent sealant, except contraposition
The sealant of region coating beyond mark is transparent or opaque sealant, so, even if along cutting on underlay substrate
Secant is coated with sealant so that and alignment mark is covered by sealant, the problem of being also not in None- identified alignment mark, so as to
Can be to accurately being cut to the motherboard after box, also, it is relatively low etc. bad in liquid crystal display panel colour mixture, transmitance occur
When, inspection confirmation can also be carried out by alignment mark.
Brief description of the drawings
Fig. 1 a and Fig. 1 b are respectively the schematic top plan view of motherboard provided in an embodiment of the present invention;
Fig. 2 a are sectional views of Fig. 1 a along AA directions;
Fig. 2 b are sectional views of Fig. 1 b along BB directions;
Fig. 3 a are that the motherboard provided in an embodiment of the present invention to after box applies fabric width before to box technique on the first motherboard
Structural representation after frame glue;
Fig. 3 b are that the motherboard provided in an embodiment of the present invention to after box applies fabric width before to box technique on the second motherboard
Structural representation after frame glue;
Fig. 4 a and Fig. 4 b are respectively the structural representation of the motherboard provided in an embodiment of the present invention to after box;
Fig. 5 is the flow chart of the preparation method of motherboard provided in an embodiment of the present invention;
Fig. 6 is respectively the flow chart of the preparation method of the motherboard provided in an embodiment of the present invention to after box.
Embodiment
Below in conjunction with the accompanying drawings, to motherboard provided in an embodiment of the present invention, to the motherboard after box, respective production method and liquid crystal
The embodiment of display panel is described in detail.
The shape of each film layer and thickness do not reflect the actual proportions of array base palte or opposite substrate in accompanying drawing, and purpose is simply shown
Meaning explanation present invention.
A kind of motherboard provided in an embodiment of the present invention, as shown in Fig. 1 a, Fig. 1 b, Fig. 2 a and Fig. 2 b, wherein, Fig. 2 a are Fig. 1 a
Along the sectional view in AA directions, Fig. 2 b are sectional views of Fig. 1 b along BB directions, including:Underlay substrate 1 and on underlay substrate 1
(Fig. 1 a and Fig. 1 b is multiple base board units 3 with alignment mark 2 arranged in arrays to show the base board unit 3 that 2 row * 2 are arranged
Example);(shown in dotted line as illustrated in figs. 1A and ib, it can be obtained along cutting wire cutting motherboard along the line of cut on underlay substrate 1
To four base board units 3) sealant 4 is coated with, alignment mark 2 is located in the region of sealant 4;
The sealant 4 being coated with least at alignment mark 2 is transparent sealant, you can so that in dispensing area, all coating is saturating
Bright sealant (shown in the dot-hatched as shown in Fig. 1 a and 2a), or, it can also be coated with only at alignment mark 2 transparent
Sealant (shown in the dot-hatched as shown in Fig. 1 b and Fig. 2 b) is opaque in the dispensing area coating in addition to alignment mark 2
Sealant (shown in the linear shadow as shown in Fig. 1 b and Fig. 2 b), do not limit herein.
Above-mentioned motherboard provided in an embodiment of the present invention, because the sealant being coated with least at alignment mark is transparent envelope frame
Glue, i.e., the sealant being coated with alignment mark is transparent sealant, and the sealant of the region coating in addition to alignment mark is
Transparent or opaque sealant, so, even if being coated with sealant along the line of cut on underlay substrate so that alignment mark quilt
The problem of sealant covering is also not in None- identified alignment mark.
In the specific implementation, the material of transparent sealant can specifically wrap above-mentioned motherboard provided in an embodiment of the present invention
Include:Acrylic acid epoxy resin, N- vinylpyrrolidones, light trigger and photoiniator.It is made up of above-mentioned material transparent
Sealant can be with rapid curing under the irradiation of ultraviolet light, also, the transparent sealant of above-mentioned material composition is for different
The light transmission rate of visible wavelength is higher, from following table 1 as can be seen that the transparent sealant of above-mentioned material composition is not for
The light transmission rate of same visible wavelength can reach more than 90%.
Table 1
Visible wavelength/nm | 440 | 460 | 500 | 560 | 600 |
Light transmission rate/% | 92.4 | 96.5 | 97.1 | 98.3 | 98.6 |
In the specific implementation, in above-mentioned motherboard provided in an embodiment of the present invention, base board unit is specifically as follows array base
Slab element, or, or opposite substrate unit, do not limit herein.
In the specific implementation, multiple array base paltes arranged in arrays are included in above-mentioned motherboard provided in an embodiment of the present invention
During unit, alignment mark can be set with the grid line in array base palte unit or data wire with layer, i.e., alignment mark can pass through
Patterning processes are formed simultaneously with grid line, or, alignment mark can also pass through a patterning processes and data wire while shape
Into so, the manufacture craft of array base palte unit can be simplified, reduce mask number.Provided in an embodiment of the present invention above-mentioned
When motherboard includes multiple opposite substrate units arranged in arrays, alignment mark can be same with the black matrix in opposite substrate unit
Layer is set, i.e., alignment mark can be formed simultaneously by a patterning processes with black matrix, so, can simplify opposite substrate list
The manufacture craft of member, reduce mask number.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of motherboard to after box, including:Put relatively
First motherboard and the second motherboard;As shown in Figure 3 a, the first motherboard includes the first underlay substrate 11 and positioned at the first underlay substrate
(Fig. 3 a are to show battle array that 2 row * 2 are arranged for multiple array base palte units 31 with the first alignment mark 21 arranged in arrays on 11
Exemplified by row base board unit 31);As shown in Figure 3 b, the second motherboard includes the second underlay substrate 12 and positioned at the second underlay substrate 12
It is upper it is arranged in arrays it is multiple there is the second alignment mark 22 opposite substrate unit 32 (Fig. 3 b with show that 2 row * 2 arrange to
Exemplified by base board unit 32);In the specific implementation, the above-mentioned motherboard to after box provided in an embodiment of the present invention to box technique it
Before, sealant can be coated on the first motherboard, as shown in Figure 3 a, along the line of cut on the first underlay substrate 11 (as schemed
Shown in dotted line shown in 3a, four array base palte units 31 can be obtained along the cutting motherboard of wire cutting first) it is coated with sealant
4, the first alignment mark 21 is located in the region of sealant 4, and the sealant 4 being coated with least at the first alignment mark 21 is transparent
Sealant;, can also be by sealant or the above-mentioned motherboard to after box provided in an embodiment of the present invention is before to box technique
It is coated on the second motherboard, as shown in Figure 3 b, along line of cut (the dotted line institute as shown in Figure 3 b on the second underlay substrate 12
Show, four opposite substrate units 32 can be obtained along the cutting motherboard of wire cutting second) it is coated with sealant 4, the second alignment mark
22 in the region of sealant 4, and the sealant 4 being coated with least at the second alignment mark 22 is transparent sealant;Or
The above-mentioned motherboard to after box provided in an embodiment of the present invention, can also be on the first motherboard and the second motherboard before to box technique
Sealant is all coated with, is not limited herein.
In the specific implementation, the above-mentioned motherboard to after box provided in an embodiment of the present invention will seal frame before to box technique
When glue is coated on the first motherboard, Fig. 3 a are illustrated exemplified by being all coated with transparent sealant on the first motherboard,
It is of course also possible to transparent sealant is coated with only at the first alignment mark 21, in the region in addition to the first alignment mark 21
Opaque sealant is coated with, is not limited herein.In the specific implementation, the above-mentioned mother to after box provided in an embodiment of the present invention
Plate is before to box technique, and when sealant is coated on the second motherboard, Fig. 3 b are transparent to be all coated with the second motherboard
Sealant exemplified by illustrate, it is of course also possible to be coated with transparent sealant only at the second alignment mark 22, except the
Region beyond two alignment marks 22 is coated with opaque sealant, does not limit herein.
It should be noted that the above-mentioned motherboard to after box provided in an embodiment of the present invention before to box technique, no matter will
Sealant is coated on the first motherboard or sealant is coated on the second motherboard, it is provided in an embodiment of the present invention it is above-mentioned to box after
The structure of motherboard be identical.Below with the above-mentioned motherboard to after box provided in an embodiment of the present invention before to box technique,
Illustrated exemplified by sealant is coated on the first motherboard.The above-mentioned motherboard to after box provided in an embodiment of the present invention, such as scheme
Shown in 4a and Fig. 4 b, sealant 4 is coated with along the line of cut on the first underlay substrate 11, the first alignment mark 21 is positioned at envelope frame
In the region of glue 4, because the sealant 4 being coated with least at the first alignment mark 21 is transparent sealant, you can to apply
Cloth region is all coated with transparent sealant (shown in dot-hatched as shown in fig. 4 a), or, can also be only in the first contraposition
Transparent sealant (shown in dot-hatched as shown in Figure 4 b) is coated with mark 21, in the painting in addition to the first alignment mark 21
Cloth region is coated with opaque sealant (shown in linear shadow as shown in Figure 4 b), so, even if along the first underlay substrate
Line of cut coating sealant 4 on 11 so that the first alignment mark 21 is covered by sealant 4, will not also go out after to box technique
The problem of existing None- identified the first alignment mark 21 and the second alignment mark 22, so as to accurate to being carried out to the motherboard after box
Cutting, also, the liquid crystal display panel that forms of cutting occur colour mixture, transmitance it is relatively low etc. bad when, first can also be passed through
The alignment mark 22 of alignment mark 21 and second checked with confirm it is above-mentioned it is bad whether be due to caused by aligning accuracy difference.
In the specific implementation, in the above-mentioned motherboard to after box provided in an embodiment of the present invention, the first alignment mark can be with
Set with the grid line in array base palte unit or data wire with layer, i.e., alignment mark can be same by a patterning processes and grid line
When formed, or, alignment mark can also be formed simultaneously by a patterning processes with data wire, so, can simplify array
The manufacture craft of base board unit, reduce mask number;Second alignment mark is set with the black matrix in opposite substrate unit with layer,
I.e. alignment mark can be formed simultaneously by a patterning processes with black matrix, so, can simplify the system of opposite substrate unit
Make technique, reduce mask number.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of liquid crystal display panel, the liquid crystal display panel
It is by will be obtained after the above-mentioned motherboard cutting to after box provided in an embodiment of the present invention.The specific reality of the liquid crystal display panel
The embodiment that may refer to the above-mentioned motherboard to after box is applied, part is repeated and repeats no more.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of preparation method of motherboard, as shown in figure 5, bag
Include following steps:
S501, the figure for forming on underlay substrate multiple base board units with alignment mark arranged in arrays;
S502, along on underlay substrate line of cut be coated with sealant;Wherein, alignment mark is located at sealant region
Interior, the sealant being coated with least at alignment mark is transparent sealant.
The preparation method of above-mentioned motherboard provided in an embodiment of the present invention, because the sealant being coated with least at alignment mark is
Transparent sealant, i.e., the sealant being coated with alignment mark is transparent sealant, the region coating in addition to alignment mark
Sealant be transparent or opaque sealant, so, though along on underlay substrate line of cut be coated with sealant so that
Alignment mark is covered by sealant, the problem of being also not in None- identified alignment mark.
In the specific implementation, the step S501 in the above method provided in an embodiment of the present invention forms arranged in arrays more
Individual base board unit, multiple array base palte units arranged in arrays can be specifically formed, or, it can also be formed arranged in arrays
Multiple opposite substrate units, do not limit herein.
In the specific implementation, the step S501 in the above method provided in an embodiment of the present invention is formed arranged in arrays
During multiple array base palte units, the step S501 in the above method provided in an embodiment of the present invention forms contraposition on underlay substrate
The figure of mark, a patterning processes can be specifically used, grid line or data in the figure for forming each array base palte unit
The figure of alignment mark is formed while line graph, so, the manufacture craft of array base palte unit can be simplified, reduce mask
Number.Step S501 in the above method provided in an embodiment of the present invention forms multiple opposite substrate units arranged in arrays
When, the step S501 in the above method provided in an embodiment of the present invention forms the figure of alignment mark on underlay substrate, specifically
A patterning processes can be used, form register guide while black matrix figure in the figure for forming each opposite substrate unit
The figure of note, so, the manufacture craft of opposite substrate unit can be simplified, reduce mask number.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of preparation method of the motherboard to after box, such as Fig. 6
It is shown, comprise the following steps:
S601, multiple array base palte lists with the first alignment mark arranged in arrays are formed on the first underlay substrate
The figure of member, is correspondingly formed multiple opposite substrate lists with the second alignment mark arranged in arrays on the second underlay substrate
The figure of member;
S602, along on the first underlay substrate line of cut be coated with sealant;Wherein, the first alignment mark is located at sealant
In region, the sealant being coated with least at the first alignment mark is transparent sealant;And/or along the second substrate base
Line of cut coating sealant on plate;Wherein, the second alignment mark is located in sealant region, at least the second alignment mark
The sealant of place's coating is transparent sealant;
S603, by the first underlay substrate and the second underlay substrate carry out to box processing.
The preparation method of the above-mentioned motherboard to after box provided in an embodiment of the present invention, fabric width frame is applied on the first underlay substrate
During glue, because the sealant being coated with least at the first alignment mark is transparent sealant, i.e., it is coated with the first alignment mark
Sealant is transparent sealant, and the sealant of the region coating in addition to the first alignment mark is transparent or opaque envelope frame
Glue, so, even if being coated with sealant along the line of cut on the first underlay substrate so that the first alignment mark is covered by sealant
Lid, be also not in the alignment mark of None- identified first and the second alignment mark after to box technique the problem of;In the second substrate
When sealant is coated with substrate, because the sealant being coated with least at the second alignment mark is transparent sealant, i.e., second pair
The sealant of position mark coating is transparent sealant, and the sealant of the region coating in addition to the second alignment mark is transparent
Or opaque sealant, so, even if being coated with sealant along the line of cut on the second underlay substrate so that the second register guide
Note is covered by sealant, is also not in that the alignment mark of None- identified first and the second alignment mark are asked after to box technique
Topic;So as to accurately being cut to the motherboard after box, also, the liquid crystal display panel that cutting forms occur colour mixture,
When transmitance is relatively low etc. bad, it can also be checked by the first alignment mark and the second alignment mark above-mentioned bad to confirm
Whether it is due to caused by aligning accuracy difference.
In the specific implementation, in the above method provided in an embodiment of the present invention, can be carried performing the embodiment of the present invention
Step S603 in the above method of confession carries out the first underlay substrate and the second underlay substrate to after box processing, passing through immersion
Mode by liquid crystal molecule add in the motherboard after box;Or above-mentioned side provided in an embodiment of the present invention can also performed
Step S602 in method along the line of cut on the first underlay substrate be coated with sealant when, the dispenser method on the second underlay substrate
Molecule;Or can also be in the step S602 in performing the above method provided in an embodiment of the present invention along the second underlay substrate
On line of cut coating sealant when, dispenser method molecule, is not limited herein on the first underlay substrate.
In the specific implementation, the shapes on the first underlay substrate of the step S601 in the above method provided in an embodiment of the present invention
Into the figure of the first alignment mark, a patterning processes can be specifically used, in the figure for forming each array base palte unit
The figure of the first alignment mark is formed while grid line or data line graph, so, the making of array base palte unit can be simplified
Technique, reduce mask number;Step S601 in the above method provided in an embodiment of the present invention is formed on the second underlay substrate
The figure of second alignment mark, a patterning processes can be specifically used, it is black in the figure for forming each opposite substrate unit
The figure of the second alignment mark is formed while Matrix Pattern, so, the manufacture craft of opposite substrate unit can be simplified, is reduced
Mask number.
It should be noted that in the specific implementation, the structure of the miscellaneous part in array base palte unit and existing array
The structure of corresponding component in substrate is similar, the manufacturing process of the miscellaneous part in array base palte unit and existing array base palte
In corresponding component manufacturing process it is similar;In the structure of miscellaneous part in opposite substrate unit and existing opposite substrate
The structure of corresponding component is similar, and the manufacturing process of the miscellaneous part in opposite substrate unit is corresponding in existing opposite substrate
The manufacturing process of part is similar, will not be described here.
A kind of motherboard provided in an embodiment of the present invention, to the motherboard after box, respective production method and liquid crystal display panel, should
Motherboard includes:Underlay substrate and multiple base board units with alignment mark arranged in arrays on underlay substrate;Edge
The line of cut on underlay substrate and be coated with sealant, alignment mark is located in sealant region;Due at least register guide
The sealant being coated with note is transparent sealant, i.e., the sealant being coated with alignment mark is transparent sealant, except contraposition
The sealant of region coating beyond mark is transparent or opaque sealant, so, even if along cutting on underlay substrate
Secant is coated with sealant so that and alignment mark is covered by sealant, the problem of being also not in None- identified alignment mark, so as to
Can be to accurately being cut to the motherboard after box, also, it is inclined in the liquid crystal display panel that forms of cutting colour mixture, transmitance occur
When low bad, can also be checked by the first alignment mark and the second alignment mark with confirm it is above-mentioned it is bad whether be by
In caused by aligning accuracy difference.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention
God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these changes and modification.
Claims (13)
1. a kind of motherboard, including:Underlay substrate and arranged in arrays on the underlay substrate multiple there is register guide
The base board unit of note;Sealant is coated with along the line of cut on the underlay substrate, the alignment mark is located at sealant institute
In region;It is characterized in that:
The alignment mark is used to improve the aligning accuracy between the motherboard and other motherboards;
The sealant being coated with least described alignment mark is transparent sealant.
2. motherboard as claimed in claim 1, it is characterised in that the material of the transparent sealant includes:Acrylic acid epoxy
Resin, N- vinylpyrrolidones, light trigger and photoiniator.
3. motherboard as claimed in claim 1 or 2, it is characterised in that the motherboard includes multiple array bases arranged in arrays
Slab element, the alignment mark are set with the grid line in the array base palte unit or data wire with layer;Or,
The motherboard includes multiple opposite substrate units arranged in arrays, the alignment mark with the opposite substrate unit
Black matrix with layer set.
4. a kind of motherboard to after box, including:The first motherboard and the second motherboard put relatively;First motherboard includes first
Underlay substrate and multiple array base paltes with the first alignment mark arranged in arrays on first underlay substrate
Unit;Second motherboard includes the second underlay substrate and multiple tools arranged in arrays on second underlay substrate
There is the opposite substrate unit of the second alignment mark;It is characterized in that:
Sealant is coated with along the line of cut on first underlay substrate, first alignment mark is located at where sealant
In region, the sealant being coated with least described first alignment mark is transparent sealant;And/or
Sealant is coated with along the line of cut on second underlay substrate, second alignment mark is located at where sealant
In region, the sealant being coated with least described second alignment mark is transparent sealant.
5. as claimed in claim 4 to the motherboard after box, it is characterised in that the material of the transparent sealant includes:Third
Olefin(e) acid epoxy resin, N- vinylpyrrolidones, light trigger and photoiniator.
6. as described in claim 4 or 5 to the motherboard after box, it is characterised in that first alignment mark and the array
Grid line or data wire in base board unit are set with layer;
Second alignment mark is set with the black matrix in the opposite substrate unit with layer.
7. a kind of liquid crystal display panel, it is characterised in that the liquid crystal display panel is by as described in claim any one of 4-6
To being obtained after the motherboard cutting after box.
A kind of 8. preparation method of motherboard, it is characterised in that including:
The figure of multiple base board units with alignment mark arranged in arrays is formed on underlay substrate;
Sealant is coated with along the line of cut on the underlay substrate;Wherein, the alignment mark is located at sealant region
Interior, the sealant being coated with least described alignment mark is transparent sealant.
9. method as claimed in claim 8, it is characterised in that the material of the transparent sealant includes:Acrylic acid epoxy
Resin, N- vinylpyrrolidones, light trigger and photoiniator.
10. method as claimed in claim 8 or 9, it is characterised in that the motherboard includes multiple array bases arranged in arrays
Slab element, the figure that alignment mark is formed on underlay substrate, is specifically included:
Using a patterning processes, while grid line or data line graph in the figure for forming each array base palte unit
Form the figure of the alignment mark;Or,
The motherboard includes multiple opposite substrate units arranged in arrays, the figure that alignment mark is formed on underlay substrate
Shape, specifically include:
Institute is formed using a patterning processes, while black matrix figure in the figure for forming each opposite substrate unit
State the figure of alignment mark.
A kind of 11. preparation method of motherboard to after box, it is characterised in that including:
The figure of multiple array base palte units with the first alignment mark arranged in arrays is formed on the first underlay substrate,
The figure of multiple opposite substrate units with the second alignment mark arranged in arrays is correspondingly formed on the second underlay substrate;
Sealant is coated with along the line of cut on first underlay substrate;Wherein, first alignment mark is located at sealant
In region, the sealant being coated with least described first alignment mark is transparent sealant;And/or along described
Line of cut coating sealant on two underlay substrates;Wherein, second alignment mark is located in sealant region, at least
The sealant being coated with second alignment mark is transparent sealant;
First underlay substrate and second underlay substrate are carried out to box processing.
12. method as claimed in claim 11, it is characterised in that the material of the transparent sealant includes:Acrylic acid ring
Oxygen tree fat, N- vinylpyrrolidones, light trigger and photoiniator.
13. the method as described in claim 11 or 12, it is characterised in that described that the first contraposition is formed on the first underlay substrate
The figure of mark, is specifically included:
Using a patterning processes, while grid line or data line graph in the figure for forming each array base palte unit
Form the figure of first alignment mark;
The figure that the second alignment mark is formed on the second underlay substrate, is specifically included:
Institute is formed using a patterning processes, while black matrix figure in the figure for forming each opposite substrate unit
State the figure of the second alignment mark.
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CN111128963B (en) | 2018-10-30 | 2022-04-26 | 成都京东方光电科技有限公司 | Display substrate mother board and manufacturing method thereof |
CN109581708B (en) * | 2018-12-29 | 2022-07-05 | 成都中电熊猫显示科技有限公司 | Mother board of liquid crystal display panel |
CN109976045B (en) * | 2019-04-04 | 2021-12-17 | 宜昌惠科科技有限公司 | Display panel and display device |
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